From: Thierry Reding <thierry.reding@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org,
Mikko Perttunen <mperttunen@nvidia.com>,
dri-devel@lists.freedesktop.org,
Jon Hunter <jonathanh@nvidia.com>
Subject: [PATCH 6/7] arm64: tegra: Add VIC support on Tegra194
Date: Fri, 23 Nov 2018 13:31:37 +0100 [thread overview]
Message-ID: <20181123123138.20739-6-thierry.reding@gmail.com> (raw)
In-Reply-To: <20181123123138.20739-1-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
Tegra194 has a version of VIC that is very similar to that on Tegra186.
Add the device tree node for it that is enabled by default.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index ce7481cb9e5b..19cfddaea697 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -137,6 +137,18 @@
};
};
+ vic@15340000 {
+ compatible = "nvidia,tegra194-vic";
+ reg = <0x15340000 0x00040000>;
+ interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&bpmp TEGRA194_CLK_VIC>;
+ clock-names = "vic";
+ resets = <&bpmp TEGRA194_RESET_VIC>;
+ reset-names = "vic";
+
+ power-domains = <&bpmp TEGRA194_POWER_DOMAIN_VIC>;
+ };
+
dpaux0: dpaux@155c0000 {
compatible = "nvidia,tegra194-dpaux";
reg = <0x155c0000 0x10000>;
--
2.19.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2018-11-23 12:31 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-23 12:31 [PATCH 1/7] gpu: host1x: Resize channel register region on Tegra186 and later Thierry Reding
2018-11-23 12:31 ` [PATCH 2/7] gpu: host1x: Fix syncpoint ID field size on Tegra186 Thierry Reding
2018-11-26 11:15 ` Mikko Perttunen
2018-11-23 12:31 ` [PATCH 3/7] gpu: host1x: Add Tegra194 support Thierry Reding
2018-11-26 11:22 ` Mikko Perttunen
2018-11-27 17:34 ` [PATCH v2] " Thierry Reding
2018-11-23 12:31 ` [PATCH 4/7] drm/tegra: vic: " Thierry Reding
2018-11-26 11:23 ` Mikko Perttunen
2018-11-23 12:31 ` [PATCH 5/7] arm64: tegra: Add display support on Tegra194 Thierry Reding
2018-11-23 12:31 ` Thierry Reding [this message]
2018-11-23 12:31 ` [PATCH 7/7] arm64: tegra: Enable HDMI on P2972-0000 Thierry Reding
2018-11-26 11:14 ` [PATCH 1/7] gpu: host1x: Resize channel register region on Tegra186 and later Mikko Perttunen
2018-11-26 15:11 ` Ilia Mirkin
2018-11-26 15:30 ` Thierry Reding
2018-11-26 16:02 ` Dmitry Osipenko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181123123138.20739-6-thierry.reding@gmail.com \
--to=thierry.reding@gmail.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=jonathanh@nvidia.com \
--cc=linux-tegra@vger.kernel.org \
--cc=mperttunen@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.