From: Guenter Roeck <linux@roeck-us.net>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: Paolo Bonzini <pbonzini@redhat.com>, Fam Zheng <famz@redhat.com>,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR
Date: Thu, 29 Nov 2018 07:42:20 -0800 [thread overview]
Message-ID: <20181129154220.GA2891@roeck-us.net> (raw)
In-Reply-To: <734e8388-2f0f-1c5b-7767-29e43d261bcb@ilande.co.uk>
On Thu, Nov 29, 2018 at 11:56:39AM +0000, Mark Cave-Ayland wrote:
> On 29/11/2018 09:58, Paolo Bonzini wrote:
>
> > On 28/11/18 22:56, Guenter Roeck wrote:
> >> The guest OS reads RSTAT, RSEQ, and RINTR, and expects those registers
> >> to reflect a consistent state. However, it is possible that the registers
> >> can change after RSTAT was read, but before RINTR is read.
> >>
> >> Guest OS qemu
> >> -------- ----
> >> Read RSTAT
> >> esp_command_complete()
> >> RSTAT = STAT_ST
> >> esp_dma_done()
> >> RSTAT |= STAT_TC
> >> RSEQ = 0
> >> RINTR = INTR_BS
> >>
> >> Read RSEQ
> >> Read RINTR RINTR = 0
> >> RSTAT &= ~STAT_TC
> >> RSEQ = SEQ_CD
> >>
> >> The guest OS would then try to handle INTR_BS combined with an old
> >> value of RSTAT. This sometimes resulted in lost events, spurious
> >> interrupts, guest OS confusion, and stalled SCSI operations.
> >
> > The question is, why was the guest running the interrupt routine before
> > STAT_INT was set in RSTAT? The code in esp_raise_irq seems good:
> >
> > if (!(s->rregs[ESP_RSTAT] & STAT_INT)) {
> > s->rregs[ESP_RSTAT] |= STAT_INT;
> > qemu_irq_raise(s->irq);
> > trace_esp_raise_irq();
> > }
> >
> > Paolo
>
> This patch is very interesting, as I have a long-running regression trying to boot
> NextSTEP 3.3 on qemu-system-sparc which I eventually bisected down to the commit that
> turned on iothread by default in QEMU.
>
Makes me wonder: Is there a means to hold up processing esp_command_complete()
until a pending interrupt has been handled ? That might be a cleaner solution.
I could try to implement that in the driver, but maybe there is a means to do
that using the infrastructure.
Thanks,
Guenter
> The symptom is that ESP SCSI requests hang/timeout before the kernel is able to get
> to the userspace installer: however if you launch QEMU with "taskset –cpu-list 1
> qemu-system-sparc ..." then it works and you can complete the installation.
>
> So certainly this suggests that there is a race condition still present in ESP
> somewhere. I've given this patch a spin, and in a few quick tests here I was able to
> consistently get further in kernel boot, but it still doesn't completely solve issue
> for me :/
>
>
> ATB,
>
> Mark.
next prev parent reply other threads:[~2018-11-29 15:42 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-28 21:56 [Qemu-devel] [PATCH 1/2] esp-pci: Fix status register write erase control Guenter Roeck
2018-11-28 21:56 ` [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR Guenter Roeck
2018-11-29 9:58 ` Paolo Bonzini
2018-11-29 11:56 ` Mark Cave-Ayland
2018-11-29 15:42 ` Guenter Roeck [this message]
2018-11-29 17:38 ` Guenter Roeck
2018-11-29 17:53 ` Paolo Bonzini
2018-11-29 18:07 ` Mark Cave-Ayland
2018-11-29 19:00 ` Guenter Roeck
2018-11-29 19:33 ` Mark Cave-Ayland
2018-11-29 21:26 ` Guenter Roeck
2018-11-29 18:34 ` Mark Cave-Ayland
2018-11-29 19:07 ` Guenter Roeck
2018-11-29 19:38 ` Mark Cave-Ayland
2018-11-29 14:18 ` Guenter Roeck
2018-11-29 9:58 ` [Qemu-devel] [PATCH 1/2] esp-pci: Fix status register write erase control Paolo Bonzini
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