Re: [Qemu-devel] [PATCH 00/12] tcg: Improve register allocation for calls

["Emilio G. Cota" <cota@braap.org>]

On Fri, Nov 30, 2018 at 08:15:56 +0100, Laurent Desnogues wrote:
> On Fri, Nov 30, 2018 at 4:00 AM Emilio G. Cota <cota@braap.org> wrote:
> >
> > On Thu, Nov 29, 2018 at 19:39:15 -0500, Emilio G. Cota wrote:
> > > A64 and POWER9 host numbers:
> > >
> > >   https://imgur.com/a/m6Pss99
> > >
> > > There's quite a bit of noise in the P9 measurements, but it's
> > > a shared machine so I can't do much about that.
> > >
> > > I'll update the A64 results with error bars later tonight,
> > > when I get further results.
> >
> > Here they are:
> >
> >   https://imgur.com/a/EAAapSW
> 
> What is a X-Gene A57? It's either X-Gene or A57 :-)

You're right -- this is an X-Gene (xgene 1).

The A57 reference came from here:

 https://www.cloudlab.us/hardware.php
 m400 nodes: 45 per chassis, 315 total
 Processor/Chipset: Applied Micro X-Gene system-on-chip
 Eight 64-bit ARMv8 (Atlas/A57) cores at 2.4 GHz
                           ^^^

I'm not familiar with ARMv8's commercial offerings, so I
just quoted the above--which turns out to be wrong,
since A57 is an ARM design and X-Gene is not.

Thanks,

		E.