From: Manasi Navare <manasi.d.navare@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting
Date: Mon, 3 Dec 2018 14:55:16 -0800 [thread overview]
Message-ID: <20181203225516.GB2462@intel.com> (raw)
In-Reply-To: <20181120202439.13017-2-chris@chris-wilson.co.uk>
On Tue, Nov 20, 2018 at 08:24:39PM +0000, Chris Wilson wrote:
> Always show the FEC capability as it is initialised to 0 before error.
That is a good point, do you think we should do the same for DSC DPCD and print
that unconditionally?
Manasi
> Fixing,
>
> drivers/gpu/drm/i915/intel_dp.c:3846 intel_dp_get_dsc_sink_cap() warn: inconsistent indenting
>
> Fixes: 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 13 ++++++-------
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 7699f9b7b2d2..de6c982b1d1e 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3837,15 +3837,14 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)
> DRM_DEBUG_KMS("DSC DPCD: %*ph\n",
> (int)sizeof(intel_dp->dsc_dpcd),
> intel_dp->dsc_dpcd);
> +
> /* FEC is supported only on DP 1.4 */
> - if (!intel_dp_is_edp(intel_dp)) {
> - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY,
> - &intel_dp->fec_capable) < 0)
> - DRM_ERROR("Failed to read FEC DPCD register\n");
> + if (!intel_dp_is_edp(intel_dp) &&
> + drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY,
> + &intel_dp->fec_capable) < 0)
> + DRM_ERROR("Failed to read FEC DPCD register\n");
>
> - DRM_DEBUG_KMS("FEC CAPABILITY: %x\n",
> - intel_dp->fec_capable);
> - }
> + DRM_DEBUG_KMS("FEC CAPABILITY: %x\n", intel_dp->fec_capable);
> }
> }
>
> --
> 2.19.1
>
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next prev parent reply other threads:[~2018-12-03 22:53 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-20 20:24 [PATCH 1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list Chris Wilson
2018-11-20 20:24 ` [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting Chris Wilson
2018-12-03 22:43 ` Srivatsa, Anusha
2018-12-03 22:55 ` Manasi Navare [this message]
2018-12-04 9:31 ` Chris Wilson
2018-11-20 20:49 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gvt: Avoid use-after-free iterating the gtt list Patchwork
2018-11-21 2:29 ` [PATCH 1/2] " Zhenyu Wang
2018-11-21 2:46 ` Yuan, Hang
2018-11-21 9:20 ` Chris Wilson
2018-11-21 9:21 ` Zhenyu Wang
2018-11-21 7:52 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
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