From: Rajendra Nayak <rnayak@codeaurora.org>
To: robh@kernel.org, viresh.kumar@linaro.org, sboyd@kernel.org,
andy.gross@linaro.org, ulf.hansson@linaro.org,
collinsd@codeaurora.org, mka@chromium.org
Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org,
Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH v5 1/8] dt-bindings: opp: Introduce qcom-opp bindings
Date: Tue, 4 Dec 2018 10:51:12 +0530 [thread overview]
Message-ID: <20181204052119.806-2-rnayak@codeaurora.org> (raw)
In-Reply-To: <20181204052119.806-1-rnayak@codeaurora.org>
On Qualcomm Technologies, Inc. platforms, an OPP node needs
to describe an additional level/corner value that is then communicated
to a remote microprocessor by the CPU, which then takes some
actions (like adjusting voltage values across various rails)
based on the value passed.
Describe these bindings in the qcom-opp bindings document.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
---
.../devicetree/bindings/opp/qcom-opp.txt | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree/bindings/opp/qcom-opp.txt
diff --git a/Documentation/devicetree/bindings/opp/qcom-opp.txt b/Documentation/devicetree/bindings/opp/qcom-opp.txt
new file mode 100644
index 000000000000..db4d970c7ec7
--- /dev/null
+++ b/Documentation/devicetree/bindings/opp/qcom-opp.txt
@@ -0,0 +1,25 @@
+Qualcomm OPP bindings to descibe OPP nodes with corner/level values
+
+OPP tables for devices on Qualcomm platforms require an additional
+platform specific corner/level value to be specified.
+This value is passed on to the RPM (Resource Power Manager) by
+the CPU, which then takes the necessary actions to set a voltage
+rail to an appropriate voltage based on the value passed.
+
+The bindings are based on top of the operating-points-v2 bindings
+described in Documentation/devicetree/bindings/opp/opp.txt
+Additional properties are described below.
+
+* OPP Table Node
+
+Required properties:
+- compatible: Allow OPPs to express their compatibility. It should be:
+ "operating-points-v2-qcom-level"
+
+* OPP Node
+
+Required properties:
+- qcom,level: On Qualcomm platforms an OPP node can describe a positive value
+representing a corner/level that's communicated with a remote microprocessor
+(usually called the RPM) which then translates it into a certain voltage on
+a voltage rail.
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2018-12-04 5:21 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 5:21 [PATCH v5 0/8] Add power domain driver for corners on msm8996/sdm845 Rajendra Nayak
2018-12-04 5:21 ` Rajendra Nayak [this message]
2018-12-04 23:06 ` [PATCH v5 1/8] dt-bindings: opp: Introduce qcom-opp bindings Stephen Boyd
2018-12-07 17:29 ` Rob Herring
2018-12-04 5:21 ` [PATCH v5 2/8] dt-bindings: power: Add qcom rpm power domain driver bindings Rajendra Nayak
2018-12-04 5:21 ` [PATCH v5 3/8] soc: qcom: rpmpd: Add a Power domain driver to model corners Rajendra Nayak
2018-12-04 23:12 ` Stephen Boyd
2018-12-05 7:01 ` Rajendra Nayak
2018-12-04 5:21 ` [PATCH v5 4/8] soc: qcom: rpmpd: Add support for get/set performance state Rajendra Nayak
2018-12-04 23:14 ` Stephen Boyd
2018-12-05 7:03 ` Rajendra Nayak
2018-12-05 10:11 ` Rajendra Nayak
2018-12-05 20:46 ` Stephen Boyd
2018-12-04 5:21 ` [PATCH v5 5/8] arm64: dts: msm8996: Add rpmpd device node Rajendra Nayak
2018-12-04 5:21 ` [PATCH v5 6/8] soc: qcom: rpmhpd: Add RPMh Power domain driver Rajendra Nayak
2018-12-04 5:21 ` [PATCH v5 7/8] arm64: dts: sdm845: Add rpmh powercontroller node Rajendra Nayak
2018-12-04 5:25 ` Viresh Kumar
2018-12-04 23:16 ` Stephen Boyd
2018-12-05 7:07 ` Rajendra Nayak
2018-12-07 17:36 ` Rob Herring
2018-12-04 5:21 ` [PATCH v5 8/8] soc: qcom: rpmhpd: Mark mx as a parent for cx Rajendra Nayak
2018-12-04 5:26 ` Viresh Kumar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181204052119.806-2-rnayak@codeaurora.org \
--to=rnayak@codeaurora.org \
--cc=andy.gross@linaro.org \
--cc=collinsd@codeaurora.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mka@chromium.org \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=ulf.hansson@linaro.org \
--cc=viresh.kumar@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.