From: Joerg Roedel <joro@8bytes.org>
To: "Liu, Yi L" <yi.l.liu@intel.com>
Cc: Lu Baolu <baolu.lu@linux.intel.com>,
David Woodhouse <dwmw2@infradead.org>,
"Raj, Ashok" <ashok.raj@intel.com>,
"Kumar, Sanjay K" <sanjay.k.kumar@intel.com>,
"Pan, Jacob jun" <jacob.jun.pan@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
"Sun, Yi Y" <yi.y.sun@intel.com>,
"peterx@redhat.com" <peterx@redhat.com>,
Jean-Philippe Brucker <jean-philippe.brucker@arm.com>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Jacob Pan <jacob.jun.pan@linux.intel.com>
Subject: Re: [PATCH v5 02/12] iommu/vt-d: Manage scalalble mode PASID tables
Date: Wed, 5 Dec 2018 16:47:10 +0100 [thread overview]
Message-ID: <20181205154710.GB16835@8bytes.org> (raw)
In-Reply-To: <A2975661238FB949B60364EF0F2C257439D838B9@SHSMSX104.ccr.corp.intel.com>
On Mon, Dec 03, 2018 at 05:23:40PM +0000, Liu, Yi L wrote:
> So for a device without PASID support, we need to at least to have a PASID
> entry so that its DMA request (without pasid) can be translated. Thus a PASID
> table is needed for such devices.
That makes sense, thanks for the explanation.
Joerg
next prev parent reply other threads:[~2018-12-05 15:47 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-28 3:54 [PATCH v5 00/12] iommu/vt-d: Add scalable mode support Lu Baolu
2018-11-28 3:54 ` [PATCH v5 02/12] iommu/vt-d: Manage scalalble mode PASID tables Lu Baolu
2018-12-03 13:44 ` Joerg Roedel
[not found] ` <20181203134411.lejlkbnagxml54ro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2018-12-03 17:23 ` Liu, Yi L
2018-12-03 17:23 ` Liu, Yi L
2018-12-04 5:58 ` Lu Baolu
[not found] ` <5c81008b-30e8-177d-0182-db366608562f-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-12-05 15:50 ` Joerg Roedel
2018-12-05 15:50 ` Joerg Roedel
2018-12-06 1:13 ` Lu Baolu
2018-12-05 15:47 ` Joerg Roedel [this message]
[not found] ` <20181128035449.10226-1-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-11-28 3:54 ` [PATCH v5 01/12] iommu/vt-d: Enumerate the scalable mode capability Lu Baolu
2018-11-28 3:54 ` Lu Baolu
2018-11-28 3:54 ` [PATCH v5 03/12] iommu/vt-d: Move page table helpers into header Lu Baolu
2018-11-28 3:54 ` Lu Baolu
2018-11-28 3:54 ` [PATCH v5 04/12] iommu/vt-d: Add 256-bit invalidation descriptor support Lu Baolu
2018-12-03 13:48 ` Joerg Roedel
2018-12-03 17:23 ` Liu, Yi L
[not found] ` <A2975661238FB949B60364EF0F2C257439D838AB-0J0gbvR4kTg/UvCtAeCM4rfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2018-12-04 6:13 ` Lu Baolu
2018-12-04 6:13 ` Lu Baolu
2018-12-05 15:56 ` Joerg Roedel
2018-12-06 1:19 ` Lu Baolu
2018-11-28 3:54 ` [PATCH v5 05/12] iommu/vt-d: Reserve a domain id for FL and PT modes Lu Baolu
2018-11-28 3:54 ` [PATCH v5 06/12] iommu/vt-d: Add second level page table interface Lu Baolu
2018-11-28 3:54 ` [PATCH v5 07/12] iommu/vt-d: Setup pasid entry for RID2PASID support Lu Baolu
2018-11-28 3:54 ` [PATCH v5 08/12] iommu/vt-d: Pass pasid table to context mapping Lu Baolu
2018-11-28 3:54 ` [PATCH v5 09/12] iommu/vt-d: Setup context and enable RID2PASID support Lu Baolu
2018-11-28 3:54 ` [PATCH v5 10/12] iommu/vt-d: Add first level page table interface Lu Baolu
2018-11-28 3:54 ` [PATCH v5 11/12] iommu/vt-d: Shared virtual address in scalable mode Lu Baolu
2018-11-28 3:54 ` [PATCH v5 12/12] iommu/vt-d: Remove deferred invalidation Lu Baolu
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