From: Boris Brezillon <boris.brezillon@bootlin.com>
To: Yong Qin <Yong.Qin@cypress.com>
Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>,
Tudor Ambarus <tudor.ambarus@microchip.com>,
"cyrille.pitchen@wedev4u.fr" <cyrille.pitchen@wedev4u.fr>,
James Tomasetta <James.Tomasetta@cypress.com>,
Jimmy Zhao <jimmy.zhao@nxp.com>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>
Subject: Re: SPI-NOR FS512S incorrect CR3NV[1] value
Date: Wed, 5 Dec 2018 20:27:53 +0100 [thread overview]
Message-ID: <20181205202753.47ebe911@bbrezillon> (raw)
In-Reply-To: <DM5PR06MB32285AC8B1327F52325D1AA28FA80@DM5PR06MB3228.namprd06.prod.outlook.com>
On Wed, 5 Dec 2018 19:21:51 +0000
Yong Qin <Yong.Qin@cypress.com> wrote:
> Hi Boris,
>
> Thanks for pointing this out.
>
> Confirmed with our product team, this is the part of datasheet
> discrepancy. Since FS512S only has 256KB sector size option, CR3NV[1]
> is don't care in FS512S and default value is set as 0 in factory.
>
> Column 3 (CR3NV[1]) of table 70 in datasheet will be removed.
>
> For software implementation, if identified the device is FS512S, then
> checking the combination of CR3NV[3] & CR1NV[2] is sufficient to
> decide if the device has top/bottom 4KB sectors, or uniform 256KB
> sectors.
Again, fixing the datasheet is not enough, the SMPT section on the flash
needs to be fixed too.
next prev parent reply other threads:[~2018-12-05 19:28 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-03 4:33 FW: SPI-NOR FS512S incorrect CR3NV[1] value Yogesh Narayan Gaur
2018-12-03 7:38 ` Boris Brezillon
2018-12-04 1:37 ` Yong Qin
2018-12-04 9:03 ` Boris Brezillon
2018-12-05 19:21 ` Yong Qin
2018-12-05 19:27 ` Boris Brezillon [this message]
2018-12-05 19:29 ` Boris Brezillon
2018-12-05 19:39 ` Yong Qin
2018-12-06 16:30 ` James Tomasetta
2018-12-07 4:37 ` Yogesh Narayan Gaur
2018-12-07 15:02 ` James Tomasetta
2018-12-07 15:17 ` Boris Brezillon
2018-12-17 6:22 ` Pankaj Bansal
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