From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jordan Crouse Subject: [PATCH v6 2/2] arm64: dts: sdm845: Add gpu and gmu device nodes Date: Wed, 12 Dec 2018 14:18:48 -0700 Message-ID: <20181212211848.26768-3-jcrouse@codeaurora.org> References: <20181212211848.26768-1-jcrouse@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20181212211848.26768-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: freedreno-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "Freedreno" To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Cc: nm-l0cyMroinI0@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, 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LWJpbmRpbmdzL2ludGVycnVwdC1jb250cm9sbGVyL2FybS1naWMuaD4KICNpbmNsdWRlIDxkdC1i aW5kaW5ncy9waHkvcGh5LXFjb20tcXVzYjIuaD4KKyNpbmNsdWRlIDxkdC1iaW5kaW5ncy9wb3dl ci9xY29tLXJwbXBkLmg+CiAjaW5jbHVkZSA8ZHQtYmluZGluZ3MvcmVzZXQvcWNvbSxzZG04NDUt YW9zcy5oPgogI2luY2x1ZGUgPGR0LWJpbmRpbmdzL3NvYy9xY29tLHJwbWgtcnNjLmg+CiAjaW5j bHVkZSA8ZHQtYmluZGluZ3MvY2xvY2svcWNvbSxnY2Mtc2RtODQ1Lmg+CkBAIC0xMzQ5LDYgKzEz NTAsMTI4IEBACiAJCQl9OwogCQl9OwogCisKKwkJZ3B1QDUwMDAwMDAgeworCQkJY29tcGF0aWJs ZSA9ICJxY29tLGFkcmVuby02MzAuMiIsICJxY29tLGFkcmVubyI7CisJCQkjc3RyZWFtLWlkLWNl bGxzID0gPDE2PjsKKworCQkJcmVnID0gPDB4NTAwMDAwMCAweDQwMDAwPiwgPDB4NTA5ZTAwMCAw eDEwPjsKKwkJCXJlZy1uYW1lcyA9ICJrZ3NsXzNkMF9yZWdfbWVtb3J5IiwgImN4X21lbSI7CisK KwkJCS8qCisJCQkgKiBMb29rIG1hLCBubyBjbG9ja3MhIFRoZSBHUFUgY2xvY2tzIGFuZCBwb3dl ciBhcmUKKwkJCSAqIGNvbnRyb2xsZWQgZW50aXJlbHkgYnkgdGhlIEdNVQorCQkJICovCisKKwkJ CWludGVycnVwdHMgPSA8R0lDX1NQSSAzMDAgSVJRX1RZUEVfTEVWRUxfSElHSD47CisJCQlpbnRl cnJ1cHQtbmFtZXMgPSAia2dzbF8zZDBfaXJxIjsKKworCQkJaW9tbXVzID0gPCZhZHJlbm9fc21t dSAwPjsKKworCQkJb3BlcmF0aW5nLXBvaW50cy12MiA9IDwmZ3B1X29wcF90YWJsZT47CisKKwkJ CXFjb20sZ211ID0gPCZnbXU+OworCisJCQlncHVfb3BwX3RhYmxlOiBvcHAtdGFibGUgeworCQkJ CWNvbXBhdGlibGUgPSAib3BlcmF0aW5nLXBvaW50cy12Mi1xY29tLWxldmVsIjsKKworCQkJCW9w cC03MTAwMDAwMDAgeworCQkJCQlvcHAtaHogPSAvYml0cy8gNjQgPDcxMDAwMDAwMD47CisJCQkJ CXFjb20sbGV2ZWwgPSA8UlBNSF9SRUdVTEFUT1JfTEVWRUxfVFVSQk9fTDE+OworCQkJCX07CisK KwkJCQlvcHAtNjc1MDAwMDAwIHsKKwkJCQkJb3BwLWh6ID0gL2JpdHMvIDY0IDw2NzUwMDAwMDA+ OworCQkJCQlxY29tLGxldmVsID0gPFJQTUhfUkVHVUxBVE9SX0xFVkVMX1RVUkJPPjsKKwkJCQl9 OworCisJCQkJb3BwLTU5NjAwMDAwMCB7CisJCQkJCW9wcC1oeiA9IC9iaXRzLyA2NCA8NTk2MDAw MDAwPjsKKwkJCQkJcWNvbSxsZXZlbCA9IDxSUE1IX1JFR1VMQVRPUl9MRVZFTF9OT01fTDE+Owor CQkJCX07CisKKwkJCQlvcHAtNTIwMDAwMDAwIHsKKwkJCQkJb3BwLWh6ID0gL2JpdHMvIDY0IDw1 MjAwMDAwMDA+OworCQkJCQlxY29tLGxldmVsID0gPFJQTUhfUkVHVUxBVE9SX0xFVkVMX05PTT47 CisJCQkJfTsKKworCQkJCW9wcC00MTQwMDAwMDAgeworCQkJCQlvcHAtaHogPSAvYml0cy8gNjQg PDQxNDAwMDAwMD47CisJCQkJCXFjb20sbGV2ZWwgPSA8UlBNSF9SRUdVTEFUT1JfTEVWRUxfU1ZT X0wxPjsKKwkJCQl9OworCisJCQkJb3BwLTM0MjAwMDAwMCB7CisJCQkJCW9wcC1oeiA9IC9iaXRz LyA2NCA8MzQyMDAwMDAwPjsKKwkJCQkJcWNvbSxsZXZlbCA9IDxSUE1IX1JFR1VMQVRPUl9MRVZF TF9TVlM+OworCQkJCX07CisKKwkJCQlvcHAtMjU3MDAwMDAwIHsKKwkJCQkJb3BwLWh6ID0gL2Jp dHMvIDY0IDwyNTcwMDAwMDA+OworCQkJCQlxY29tLGxldmVsID0gPFJQTUhfUkVHVUxBVE9SX0xF VkVMX0xPV19TVlM+OworCQkJCX07CisJCQl9OworCQl9OworCisJCWFkcmVub19zbW11OiBpb21t dUA1MDQwMDAwIHsKKwkJCWNvbXBhdGlibGUgPSAicWNvbSxzZG04NDUtc21tdS12MiIsICJxY29t LHNtbXUtdjIiOworCQkJcmVnID0gPDB4NTA0MDAwMCAweDEwMDAwPjsKKwkJCSNpb21tdS1jZWxs cyA9IDwxPjsKKwkJCSNnbG9iYWwtaW50ZXJydXB0cyA9IDwyPjsKKwkJCWludGVycnVwdHMgPSA8 R0lDX1NQSSAyMjkgSVJRX1RZUEVfTEVWRUxfSElHSD4sCisJCQkJCTxHSUNfU1BJIDIzMSBJUlFf VFlQRV9MRVZFTF9ISUdIPiwKKwkJCQkJPEdJQ19TUEkgMzY0IElSUV9UWVBFX0VER0VfUklTSU5H PiwKKwkJCQkJPEdJQ19TUEkgMzY1IElSUV9UWVBFX0VER0VfUklTSU5HPiwKKwkJCQkJPEdJQ19T UEkgMzY2IElSUV9UWVBFX0VER0VfUklTSU5HPiwKKwkJCQkJPEdJQ19TUEkgMzY3IElSUV9UWVBF X0VER0VfUklTSU5HPiwKKwkJCQkJPEdJQ19TUEkgMzY4IElSUV9UWVBFX0VER0VfUklTSU5HPiwK KwkJCQkJPEdJQ19TUEkgMzY5IElSUV9UWVBFX0VER0VfUklTSU5HPiwKKwkJCQkJPEdJQ19TUEkg MzcwIElSUV9UWVBFX0VER0VfUklTSU5HPiwKKwkJCQkJPEdJQ19TUEkgMzcxIElSUV9UWVBFX0VE R0VfUklTSU5HPjsKKwkJCWNsb2NrcyA9IDwmZ2NjIEdDQ19HUFVfTUVNTk9DX0dGWF9DTEs+LAor CQkJCTwmZ2NjIEdDQ19HUFVfQ0ZHX0FIQl9DTEs+OworCQkJY2xvY2stbmFtZXMgPSAiYnVzIiwg ImlmYWNlIjsKKworCQkJcG93ZXItZG9tYWlucyA9IDwmZ3B1Y2MgR1BVX0NYX0dEU0M+OworCQl9 OworCisJCWdtdTogZ211QDUwNmEwMDAgeworCQkJY29tcGF0aWJsZT0icWNvbSxhZHJlbm8tZ211 IjsKKworCQkJcmVnID0gPDB4NTA2YTAwMCAweDMwMDAwPiwKKwkJCQk8MHhiMjgwMDAwIDB4MTAw MDA+LAorCQkJCTwweGI0ODAwMDAgMHgxMDAwMD47CisJCQlyZWctbmFtZXMgPSAiZ211IiwgImdt dV9wZGMiLCAiZ211X3BkY19zZXEiOworCisJCQlpbnRlcnJ1cHRzID0gPEdJQ19TUEkgMzA0IElS UV9UWVBFX0xFVkVMX0hJR0g+LAorCQkJICAgICA8R0lDX1NQSSAzMDUgSVJRX1RZUEVfTEVWRUxf SElHSD47CisJCQlpbnRlcnJ1cHQtbmFtZXMgPSAiaGZpIiwgImdtdSI7CisKKwkJCWNsb2NrcyA9 IDwmZ3B1Y2MgR1BVX0NDX0NYX0dNVV9DTEs+LAorCQkJCTwmZ3B1Y2MgR1BVX0NDX0NYT19DTEs+ LAorCQkJCTwmZ2NjIEdDQ19ERFJTU19HUFVfQVhJX0NMSz4sCisJCQkJPCZnY2MgR0NDX0dQVV9N RU1OT0NfR0ZYX0NMSz47CisJCQljbG9jay1uYW1lcyA9ICJnbXUiLCAiY3hvIiwgImF4aSIsICJt ZW1ub2MiOworCisJCQlwb3dlci1kb21haW5zID0gPCZncHVjYyBHUFVfQ1hfR0RTQz47CisJCQlp b21tdXMgPSA8JmFkcmVub19zbW11IDU+OworCisJCQlvcGVyYXRpbmctcG9pbnRzLXYyID0gPCZn bXVfb3BwX3RhYmxlPjsKKworCQkJZ211X29wcF90YWJsZTogb3BwLXRhYmxlIHsKKwkJCQljb21w YXRpYmxlID0gIm9wZXJhdGluZy1wb2ludHMtdjItcWNvbS1sZXZlbCI7CisKKwkJCQlvcHAtNDAw MDAwMDAwIHsKKwkJCQkJb3BwLWh6ID0gL2JpdHMvIDY0IDw0MDAwMDAwMDA+OworCQkJCQlxY29t LGxldmVsID0gPFJQTUhfUkVHVUxBVE9SX0xFVkVMX1NWUz47CisJCQkJfTsKKworCQkJCW9wcC0y MDAwMDAwMDAgeworCQkJCQlvcHAtaHogPSAvYml0cy8gNjQgPDIwMDAwMDAwMD47CisJCQkJCXFj b20sbGV2ZWwgPSA8UlBNSF9SRUdVTEFUT1JfTEVWRUxfTUlOX1NWUz47CisJCQkJfTsKKwkJCX07 CisJCX07CisKIAkJZ3B1Y2M6IGNsb2NrLWNvbnRyb2xsZXJANTA5MDAwMCB7CiAJCQljb21wYXRp YmxlID0gInFjb20sc2RtODQ1LWdwdWNjIjsKIAkJCXJlZyA9IDwweDUwOTAwMDAgMHg5MDAwPjsK LS0gCjIuMTguMAoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X18KRnJlZWRyZW5vIG1haWxpbmcgbGlzdApGcmVlZHJlbm9AbGlzdHMuZnJlZWRlc2t0b3Aub3Jn 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b=L/zs6PaNFhf1tEpx+wnYTCZN8rtwIjOjLO7xwTAjublvVz4Ey2Z64n/zZVJZEEaBS x76e6l2QtdSK5ZYQawdsStVmj/AiSXeuGO2m67qy4p0SbuSCQyGZkywfGwnahz9DSk FKcc8jUyGvCSAyYbsz1S6/4WlVFwf75Nx9diiX3I= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 933F9609E2 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH v6 2/2] arm64: dts: sdm845: Add gpu and gmu device nodes Date: Wed, 12 Dec 2018 14:18:48 -0700 Message-Id: <20181212211848.26768-3-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181212211848.26768-1-jcrouse@codeaurora.org> References: <20181212211848.26768-1-jcrouse@codeaurora.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181212_131904_077965_4A9A4B90 X-CRM114-Status: GOOD ( 11.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nm@ti.com, devicetree@vger.kernel.org, rnayak@codeaurora.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, dianders@chromium.org, vireshk@kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the nodes to describe the Adreno GPU and GMU devices. Signed-off-by: Jordan Crouse --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 123 +++++++++++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 233a5898ebc2..a608afed502e 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -1349,6 +1350,128 @@ }; }; + + gpu@5000000 { + compatible = "qcom,adreno-630.2", "qcom,adreno"; + #stream-id-cells = <16>; + + reg = <0x5000000 0x40000>, <0x509e000 0x10>; + reg-names = "kgsl_3d0_reg_memory", "cx_mem"; + + /* + * Look ma, no clocks! The GPU clocks and power are + * controlled entirely by the GMU + */ + + interrupts = ; + interrupt-names = "kgsl_3d0_irq"; + + iommus = <&adreno_smmu 0>; + + operating-points-v2 = <&gpu_opp_table>; + + qcom,gmu = <&gmu>; + + gpu_opp_table: opp-table { + compatible = "operating-points-v2-qcom-level"; + + opp-710000000 { + opp-hz = /bits/ 64 <710000000>; + qcom,level = ; + }; + + opp-675000000 { + opp-hz = /bits/ 64 <675000000>; + qcom,level = ; + }; + + opp-596000000 { + opp-hz = /bits/ 64 <596000000>; + qcom,level = ; + }; + + opp-520000000 { + opp-hz = /bits/ 64 <520000000>; + qcom,level = ; + }; + + opp-414000000 { + opp-hz = /bits/ 64 <414000000>; + qcom,level = ; + }; + + opp-342000000 { + opp-hz = /bits/ 64 <342000000>; + qcom,level = ; + }; + + opp-257000000 { + opp-hz = /bits/ 64 <257000000>; + qcom,level = ; + }; + }; + }; + + adreno_smmu: iommu@5040000 { + compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2"; + reg = <0x5040000 0x10000>; + #iommu-cells = <1>; + #global-interrupts = <2>; + interrupts = , + , + , + , + , + , + , + , + , + ; + clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&gcc GCC_GPU_CFG_AHB_CLK>; + clock-names = "bus", "iface"; + + power-domains = <&gpucc GPU_CX_GDSC>; + }; + + gmu: gmu@506a000 { + compatible="qcom,adreno-gmu"; + + reg = <0x506a000 0x30000>, + <0xb280000 0x10000>, + <0xb480000 0x10000>; + reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq"; + + interrupts = , + ; + interrupt-names = "hfi", "gmu"; + + clocks = <&gpucc GPU_CC_CX_GMU_CLK>, + <&gpucc GPU_CC_CXO_CLK>, + <&gcc GCC_DDRSS_GPU_AXI_CLK>, + <&gcc GCC_GPU_MEMNOC_GFX_CLK>; + clock-names = "gmu", "cxo", "axi", "memnoc"; + + power-domains = <&gpucc GPU_CX_GDSC>; + iommus = <&adreno_smmu 5>; + + operating-points-v2 = <&gmu_opp_table>; + + gmu_opp_table: opp-table { + compatible = "operating-points-v2-qcom-level"; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + qcom,level = ; + }; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + qcom,level = ; + }; + }; + }; + gpucc: clock-controller@5090000 { compatible = "qcom,sdm845-gpucc"; reg = <0x5090000 0x9000>; -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel