From: Andrew Lunn <andrew@lunn.ch>
To: John Rama <john.rama01@gmail.com>
Cc: netdev@vger.kernel.org
Subject: Re: DSA: external phy address and port number of switch conflicts
Date: Fri, 14 Dec 2018 09:38:04 +0100 [thread overview]
Message-ID: <20181214083804.GD3703@lunn.ch> (raw)
In-Reply-To: <5C12F555.2070305@gmail.com>
On Thu, Dec 13, 2018 at 07:12:05PM -0500, John Rama wrote:
> Dear DSA experts
>
> My name is John.
>
> I'm working for our custom board which has the Marvel 88e5050 ethernet switch
> as shown below, and trying to make the system works using DSA subsystem.
88e5050 is a new switch to me. So i don't know anything about its
register layout.
> I found one problem and have a question.
>
> - System
> - i.MX6 and Marvel 88e5050 Switch(PHY addr is 0x10)
> - port1-5 has integrated PHY
> - port7 is connected to Marvel 88e1510 PHY(PHY addr is 0x1)
>
> 0x10
> +------------+ +-----------------+
> | | | Marvel 88e5050 |
> | | RGMII | port1 |
> | IMX6 +---------+ port6 |
> | | | port2 |
> | | MDIO | |
> | +-+-------+ port3 |
> | | | | |
> +------------+ | | port4 |
> | | |
> +-+-+ | port5 |
> | |SGMII| |
> |PHY|-----| port7 |
> | | | |
> +---+ +-----------------+
> Marvel 88e1510
> 0x1
> I'm using a little bit old kernel,4.1.15.
Since you have the switch in single address mode, i don't see why this
should not work. But as Florian said, please update to a new kernel,
and swap to using the new binding with the properties inside the IMX
MDIO bus.
Andrew
next prev parent reply other threads:[~2018-12-14 8:38 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-14 0:12 DSA: external phy address and port number of switch conflicts John Rama
2018-12-14 5:08 ` Florian Fainelli
2018-12-17 22:55 ` John Rama
2018-12-17 23:03 ` Florian Fainelli
2018-12-18 18:55 ` John Rama
2018-12-14 8:38 ` Andrew Lunn [this message]
2018-12-14 16:24 ` Vivien Didelot
2018-12-14 16:31 ` John Rama
-- strict thread matches above, loose matches on Subject: below --
2018-12-13 23:51 John Rama
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