From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gregory CLEMENT Subject: [PATCH 1/3] pinctrl: armada-37xx: Correct mpp definitions Date: Fri, 21 Dec 2018 18:32:57 +0100 Message-ID: <20181221173259.8372-2-gregory.clement@bootlin.com> References: <20181221173259.8372-1-gregory.clement@bootlin.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20181221173259.8372-1-gregory.clement@bootlin.com> Sender: linux-kernel-owner@vger.kernel.org To: Linus Walleij , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory CLEMENT , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Antoine Tenart , =?UTF-8?q?Miqu=C3=A8l=20Raynal?= , Maxime Chevallier , Nadav Haklai , Marcin Wojtas , =?UTF-8?q?Marek=20Beh=C3=BAn?= List-Id: linux-gpio@vger.kernel.org From: Marek Behún This is a cleanup and fix of the patch by Ken Ma . Fix the mpp definitions according to newest revision of the specification: - northbridge: fix pmic1 gpio number to 7 fix pmic0 gpio number to 6 - southbridge split pcie1 group bit mask to BIT(5) and BIT(9) fix ptp group bit mask to BIT(11) | BIT(12) | BIT(13) add smi group with bit mask BIT(4) [gregory: split the pcie group in 2, as at hardware level they can be configured separately] Signed-off-by: Marek Behún Signed-off-by: Gregory CLEMENT --- .../pinctrl/marvell,armada-37xx-pinctrl.txt | 18 +++++++++++++----- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 10 ++++++---- 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt index c7c088d2dd50..f69f82741cae 100644 --- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt @@ -58,11 +58,11 @@ group pwm3 - functions pwm, gpio group pmic1 - - pin 17 + - pin 7 - functions pmic, gpio group pmic0 - - pin 16 + - pin 6 - functions pmic, gpio group i2c2 @@ -112,17 +112,25 @@ group usb2_drvvbus1 - functions drvbus, gpio group sdio_sb - - pins 60-64 + - pins 60-65 - functions sdio, gpio group rgmii - - pins 42-55 + - pins 42-53 - functions mii, gpio group pcie1 - - pins 39-40 + - pins 39 + - functions pcie, gpio + +group pcie1_clkreq + - pins 40 - functions pcie, gpio +group smi + - pins 54-55 + - functions smi, gpio + group ptp - pins 56-58 - functions ptp, gpio diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index aa48b3f23c7f..267dfc530985 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -170,8 +170,8 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"), PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"), PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"), - PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"), - PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"), + PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"), + PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"), PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"), PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"), PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"), @@ -195,8 +195,10 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"), PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"), PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"), - PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"), - PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"), + PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"), + PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), + PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"), + PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"), PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"), PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"), PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14), -- 2.19.2 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADCC8C43387 for ; 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Fri, 21 Dec 2018 18:33:05 +0100 (CET) From: Gregory CLEMENT To: Linus Walleij , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] pinctrl: armada-37xx: Correct mpp definitions Date: Fri, 21 Dec 2018 18:32:57 +0100 Message-Id: <20181221173259.8372-2-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181221173259.8372-1-gregory.clement@bootlin.com> References: <20181221173259.8372-1-gregory.clement@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181221_093329_987892_D714C078 X-CRM114-Status: GOOD ( 11.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Jason Cooper , Antoine Tenart , Gregory CLEMENT , Maxime Chevallier , Nadav Haklai , Thomas Petazzoni , =?UTF-8?q?Miqu=C3=A8l=20Raynal?= , Marcin Wojtas , =?UTF-8?q?Marek=20Beh=C3=BAn?= , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org RnJvbTogTWFyZWsgQmVow7puIDxtYXJlay5iZWh1bkBuaWMuY3o+CgpUaGlzIGlzIGEgY2xlYW51 cCBhbmQgZml4IG9mIHRoZSBwYXRjaCBieSBLZW4gTWEgPG1ha2VAbWFydmVsbC5jb20+LgoKRml4 IHRoZSBtcHAgZGVmaW5pdGlvbnMgYWNjb3JkaW5nIHRvIG5ld2VzdCByZXZpc2lvbiBvZiB0aGUK c3BlY2lmaWNhdGlvbjoKICAtIG5vcnRoYnJpZGdlOgogICAgZml4IHBtaWMxIGdwaW8gbnVtYmVy IHRvIDcKICAgIGZpeCBwbWljMCBncGlvIG51bWJlciB0byA2CiAgLSBzb3V0aGJyaWRnZQogICAg c3BsaXQgcGNpZTEgZ3JvdXAgYml0IG1hc2sgdG8gQklUKDUpIGFuZCAgQklUKDkpCiAgICBmaXgg cHRwIGdyb3VwIGJpdCBtYXNrIHRvIEJJVCgxMSkgfCBCSVQoMTIpIHwgQklUKDEzKQogICAgYWRk IHNtaSBncm91cCB3aXRoIGJpdCBtYXNrIEJJVCg0KQoKW2dyZWdvcnk6IHNwbGl0IHRoZSBwY2ll IGdyb3VwIGluIDIsIGFzIGF0IGhhcmR3YXJlIGxldmVsIHRoZXkgY2FuIGJlCmNvbmZpZ3VyZWQg c2VwYXJhdGVseV0KU2lnbmVkLW9mZi1ieTogTWFyZWsgQmVow7puIDxtYXJlay5iZWh1bkBuaWMu Y3o+ClNpZ25lZC1vZmYtYnk6IEdyZWdvcnkgQ0xFTUVOVCA8Z3JlZ29yeS5jbGVtZW50QGJvb3Rs aW4uY29tPgotLS0KIC4uLi9waW5jdHJsL21hcnZlbGwsYXJtYWRhLTM3eHgtcGluY3RybC50eHQg ICAgfCAxOCArKysrKysrKysrKysrLS0tLS0KIGRyaXZlcnMvcGluY3RybC9tdmVidS9waW5jdHJs LWFybWFkYS0zN3h4LmMgICAgfCAxMCArKysrKystLS0tCiAyIGZpbGVzIGNoYW5nZWQsIDE5IGlu c2VydGlvbnMoKyksIDkgZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvRG9jdW1lbnRhdGlvbi9k ZXZpY2V0cmVlL2JpbmRpbmdzL3BpbmN0cmwvbWFydmVsbCxhcm1hZGEtMzd4eC1waW5jdHJsLnR4 dCBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9waW5jdHJsL21hcnZlbGwsYXJt YWRhLTM3eHgtcGluY3RybC50eHQKaW5kZXggYzdjMDg4ZDJkZDUwLi5mNjlmODI3NDFjYWUgMTAw NjQ0Ci0tLSBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9waW5jdHJsL21hcnZl bGwsYXJtYWRhLTM3eHgtcGluY3RybC50eHQKKysrIGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVl L2JpbmRpbmdzL3BpbmN0cmwvbWFydmVsbCxhcm1hZGEtMzd4eC1waW5jdHJsLnR4dApAQCAtNTgs MTEgKzU4LDExIEBAIGdyb3VwIHB3bTMKICAtIGZ1bmN0aW9ucyBwd20sIGdwaW8KIAogZ3JvdXAg cG1pYzEKLSAtIHBpbiAxNworIC0gcGluIDcKICAtIGZ1bmN0aW9ucyBwbWljLCBncGlvCiAKIGdy b3VwIHBtaWMwCi0gLSBwaW4gMTYKKyAtIHBpbiA2CiAgLSBmdW5jdGlvbnMgcG1pYywgZ3Bpbwog CiBncm91cCBpMmMyCkBAIC0xMTIsMTcgKzExMiwyNSBAQCBncm91cCB1c2IyX2RydnZidXMxCiAg LSBmdW5jdGlvbnMgZHJ2YnVzLCBncGlvCiAKIGdyb3VwIHNkaW9fc2IKLSAtIHBpbnMgNjAtNjQK KyAtIHBpbnMgNjAtNjUKICAtIGZ1bmN0aW9ucyBzZGlvLCBncGlvCiAKIGdyb3VwIHJnbWlpCi0g LSBwaW5zIDQyLTU1CisgLSBwaW5zIDQyLTUzCiAgLSBmdW5jdGlvbnMgbWlpLCBncGlvCiAKIGdy b3VwIHBjaWUxCi0gLSBwaW5zIDM5LTQwCisgLSBwaW5zIDM5CisgLSBmdW5jdGlvbnMgcGNpZSwg Z3BpbworCitncm91cCBwY2llMV9jbGtyZXEKKyAtIHBpbnMgNDAKICAtIGZ1bmN0aW9ucyBwY2ll LCBncGlvCiAKK2dyb3VwIHNtaQorIC0gcGlucyA1NC01NQorIC0gZnVuY3Rpb25zIHNtaSwgZ3Bp bworCiBncm91cCBwdHAKICAtIHBpbnMgNTYtNTgKICAtIGZ1bmN0aW9ucyBwdHAsIGdwaW8KZGlm ZiAtLWdpdCBhL2RyaXZlcnMvcGluY3RybC9tdmVidS9waW5jdHJsLWFybWFkYS0zN3h4LmMgYi9k cml2ZXJzL3BpbmN0cmwvbXZlYnUvcGluY3RybC1hcm1hZGEtMzd4eC5jCmluZGV4IGFhNDhiM2Yy M2M3Zi4uMjY3ZGZjNTMwOTg1IDEwMDY0NAotLS0gYS9kcml2ZXJzL3BpbmN0cmwvbXZlYnUvcGlu Y3RybC1hcm1hZGEtMzd4eC5jCisrKyBiL2RyaXZlcnMvcGluY3RybC9tdmVidS9waW5jdHJsLWFy bWFkYS0zN3h4LmMKQEAgLTE3MCw4ICsxNzAsOCBAQCBzdGF0aWMgc3RydWN0IGFybWFkYV8zN3h4 X3Bpbl9ncm91cCBhcm1hZGFfMzd4eF9uYl9ncm91cHNbXSA9IHsKIAlQSU5fR1JQX0dQSU8oInB3 bTEiLCAxMiwgMSwgQklUKDQpLCAicHdtIiksCiAJUElOX0dSUF9HUElPKCJwd20yIiwgMTMsIDEs IEJJVCg1KSwgInB3bSIpLAogCVBJTl9HUlBfR1BJTygicHdtMyIsIDE0LCAxLCBCSVQoNiksICJw d20iKSwKLQlQSU5fR1JQX0dQSU8oInBtaWMxIiwgMTcsIDEsIEJJVCg3KSwgInBtaWMiKSwKLQlQ SU5fR1JQX0dQSU8oInBtaWMwIiwgMTYsIDEsIEJJVCg4KSwgInBtaWMiKSwKKwlQSU5fR1JQX0dQ SU8oInBtaWMxIiwgNywgMSwgQklUKDcpLCAicG1pYyIpLAorCVBJTl9HUlBfR1BJTygicG1pYzAi LCA2LCAxLCBCSVQoOCksICJwbWljIiksCiAJUElOX0dSUF9HUElPKCJpMmMyIiwgMiwgMiwgQklU KDkpLCAiaTJjIiksCiAJUElOX0dSUF9HUElPKCJpMmMxIiwgMCwgMiwgQklUKDEwKSwgImkyYyIp LAogCVBJTl9HUlBfR1BJTygic3BpX2NzMSIsIDE3LCAxLCBCSVQoMTIpLCAic3BpIiksCkBAIC0x OTUsOCArMTk1LDEwIEBAIHN0YXRpYyBzdHJ1Y3QgYXJtYWRhXzM3eHhfcGluX2dyb3VwIGFybWFk YV8zN3h4X3NiX2dyb3Vwc1tdID0gewogCVBJTl9HUlBfR1BJTygidXNiMl9kcnZ2YnVzMSIsIDEs IDEsIEJJVCgxKSwgImRydmJ1cyIpLAogCVBJTl9HUlBfR1BJTygic2Rpb19zYiIsIDI0LCA2LCBC SVQoMiksICJzZGlvIiksCiAJUElOX0dSUF9HUElPKCJyZ21paSIsIDYsIDEyLCBCSVQoMyksICJt aWkiKSwKLQlQSU5fR1JQX0dQSU8oInBjaWUxIiwgMywgMiwgQklUKDQpLCAicGNpZSIpLAotCVBJ Tl9HUlBfR1BJTygicHRwIiwgMjAsIDMsIEJJVCg1KSwgInB0cCIpLAorCVBJTl9HUlBfR1BJTygi c21pIiwgMTgsIDIsIEJJVCg0KSwgInNtaSIpLAorCVBJTl9HUlBfR1BJTygicGNpZTEiLCAzLCAx LCBCSVQoNSksICJwY2llIiksCisJUElOX0dSUF9HUElPKCJwY2llMV9jbGtyZXEiLCA0LCAxLCBC SVQoOSksICJwY2llIiksCisJUElOX0dSUF9HUElPKCJwdHAiLCAyMCwgMywgQklUKDExKSB8IEJJ VCgxMikgfCBCSVQoMTMpLCAicHRwIiksCiAJUElOX0dSUCgicHRwX2NsayIsIDIxLCAxLCBCSVQo NiksICJwdHAiLCAibWlpIiksCiAJUElOX0dSUCgicHRwX3RyaWciLCAyMiwgMSwgQklUKDcpLCAi cHRwIiwgIm1paSIpLAogCVBJTl9HUlBfR1BJT18zKCJtaWlfY29sIiwgMjMsIDEsIEJJVCg4KSB8 IEJJVCgxNCksIDAsIEJJVCg4KSwgQklUKDE0KSwKLS0gCjIuMTkuMgoKCl9fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGlu ZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMu aW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK