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Thu, 03 Jan 2019 15:02:11 -0800 (PST) Received: from localhost ([24.51.61.172]) by smtp.gmail.com with ESMTPSA id e10sm24924755ioa.65.2019.01.03.15.02.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jan 2019 15:02:10 -0800 (PST) Date: Thu, 3 Jan 2019 17:02:09 -0600 From: Rob Herring To: Martin Blumenstingl Subject: Re: [PATCH 1/2] dt-bindings: iio: adc: meson-saradc: update temperature sensor support Message-ID: <20190103230209.GA21801@bogus> References: <20181227215020.9803-1-martin.blumenstingl@googlemail.com> <20181227215020.9803-2-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20181227215020.9803-2-martin.blumenstingl@googlemail.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190103_150212_480391_EA590CF5 X-CRM114-Status: GOOD ( 11.31 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, lars@metafoo.de, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, balbes-150@yandex.ru, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, pmeerw@pmeerw.net, linux-amlogic@lists.infradead.org, Martin Blumenstingl , jic23@kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Thu, 27 Dec 2018 22:50:19 +0100, Martin Blumenstingl wrote: > Meson8b and Meson8m2 use a 5-bit wide TSC (temperature sensor > coefficient). The SAR ADC registers however can only store (the lower) > 4 bits. The fifth (upper-most) bit is stored inside the > MESON_HHI_DPLL_TOP_0[9] register from the HHI register area. > This adds a syscon property to the HHI register area so a driver can > fetch the HHI register map and store the fifth TSC bit in there. > > Signed-off-by: Martin Blumenstingl > --- > .../devicetree/bindings/iio/adc/amlogic,meson-saradc.txt | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Rob Herring _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS, URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 298C9C43387 for ; Thu, 3 Jan 2019 23:02:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D485C21479 for ; Thu, 3 Jan 2019 23:02:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1546556532; bh=kJ2Hunfp569kJV49JwV3xKdKpOapLl4fXgttjC8EGQk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=hRhtrxVpjzU38VFI5J18fsxvu8bfOzE72nxY2dLlFsSJ8xOYYQeWwIQDcnGGT2cP7 LbHU71wpyNpBjTtCaqqQQFnsmcuRwPmWw2BB68jWHPRWMfZ9+Nu1mt9DTBUY/fWCff gVeZE4PSMKV+WrXWZ6lGKmGwVmVGKxFGbIllTXmA= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726232AbfACXCM (ORCPT ); Thu, 3 Jan 2019 18:02:12 -0500 Received: from mail-it1-f194.google.com ([209.85.166.194]:55887 "EHLO mail-it1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726154AbfACXCM (ORCPT ); Thu, 3 Jan 2019 18:02:12 -0500 Received: by mail-it1-f194.google.com with SMTP id m62so47538812ith.5; Thu, 03 Jan 2019 15:02:11 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=+yAuDYqw26SUmzh667+nR4C2OZufSpiblcwZrq/i1zA=; b=d8Uwr65fFxfPqB9dAWlBDbTXThqQckbPjAPAgTeqQBKlwOtSIiGlLJftlnV8gx4NK6 mw91ElYeGSfxvxFE3tuedMJeursId6n30/YxsH+8Gkdd4DiQI1TdPRp8AuvJibB6C19L h7gyxh3664G7cFyIeuURcck2DHo9zV0yOl2pzD794/P82+VjrfRQzbIWM5zye4JHSUeC G3i6aE7UblRkFxrbmxW9xjjOAya/MZnumYU+Itib77BX93b378BVo8sJF2VihM3vzrHb odwOP98KbkPQONItWOzKpzpp+PsJ6i26HbYc2ieMynkHq0I4e8KoRR5ijNS5ID3/hbHQ 8MUA== X-Gm-Message-State: AJcUukd2J9ggd8yHk16wn5P9OlliNYYi2+FBwJGUt2Ps/7DjGGOCy/lW VkaaKJTPfnNlXkRzNFj2dw== X-Google-Smtp-Source: ALg8bN5Ij/GIIondPWfkSo9lM06JUFqag+j9dPGudwxneaKXEAKPgiAfTIBMWYgwJkNtMpTdCbUQdA== X-Received: by 2002:a24:6115:: with SMTP id s21mr31253483itc.62.1546556531148; Thu, 03 Jan 2019 15:02:11 -0800 (PST) Received: from localhost ([24.51.61.172]) by smtp.gmail.com with ESMTPSA id e10sm24924755ioa.65.2019.01.03.15.02.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jan 2019 15:02:10 -0800 (PST) Date: Thu, 3 Jan 2019 17:02:09 -0600 From: Rob Herring To: Martin Blumenstingl Cc: linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-iio@vger.kernel.org, jic23@kernel.org, lars@metafoo.de, pmeerw@pmeerw.net, robh+dt@kernel.org, mark.rutland@arm.com, balbes-150@yandex.ru, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: Re: [PATCH 1/2] dt-bindings: iio: adc: meson-saradc: update temperature sensor support Message-ID: <20190103230209.GA21801@bogus> References: <20181227215020.9803-1-martin.blumenstingl@googlemail.com> <20181227215020.9803-2-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181227215020.9803-2-martin.blumenstingl@googlemail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org On Thu, 27 Dec 2018 22:50:19 +0100, Martin Blumenstingl wrote: > Meson8b and Meson8m2 use a 5-bit wide TSC (temperature sensor > coefficient). The SAR ADC registers however can only store (the lower) > 4 bits. The fifth (upper-most) bit is stored inside the > MESON_HHI_DPLL_TOP_0[9] register from the HHI register area. > This adds a syscon property to the HHI register area so a driver can > fetch the HHI register map and store the fifth TSC bit in there. > > Signed-off-by: Martin Blumenstingl > --- > .../devicetree/bindings/iio/adc/amlogic,meson-saradc.txt | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Rob Herring From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CD2FC43387 for ; Thu, 3 Jan 2019 23:02:20 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 198C621479 for ; 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Thu, 03 Jan 2019 15:02:11 -0800 (PST) Received: from localhost ([24.51.61.172]) by smtp.gmail.com with ESMTPSA id e10sm24924755ioa.65.2019.01.03.15.02.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jan 2019 15:02:10 -0800 (PST) Date: Thu, 3 Jan 2019 17:02:09 -0600 From: Rob Herring To: Martin Blumenstingl Subject: Re: [PATCH 1/2] dt-bindings: iio: adc: meson-saradc: update temperature sensor support Message-ID: <20190103230209.GA21801@bogus> References: <20181227215020.9803-1-martin.blumenstingl@googlemail.com> <20181227215020.9803-2-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20181227215020.9803-2-martin.blumenstingl@googlemail.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190103_150212_480391_EA590CF5 X-CRM114-Status: GOOD ( 11.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, lars@metafoo.de, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, balbes-150@yandex.ru, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, pmeerw@pmeerw.net, linux-amlogic@lists.infradead.org, Martin Blumenstingl , jic23@kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 27 Dec 2018 22:50:19 +0100, Martin Blumenstingl wrote: > Meson8b and Meson8m2 use a 5-bit wide TSC (temperature sensor > coefficient). The SAR ADC registers however can only store (the lower) > 4 bits. The fifth (upper-most) bit is stored inside the > MESON_HHI_DPLL_TOP_0[9] register from the HHI register area. > This adds a syscon property to the HHI register area so a driver can > fetch the HHI register map and store the fifth TSC bit in there. > > Signed-off-by: Martin Blumenstingl > --- > .../devicetree/bindings/iio/adc/amlogic,meson-saradc.txt | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Rob Herring _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH 1/2] dt-bindings: iio: adc: meson-saradc: update temperature sensor support Date: Thu, 3 Jan 2019 17:02:09 -0600 Message-ID: <20190103230209.GA21801@bogus> References: <20181227215020.9803-1-martin.blumenstingl@googlemail.com> <20181227215020.9803-2-martin.blumenstingl@googlemail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20181227215020.9803-2-martin.blumenstingl@googlemail.com> Sender: linux-kernel-owner@vger.kernel.org Cc: linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-iio@vger.kernel.org, jic23@kernel.org, lars@metafoo.de, pmeerw@pmeerw.net, robh+dt@kernel.org, mark.rutland@arm.com, balbes-150@yandex.ru, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl List-Id: devicetree@vger.kernel.org On Thu, 27 Dec 2018 22:50:19 +0100, Martin Blumenstingl wrote: > Meson8b and Meson8m2 use a 5-bit wide TSC (temperature sensor > coefficient). The SAR ADC registers however can only store (the lower) > 4 bits. The fifth (upper-most) bit is stored inside the > MESON_HHI_DPLL_TOP_0[9] register from the HHI register area. > This adds a syscon property to the HHI register area so a driver can > fetch the HHI register map and store the fifth TSC bit in there. > > Signed-off-by: Martin Blumenstingl > --- > .../devicetree/bindings/iio/adc/amlogic,meson-saradc.txt | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Rob Herring