From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Hans de Goede <hdegoede@redhat.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
linux-acpi@vger.kernel.org, Rodrigo Vivi <rodrigo.vivi@intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Len Brown <lenb@kernel.org>
Subject: Re: [PATCH v6 4/4] drm/i915/intel_dsi_vbt: Add support for PMIC MIPI sequences
Date: Mon, 7 Jan 2019 17:31:19 +0200 [thread overview]
Message-ID: <20190107153119.GQ20097@intel.com> (raw)
In-Reply-To: <20190107111556.4510-5-hdegoede@redhat.com>
On Mon, Jan 07, 2019 at 12:15:56PM +0100, Hans de Goede wrote:
> Add support for PMIC MIPI sequences using the new
> intel_soc_pmic_exec_mipi_pmic_seq_element function.
>
> This fixes the DSI LCD panel not lighting up when not initialized by the
> GOP (because an external monitor was connected) on GPD win and GPD pocket
> devices.
>
> Specifically the LCD panel seems to need GPIO pin 9 on the PMIC to be
> driven high, which is done through a PMIC MIPI sequence. Before this commit
> if the sequence was not executed by the GOP the pin would stay low causing
> the LCD panel to not work. Having the MIPI sequences properly control this
> GPIO should also help save some power when the panel is off.
>
> Changes in v2, v3:
> -Only changes to other patches in this patch-set
>
> Changes in v4:
> -Move decoding of the raw 15 bytes PMIC MIPI sequence element into
> i2c-address, register-address, value and mask into the mipi_exec_pmic()
> function instead of passing the raw data to
> intel_soc_pmic_exec_mipi_pmic_seq_element()
>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_dsi_vbt.c | 22 +++++++++++++++++++++-
> 1 file changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c b/drivers/gpu/drm/i915/intel_dsi_vbt.c
> index 3d1fa1a03a66..240664ef294c 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
> @@ -29,9 +29,11 @@
> #include <drm/drm_edid.h>
> #include <drm/i915_drm.h>
> #include <linux/gpio/consumer.h>
> +#include <linux/mfd/intel_soc_pmic.h>
> #include <linux/slab.h>
> #include <video/mipi_display.h>
> #include <asm/intel-mid.h>
> +#include <asm/unaligned.h>
> #include "i915_drv.h"
> #include "intel_drv.h"
> #include "intel_dsi.h"
> @@ -392,7 +394,25 @@ static const u8 *mipi_exec_spi(struct intel_dsi *intel_dsi, const u8 *data)
>
> static const u8 *mipi_exec_pmic(struct intel_dsi *intel_dsi, const u8 *data)
> {
> - DRM_DEBUG_KMS("Skipping PMIC element execution\n");
> +#ifdef CONFIG_PMIC_OPREGION
> + u32 value, mask, reg_address;
> + u16 i2c_address;
> + int ret;
> +
> + /* byte 0 aka PMIC Flag is reserved */
> + i2c_address = get_unaligned_le16(data + 1);
> + reg_address = get_unaligned_le32(data + 3);
> + value = get_unaligned_le32(data + 7);
> + mask = get_unaligned_le32(data + 11);
> +
> + ret = intel_soc_pmic_exec_mipi_pmic_seq_element(i2c_address,
> + reg_address,
> + value, mask);
> + if (ret)
> + DRM_ERROR("%s failed, error: %d\n", __func__, ret);
> +#else
> + DRM_ERROR("Your hardware requires CONFIG_PMIC_OPREGION and it is not set\n");
> +#endif
>
> return data + 15;
> }
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-01-07 15:31 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-07 11:15 [PATCH v6 0/4] ACPI/i915: Add support for PMIC MIPI sequence elements Hans de Goede
2019-01-07 11:15 ` [PATCH v6 1/4] ACPI / PMIC: Add support for executing " Hans de Goede
2019-01-07 15:35 ` Andy Shevchenko
2019-01-08 13:40 ` Hans de Goede
2019-01-07 11:15 ` [PATCH v6 2/4] ACPI / PMIC: Implement exec_mipi_pmic_seq_element for CHT Whiskey Cove PMIC Hans de Goede
2019-01-07 15:38 ` Andy Shevchenko
2019-01-07 11:15 ` [PATCH v6 3/4] ACPI / PMIC: Add generic intel_soc_pmic_exec_mipi_pmic_seq_element handling Hans de Goede
2019-01-07 15:31 ` Ville Syrjälä
2019-01-07 15:46 ` Andy Shevchenko
2019-01-08 13:45 ` Hans de Goede
2019-01-08 14:51 ` Andy Shevchenko
2019-01-08 15:35 ` Hans de Goede
2019-01-08 17:33 ` Andy Shevchenko
2019-01-09 9:26 ` Hans de Goede
2019-01-07 11:15 ` [PATCH v6 4/4] drm/i915/intel_dsi_vbt: Add support for PMIC MIPI sequences Hans de Goede
2019-01-07 15:31 ` Ville Syrjälä [this message]
2019-01-09 9:40 ` Hans de Goede
2019-01-07 12:47 ` ✓ Fi.CI.BAT: success for ACPI/i915: Add support for PMIC MIPI sequence elements (rev2) Patchwork
2019-01-07 16:19 ` ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190107153119.GQ20097@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=andriy.shevchenko@linux.intel.com \
--cc=hdegoede@redhat.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=mika.westerberg@linux.intel.com \
--cc=rjw@rjwysocki.net \
--cc=rodrigo.vivi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.