From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0AC9C43387 for ; Thu, 10 Jan 2019 19:25:39 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A279920651 for ; Thu, 10 Jan 2019 19:25:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="cedQUStz"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="fIJpWIzw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A279920651 Authentication-Results: mail.kernel.org; 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1ghfxS-0002UJ-5L; Thu, 10 Jan 2019 19:25:38 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1ghfxN-0002TM-9o for linux-arm-kernel@lists.infradead.org; Thu, 10 Jan 2019 19:25:36 +0000 Received: from bbrezillon (91-160-177-164.subs.proxad.net [91.160.177.164]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8B8C220651; Thu, 10 Jan 2019 19:25:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1547148331; bh=/vR7LskhHHSTMwzevIJBqkXpkfEf+ABm3ogsIzBsb7A=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=fIJpWIzwCdjQEVAZMDq4Sh4f4Spa7TVjYDR++txQnfi9dt8G1NrWTnSCC1pXE1Wz6 kCe+BtkENC9yf+/aKLqxIFroKdM6mQkex7hzm3e0NGbrPp1sFTNuX1cpuQgZqf74Zd ZQFaqlTSB/hfEdogklntQVSZCa3sSBn2T1IPHfBc= Date: Thu, 10 Jan 2019 20:25:22 +0100 From: Boris Brezillon To: Peter Rosin Subject: Re: [PATCH 4/4] drm/atmel-hlcdc: do not immediately disable planes, wait for next frame Message-ID: <20190110202522.10206f2d@bbrezillon> In-Reply-To: References: <20190110151020.30468-1-peda@axentia.se> <20190110151020.30468-5-peda@axentia.se> <20190110182904.5efd08f2@bbrezillon> X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190110_112534_319680_5DDB93C7 X-CRM114-Status: GOOD ( 19.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Belloni , David Airlie , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Boris Brezillon , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 10 Jan 2019 18:51:21 +0000 Peter Rosin wrote: > On 2019-01-10 18:29, Boris Brezillon wrote: > > On Thu, 10 Jan 2019 15:10:48 +0000 > > Peter Rosin wrote: > > > >> The A2Q and UPDATE bits have no effect in the channel disable registers. > >> However, since they are present, assume that the intention is to disable > >> planes, not immediately as indicated by the RST bit, but on the next > >> frame shift since that is what A2Q and UPDATE means in the channel enable > >> registers. > >> > >> Disabling the plane on the next frame shift is done with the EN bit, > >> so use that. > > > > It's been a long time, but I think I had a good reason for forcing a > > reset. IIRC, when you don't do that and the CRTC is disabled before the > > plane, the EN bit stays around, and next time you queue a plane update, > > you'll start with an invalid buf pointer. > > It might be possible to clear the EN bit in ...CHDR before enabling the > plane in ...CHER. Or is that too late? I think I tried that, but I'm not sure (BTW, this change was done in bd4248bb5e8b ("drm: atmel-hlcdc: reset layer A2Q and UPDATE bits when disabling it")). Anyway, I'm not even sure this is still needed now that atomic updates have a wait_for_flip_done/vblank() in the commit path. > But this patch is not overly > important, I just wanted to avoid the resulting "black hole" when the > plane DMA is disabled mid-frame. But disabling planes is probably not > something that happens frequently and will perhaps not be noticed at > all... Okay. Other patches look good to me, I'm just waiting for Nicolas feedback before applying them. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 From: Boris Brezillon Subject: Re: [PATCH 4/4] drm/atmel-hlcdc: do not immediately disable planes, wait for next frame Date: Thu, 10 Jan 2019 20:25:22 +0100 Message-ID: <20190110202522.10206f2d@bbrezillon> References: <20190110151020.30468-1-peda@axentia.se> <20190110151020.30468-5-peda@axentia.se> <20190110182904.5efd08f2@bbrezillon> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id D5B6E6F415 for ; Thu, 10 Jan 2019 19:25:31 +0000 (UTC) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Peter Rosin Cc: Alexandre Belloni , David Airlie , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Nicolas Ferre , Boris Brezillon , "linux-arm-kernel@lists.infradead.org" List-Id: dri-devel@lists.freedesktop.org T24gVGh1LCAxMCBKYW4gMjAxOSAxODo1MToyMSArMDAwMApQZXRlciBSb3NpbiA8cGVkYUBheGVu dGlhLnNlPiB3cm90ZToKCj4gT24gMjAxOS0wMS0xMCAxODoyOSwgQm9yaXMgQnJlemlsbG9uIHdy b3RlOgo+ID4gT24gVGh1LCAxMCBKYW4gMjAxOSAxNToxMDo0OCArMDAwMAo+ID4gUGV0ZXIgUm9z aW4gPHBlZGFAYXhlbnRpYS5zZT4gd3JvdGU6Cj4gPiAgIAo+ID4+IFRoZSBBMlEgYW5kIFVQREFU RSBiaXRzIGhhdmUgbm8gZWZmZWN0IGluIHRoZSBjaGFubmVsIGRpc2FibGUgcmVnaXN0ZXJzLgo+ ID4+IEhvd2V2ZXIsIHNpbmNlIHRoZXkgYXJlIHByZXNlbnQsIGFzc3VtZSB0aGF0IHRoZSBpbnRl bnRpb24gaXMgdG8gZGlzYWJsZQo+ID4+IHBsYW5lcywgbm90IGltbWVkaWF0ZWx5IGFzIGluZGlj YXRlZCBieSB0aGUgUlNUIGJpdCwgYnV0IG9uIHRoZSBuZXh0Cj4gPj4gZnJhbWUgc2hpZnQgc2lu Y2UgdGhhdCBpcyB3aGF0IEEyUSBhbmQgVVBEQVRFIG1lYW5zIGluIHRoZSBjaGFubmVsIGVuYWJs ZQo+ID4+IHJlZ2lzdGVycy4KPiA+Pgo+ID4+IERpc2FibGluZyB0aGUgcGxhbmUgb24gdGhlIG5l eHQgZnJhbWUgc2hpZnQgaXMgZG9uZSB3aXRoIHRoZSBFTiBiaXQsCj4gPj4gc28gdXNlIHRoYXQu ICAKPiA+IAo+ID4gSXQncyBiZWVuIGEgbG9uZyB0aW1lLCBidXQgSSB0aGluayBJIGhhZCBhIGdv b2QgcmVhc29uIGZvciBmb3JjaW5nIGEKPiA+IHJlc2V0LiBJSVJDLCB3aGVuIHlvdSBkb24ndCBk byB0aGF0IGFuZCB0aGUgQ1JUQyBpcyBkaXNhYmxlZCBiZWZvcmUgdGhlCj4gPiBwbGFuZSwgdGhl IEVOIGJpdCBzdGF5cyBhcm91bmQsIGFuZCBuZXh0IHRpbWUgeW91IHF1ZXVlIGEgcGxhbmUgdXBk YXRlLAo+ID4geW91J2xsIHN0YXJ0IHdpdGggYW4gaW52YWxpZCBidWYgcG9pbnRlci4gIAo+IAo+ IEl0IG1pZ2h0IGJlIHBvc3NpYmxlIHRvIGNsZWFyIHRoZSBFTiBiaXQgaW4gLi4uQ0hEUiBiZWZv cmUgZW5hYmxpbmcgdGhlCj4gcGxhbmUgaW4gLi4uQ0hFUi4gT3IgaXMgdGhhdCB0b28gbGF0ZT8K CkkgdGhpbmsgSSB0cmllZCB0aGF0LCBidXQgSSdtIG5vdCBzdXJlIChCVFcsIHRoaXMgY2hhbmdl IHdhcyBkb25lIGluCmJkNDI0OGJiNWU4YiAoImRybTogYXRtZWwtaGxjZGM6IHJlc2V0IGxheWVy IEEyUSBhbmQgVVBEQVRFIGJpdHMgd2hlbgpkaXNhYmxpbmcgaXQiKSkuIEFueXdheSwgSSdtIG5v dCBldmVuIHN1cmUgdGhpcyBpcyBzdGlsbCBuZWVkZWQgbm93CnRoYXQgYXRvbWljIHVwZGF0ZXMg aGF2ZSBhIHdhaXRfZm9yX2ZsaXBfZG9uZS92YmxhbmsoKSBpbiB0aGUgY29tbWl0CnBhdGguCgo+ IEJ1dCB0aGlzIHBhdGNoIGlzIG5vdCBvdmVybHkKPiBpbXBvcnRhbnQsIEkganVzdCB3YW50ZWQg dG8gYXZvaWQgdGhlIHJlc3VsdGluZyAiYmxhY2sgaG9sZSIgd2hlbiB0aGUKPiBwbGFuZSBETUEg aXMgZGlzYWJsZWQgbWlkLWZyYW1lLiBCdXQgZGlzYWJsaW5nIHBsYW5lcyBpcyBwcm9iYWJseSBu b3QKPiBzb21ldGhpbmcgdGhhdCBoYXBwZW5zIGZyZXF1ZW50bHkgYW5kIHdpbGwgcGVyaGFwcyBu b3QgYmUgbm90aWNlZCBhdAo+IGFsbC4uLgoKT2theS4gT3RoZXIgcGF0Y2hlcyBsb29rIGdvb2Qg dG8gbWUsIEknbSBqdXN0IHdhaXRpbmcgZm9yIE5pY29sYXMKZmVlZGJhY2sgYmVmb3JlIGFwcGx5 aW5nIHRoZW0uCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f CmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpo dHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01569C43387 for ; Thu, 10 Jan 2019 19:25:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C15A4213F2 for ; Thu, 10 Jan 2019 19:25:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1547148333; bh=/vR7LskhHHSTMwzevIJBqkXpkfEf+ABm3ogsIzBsb7A=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=fnI+5Zn70jKiWeFcwqWPcaWv5994PnZjIqq5/MKtckKyQwCAWfQxOlZJnAbEhAYwN NBtY1P9GVmMp0FbAgOmGxcE+6jIXfP1bPyXfEavrgTFY4SVvIXFFd9MpAjzFygTGrW /03F3i/nb1h1NHZ/pPcRJ4BjSUpGhiFBEX8gbP+o= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729465AbfAJTZd (ORCPT ); Thu, 10 Jan 2019 14:25:33 -0500 Received: from mail.kernel.org ([198.145.29.99]:47940 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728572AbfAJTZc (ORCPT ); Thu, 10 Jan 2019 14:25:32 -0500 Received: from bbrezillon (91-160-177-164.subs.proxad.net [91.160.177.164]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8B8C220651; Thu, 10 Jan 2019 19:25:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1547148331; bh=/vR7LskhHHSTMwzevIJBqkXpkfEf+ABm3ogsIzBsb7A=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=fIJpWIzwCdjQEVAZMDq4Sh4f4Spa7TVjYDR++txQnfi9dt8G1NrWTnSCC1pXE1Wz6 kCe+BtkENC9yf+/aKLqxIFroKdM6mQkex7hzm3e0NGbrPp1sFTNuX1cpuQgZqf74Zd ZQFaqlTSB/hfEdogklntQVSZCa3sSBn2T1IPHfBc= Date: Thu, 10 Jan 2019 20:25:22 +0100 From: Boris Brezillon To: Peter Rosin Cc: Alexandre Belloni , David Airlie , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Boris Brezillon , "linux-arm-kernel@lists.infradead.org" , Nicolas Ferre Subject: Re: [PATCH 4/4] drm/atmel-hlcdc: do not immediately disable planes, wait for next frame Message-ID: <20190110202522.10206f2d@bbrezillon> In-Reply-To: References: <20190110151020.30468-1-peda@axentia.se> <20190110151020.30468-5-peda@axentia.se> <20190110182904.5efd08f2@bbrezillon> X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 10 Jan 2019 18:51:21 +0000 Peter Rosin wrote: > On 2019-01-10 18:29, Boris Brezillon wrote: > > On Thu, 10 Jan 2019 15:10:48 +0000 > > Peter Rosin wrote: > > > >> The A2Q and UPDATE bits have no effect in the channel disable registers. > >> However, since they are present, assume that the intention is to disable > >> planes, not immediately as indicated by the RST bit, but on the next > >> frame shift since that is what A2Q and UPDATE means in the channel enable > >> registers. > >> > >> Disabling the plane on the next frame shift is done with the EN bit, > >> so use that. > > > > It's been a long time, but I think I had a good reason for forcing a > > reset. IIRC, when you don't do that and the CRTC is disabled before the > > plane, the EN bit stays around, and next time you queue a plane update, > > you'll start with an invalid buf pointer. > > It might be possible to clear the EN bit in ...CHDR before enabling the > plane in ...CHER. Or is that too late? I think I tried that, but I'm not sure (BTW, this change was done in bd4248bb5e8b ("drm: atmel-hlcdc: reset layer A2Q and UPDATE bits when disabling it")). Anyway, I'm not even sure this is still needed now that atomic updates have a wait_for_flip_done/vblank() in the commit path. > But this patch is not overly > important, I just wanted to avoid the resulting "black hole" when the > plane DMA is disabled mid-frame. But disabling planes is probably not > something that happens frequently and will perhaps not be noticed at > all... Okay. Other patches look good to me, I'm just waiting for Nicolas feedback before applying them.