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Fri, 18 Jan 2019 10:59:18 -0500 (EST) Date: Fri, 18 Jan 2019 16:59:16 +0100 From: Greg KH To: Georgi Djakov Cc: stable@vger.kernel.org, loic.poulain@linaro.org Subject: Re: [PATCH 4.14] mmc: sdhci-msm: Disable CDR function on TX Message-ID: <20190118155916.GA11503@kroah.com> References: <20190118134000.14707-1-georgi.djakov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190118134000.14707-1-georgi.djakov@linaro.org> User-Agent: Mutt/1.11.2 (2019-01-07) Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On Fri, Jan 18, 2019 at 03:39:59PM +0200, Georgi Djakov wrote: > From: Loic Poulain > > commit a89e7bcb18081c611eb6cf50edd440fa4983a71a upstream. > > The Clock Data Recovery (CDR) circuit allows to automatically adjust > the RX sampling-point/phase for high frequency cards (SDR104, HS200...). > CDR is automatically enabled during DLL configuration. > However, according to the APQ8016 reference manual, this function > must be disabled during TX and tuning phase in order to prevent any > interferences during tuning challenges and unexpected phase alteration > during TX transfers. > > This patch enables/disables CDR according to the current transfer mode. > > This fixes sporadic write transfer issues observed with some SDR104 and > HS200 cards. > > Inspired by sdhci-msm downstream patch: > https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/432516/ > > Reported-by: Leonid Segal > Reported-by: Manabu Igusa > Signed-off-by: Loic Poulain > Acked-by: Adrian Hunter > Acked-by: Georgi Djakov > Signed-off-by: Ulf Hansson > [georgi: backport to v4.14] > Signed-off-by: Georgi Djakov Both patches now applied, thanks. greg k-h