From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: [PATCH 2/6] usb: host: xhci-tegra: Selectively program IPFS Date: Fri, 25 Jan 2019 12:30:09 +0100 Message-ID: <20190125113013.11447-2-thierry.reding@gmail.com> References: <20190125113013.11447-1-thierry.reding@gmail.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20190125113013.11447-1-thierry.reding@gmail.com> Sender: linux-kernel-owner@vger.kernel.org To: Greg Kroah-Hartman Cc: Mathias Nyman , Jon Hunter , JC Kuo , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org List-Id: linux-tegra@vger.kernel.org From: JC Kuo Starting with Tegra186, the XUSB controller no longer has the IPFS wrapper. This commit adds a "has_ipfs" field to struct tegra_xusb_soc that can be used to declare the existence of the IPFS wrapper. For the existing chips (i.e. Tegra124 and Tegra210), the new field is set to true. A future patch adding support for Tegra186 will set it to false. Signed-off-by: JC Kuo Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 43 +++++++++++++++++++++-------------- 1 file changed, 26 insertions(+), 17 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 938ff06c0349..49e033f953a2 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -161,6 +161,7 @@ struct tegra_xusb_soc { } ports; bool scale_ss_clock; + bool has_ipfs; }; struct tegra_xusb { @@ -637,16 +638,18 @@ static irqreturn_t tegra_xusb_mbox_thread(int irq, void *data) return IRQ_HANDLED; } -static void tegra_xusb_ipfs_config(struct tegra_xusb *tegra, - struct resource *regs) +static void tegra_xusb_config(struct tegra_xusb *tegra, + struct resource *regs) { u32 value; - value = ipfs_readl(tegra, IPFS_XUSB_HOST_CONFIGURATION_0); - value |= IPFS_EN_FPCI; - ipfs_writel(tegra, value, IPFS_XUSB_HOST_CONFIGURATION_0); + if (tegra->soc->has_ipfs) { + value = ipfs_readl(tegra, IPFS_XUSB_HOST_CONFIGURATION_0); + value |= IPFS_EN_FPCI; + ipfs_writel(tegra, value, IPFS_XUSB_HOST_CONFIGURATION_0); - usleep_range(10, 20); + usleep_range(10, 20); + } /* Program BAR0 space */ value = fpci_readl(tegra, XUSB_CFG_4); @@ -661,13 +664,15 @@ static void tegra_xusb_ipfs_config(struct tegra_xusb *tegra, value |= XUSB_IO_SPACE_EN | XUSB_MEM_SPACE_EN | XUSB_BUS_MASTER_EN; fpci_writel(tegra, value, XUSB_CFG_1); - /* Enable interrupt assertion */ - value = ipfs_readl(tegra, IPFS_XUSB_HOST_INTR_MASK_0); - value |= IPFS_IP_INT_MASK; - ipfs_writel(tegra, value, IPFS_XUSB_HOST_INTR_MASK_0); + if (tegra->soc->has_ipfs) { + /* Enable interrupt assertion */ + value = ipfs_readl(tegra, IPFS_XUSB_HOST_INTR_MASK_0); + value |= IPFS_IP_INT_MASK; + ipfs_writel(tegra, value, IPFS_XUSB_HOST_INTR_MASK_0); - /* Set hysteresis */ - ipfs_writel(tegra, 0x80, IPFS_XUSB_HOST_CLKGATE_HYSTERESIS_0); + /* Set hysteresis */ + ipfs_writel(tegra, 0x80, IPFS_XUSB_HOST_CLKGATE_HYSTERESIS_0); + } } static int tegra_xusb_clk_enable(struct tegra_xusb *tegra) @@ -1015,10 +1020,12 @@ static int tegra_xusb_probe(struct platform_device *pdev) if (IS_ERR(tegra->fpci_base)) return PTR_ERR(tegra->fpci_base); - res = platform_get_resource(pdev, IORESOURCE_MEM, 2); - tegra->ipfs_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(tegra->ipfs_base)) - return PTR_ERR(tegra->ipfs_base); + if (tegra->soc->has_ipfs) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 2); + tegra->ipfs_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(tegra->ipfs_base)) + return PTR_ERR(tegra->ipfs_base); + } tegra->xhci_irq = platform_get_irq(pdev, 0); if (tegra->xhci_irq < 0) @@ -1208,7 +1215,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto disable_rpm; } - tegra_xusb_ipfs_config(tegra, regs); + tegra_xusb_config(tegra, regs); err = tegra_xusb_load_firmware(tegra); if (err < 0) { @@ -1380,6 +1387,7 @@ static const struct tegra_xusb_soc tegra124_soc = { .usb3 = { .offset = 0, .count = 2, }, }, .scale_ss_clock = true, + .has_ipfs = true, }; MODULE_FIRMWARE("nvidia/tegra124/xusb.bin"); @@ -1411,6 +1419,7 @@ static const struct tegra_xusb_soc tegra210_soc = { .usb3 = { .offset = 0, .count = 4, }, }, .scale_ss_clock = false, + .has_ipfs = true, }; MODULE_FIRMWARE("nvidia/tegra210/xusb.bin"); -- 2.19.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [2/6] usb: host: xhci-tegra: Selectively program IPFS From: Thierry Reding Message-Id: <20190125113013.11447-2-thierry.reding@gmail.com> Date: Fri, 25 Jan 2019 12:30:09 +0100 To: Greg Kroah-Hartman Cc: Mathias Nyman , Jon Hunter , JC Kuo , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org List-ID: RnJvbTogSkMgS3VvIDxqY2t1b0BudmlkaWEuY29tPgoKU3RhcnRpbmcgd2l0aCBUZWdyYTE4Niwg dGhlIFhVU0IgY29udHJvbGxlciBubyBsb25nZXIgaGFzIHRoZSBJUEZTCndyYXBwZXIuIFRoaXMg Y29tbWl0IGFkZHMgYSAiaGFzX2lwZnMiIGZpZWxkIHRvIHN0cnVjdCB0ZWdyYV94dXNiX3NvYwp0 aGF0IGNhbiBiZSB1c2VkIHRvIGRlY2xhcmUgdGhlIGV4aXN0ZW5jZSBvZiB0aGUgSVBGUyB3cmFw cGVyLgoKRm9yIHRoZSBleGlzdGluZyBjaGlwcyAoaS5lLiBUZWdyYTEyNCBhbmQgVGVncmEyMTAp LCB0aGUgbmV3IGZpZWxkIGlzCnNldCB0byB0cnVlLiBBIGZ1dHVyZSBwYXRjaCBhZGRpbmcgc3Vw cG9ydCBmb3IgVGVncmExODYgd2lsbCBzZXQgaXQgdG8KZmFsc2UuCgpTaWduZWQtb2ZmLWJ5OiBK QyBLdW8gPGpja3VvQG52aWRpYS5jb20+ClNpZ25lZC1vZmYtYnk6IFRoaWVycnkgUmVkaW5nIDx0 cmVkaW5nQG52aWRpYS5jb20+Ci0tLQogZHJpdmVycy91c2IvaG9zdC94aGNpLXRlZ3JhLmMgfCA0 MyArKysrKysrKysrKysrKysrKysrKystLS0tLS0tLS0tLS0tLQogMSBmaWxlIGNoYW5nZWQsIDI2 IGluc2VydGlvbnMoKyksIDE3IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvdXNi L2hvc3QveGhjaS10ZWdyYS5jIGIvZHJpdmVycy91c2IvaG9zdC94aGNpLXRlZ3JhLmMKaW5kZXgg OTM4ZmYwNmMwMzQ5Li40OWUwMzNmOTUzYTIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvdXNiL2hvc3Qv eGhjaS10ZWdyYS5jCisrKyBiL2RyaXZlcnMvdXNiL2hvc3QveGhjaS10ZWdyYS5jCkBAIC0xNjEs NiArMTYxLDcgQEAgc3RydWN0IHRlZ3JhX3h1c2Jfc29jIHsKIAl9IHBvcnRzOwogCiAJYm9vbCBz Y2FsZV9zc19jbG9jazsKKwlib29sIGhhc19pcGZzOwogfTsKIAogc3RydWN0IHRlZ3JhX3h1c2Ig ewpAQCAtNjM3LDE2ICs2MzgsMTggQEAgc3RhdGljIGlycXJldHVybl90IHRlZ3JhX3h1c2JfbWJv eF90aHJlYWQoaW50IGlycSwgdm9pZCAqZGF0YSkKIAlyZXR1cm4gSVJRX0hBTkRMRUQ7CiB9CiAK LXN0YXRpYyB2b2lkIHRlZ3JhX3h1c2JfaXBmc19jb25maWcoc3RydWN0IHRlZ3JhX3h1c2IgKnRl Z3JhLAotCQkJCSAgIHN0cnVjdCByZXNvdXJjZSAqcmVncykKK3N0YXRpYyB2b2lkIHRlZ3JhX3h1 c2JfY29uZmlnKHN0cnVjdCB0ZWdyYV94dXNiICp0ZWdyYSwKKwkJCSAgICAgIHN0cnVjdCByZXNv dXJjZSAqcmVncykKIHsKIAl1MzIgdmFsdWU7CiAKLQl2YWx1ZSA9IGlwZnNfcmVhZGwodGVncmEs IElQRlNfWFVTQl9IT1NUX0NPTkZJR1VSQVRJT05fMCk7Ci0JdmFsdWUgfD0gSVBGU19FTl9GUENJ OwotCWlwZnNfd3JpdGVsKHRlZ3JhLCB2YWx1ZSwgSVBGU19YVVNCX0hPU1RfQ09ORklHVVJBVElP Tl8wKTsKKwlpZiAodGVncmEtPnNvYy0+aGFzX2lwZnMpIHsKKwkJdmFsdWUgPSBpcGZzX3JlYWRs KHRlZ3JhLCBJUEZTX1hVU0JfSE9TVF9DT05GSUdVUkFUSU9OXzApOworCQl2YWx1ZSB8PSBJUEZT X0VOX0ZQQ0k7CisJCWlwZnNfd3JpdGVsKHRlZ3JhLCB2YWx1ZSwgSVBGU19YVVNCX0hPU1RfQ09O RklHVVJBVElPTl8wKTsKIAotCXVzbGVlcF9yYW5nZSgxMCwgMjApOworCQl1c2xlZXBfcmFuZ2Uo MTAsIDIwKTsKKwl9CiAKIAkvKiBQcm9ncmFtIEJBUjAgc3BhY2UgKi8KIAl2YWx1ZSA9IGZwY2lf cmVhZGwodGVncmEsIFhVU0JfQ0ZHXzQpOwpAQCAtNjYxLDEzICs2NjQsMTUgQEAgc3RhdGljIHZv aWQgdGVncmFfeHVzYl9pcGZzX2NvbmZpZyhzdHJ1Y3QgdGVncmFfeHVzYiAqdGVncmEsCiAJdmFs dWUgfD0gWFVTQl9JT19TUEFDRV9FTiB8IFhVU0JfTUVNX1NQQUNFX0VOIHwgWFVTQl9CVVNfTUFT VEVSX0VOOwogCWZwY2lfd3JpdGVsKHRlZ3JhLCB2YWx1ZSwgWFVTQl9DRkdfMSk7CiAKLQkvKiBF bmFibGUgaW50ZXJydXB0IGFzc2VydGlvbiAqLwotCXZhbHVlID0gaXBmc19yZWFkbCh0ZWdyYSwg SVBGU19YVVNCX0hPU1RfSU5UUl9NQVNLXzApOwotCXZhbHVlIHw9IElQRlNfSVBfSU5UX01BU0s7 Ci0JaXBmc193cml0ZWwodGVncmEsIHZhbHVlLCBJUEZTX1hVU0JfSE9TVF9JTlRSX01BU0tfMCk7 CisJaWYgKHRlZ3JhLT5zb2MtPmhhc19pcGZzKSB7CisJCS8qIEVuYWJsZSBpbnRlcnJ1cHQgYXNz ZXJ0aW9uICovCisJCXZhbHVlID0gaXBmc19yZWFkbCh0ZWdyYSwgSVBGU19YVVNCX0hPU1RfSU5U Ul9NQVNLXzApOworCQl2YWx1ZSB8PSBJUEZTX0lQX0lOVF9NQVNLOworCQlpcGZzX3dyaXRlbCh0 ZWdyYSwgdmFsdWUsIElQRlNfWFVTQl9IT1NUX0lOVFJfTUFTS18wKTsKIAotCS8qIFNldCBoeXN0 ZXJlc2lzICovCi0JaXBmc193cml0ZWwodGVncmEsIDB4ODAsIElQRlNfWFVTQl9IT1NUX0NMS0dB VEVfSFlTVEVSRVNJU18wKTsKKwkJLyogU2V0IGh5c3RlcmVzaXMgKi8KKwkJaXBmc193cml0ZWwo dGVncmEsIDB4ODAsIElQRlNfWFVTQl9IT1NUX0NMS0dBVEVfSFlTVEVSRVNJU18wKTsKKwl9CiB9 CiAKIHN0YXRpYyBpbnQgdGVncmFfeHVzYl9jbGtfZW5hYmxlKHN0cnVjdCB0ZWdyYV94dXNiICp0 ZWdyYSkKQEAgLTEwMTUsMTAgKzEwMjAsMTIgQEAgc3RhdGljIGludCB0ZWdyYV94dXNiX3Byb2Jl KHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiAJaWYgKElTX0VSUih0ZWdyYS0+ZnBjaV9i YXNlKSkKIAkJcmV0dXJuIFBUUl9FUlIodGVncmEtPmZwY2lfYmFzZSk7CiAKLQlyZXMgPSBwbGF0 Zm9ybV9nZXRfcmVzb3VyY2UocGRldiwgSU9SRVNPVVJDRV9NRU0sIDIpOwotCXRlZ3JhLT5pcGZz X2Jhc2UgPSBkZXZtX2lvcmVtYXBfcmVzb3VyY2UoJnBkZXYtPmRldiwgcmVzKTsKLQlpZiAoSVNf RVJSKHRlZ3JhLT5pcGZzX2Jhc2UpKQotCQlyZXR1cm4gUFRSX0VSUih0ZWdyYS0+aXBmc19iYXNl KTsKKwlpZiAodGVncmEtPnNvYy0+aGFzX2lwZnMpIHsKKwkJcmVzID0gcGxhdGZvcm1fZ2V0X3Jl c291cmNlKHBkZXYsIElPUkVTT1VSQ0VfTUVNLCAyKTsKKwkJdGVncmEtPmlwZnNfYmFzZSA9IGRl dm1faW9yZW1hcF9yZXNvdXJjZSgmcGRldi0+ZGV2LCByZXMpOworCQlpZiAoSVNfRVJSKHRlZ3Jh LT5pcGZzX2Jhc2UpKQorCQkJcmV0dXJuIFBUUl9FUlIodGVncmEtPmlwZnNfYmFzZSk7CisJfQog CiAJdGVncmEtPnhoY2lfaXJxID0gcGxhdGZvcm1fZ2V0X2lycShwZGV2LCAwKTsKIAlpZiAodGVn cmEtPnhoY2lfaXJxIDwgMCkKQEAgLTEyMDgsNyArMTIxNSw3IEBAIHN0YXRpYyBpbnQgdGVncmFf eHVzYl9wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQogCQlnb3RvIGRpc2FibGVf cnBtOwogCX0KIAotCXRlZ3JhX3h1c2JfaXBmc19jb25maWcodGVncmEsIHJlZ3MpOworCXRlZ3Jh X3h1c2JfY29uZmlnKHRlZ3JhLCByZWdzKTsKIAogCWVyciA9IHRlZ3JhX3h1c2JfbG9hZF9maXJt d2FyZSh0ZWdyYSk7CiAJaWYgKGVyciA8IDApIHsKQEAgLTEzODAsNiArMTM4Nyw3IEBAIHN0YXRp YyBjb25zdCBzdHJ1Y3QgdGVncmFfeHVzYl9zb2MgdGVncmExMjRfc29jID0gewogCQkudXNiMyA9 IHsgLm9mZnNldCA9IDAsIC5jb3VudCA9IDIsIH0sCiAJfSwKIAkuc2NhbGVfc3NfY2xvY2sgPSB0 cnVlLAorCS5oYXNfaXBmcyA9IHRydWUsCiB9OwogTU9EVUxFX0ZJUk1XQVJFKCJudmlkaWEvdGVn cmExMjQveHVzYi5iaW4iKTsKIApAQCAtMTQxMSw2ICsxNDE5LDcgQEAgc3RhdGljIGNvbnN0IHN0 cnVjdCB0ZWdyYV94dXNiX3NvYyB0ZWdyYTIxMF9zb2MgPSB7CiAJCS51c2IzID0geyAub2Zmc2V0 ID0gMCwgLmNvdW50ID0gNCwgfSwKIAl9LAogCS5zY2FsZV9zc19jbG9jayA9IGZhbHNlLAorCS5o YXNfaXBmcyA9IHRydWUsCiB9OwogTU9EVUxFX0ZJUk1XQVJFKCJudmlkaWEvdGVncmEyMTAveHVz Yi5iaW4iKTsKIAo=