From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: [PATCH 4/6] arm64: tegra: Add XUSB and pad controller on Tegra186 Date: Fri, 25 Jan 2019 12:30:11 +0100 Message-ID: <20190125113013.11447-4-thierry.reding@gmail.com> References: <20190125113013.11447-1-thierry.reding@gmail.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20190125113013.11447-1-thierry.reding@gmail.com> Sender: linux-kernel-owner@vger.kernel.org To: Greg Kroah-Hartman Cc: Mathias Nyman , Jon Hunter , JC Kuo , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org List-Id: linux-tegra@vger.kernel.org From: Thierry Reding Adds the XUSB pad and XUSB controllers on Tegra186. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 135 +++++++++++++++++++++++ 1 file changed, 135 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 22815db4a3ed..09d3b0d60e41 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -338,6 +338,141 @@ status = "disabled"; }; + padctl: padctl@3520000 { + compatible = "nvidia,tegra186-xusb-padctl"; + reg = <0x0 0x03520000 0x0 0x1000>, + <0x0 0x03540000 0x0 0x1000>; + reg-names = "padctl", "ao"; + + resets = <&bpmp TEGRA186_RESET_XUSB_PADCTL>; + reset-names = "padctl"; + + status = "disabled"; + + pads { + usb2 { + clocks = <&bpmp TEGRA186_CLK_USB2_TRK>; + clock-names = "trk"; + status = "disabled"; + + lanes { + usb2-0 { + status = "disabled"; + #phy-cells = <0>; + }; + + usb2-1 { + status = "disabled"; + #phy-cells = <0>; + }; + + usb2-2 { + status = "disabled"; + #phy-cells = <0>; + }; + }; + }; + + hsic { + clocks = <&bpmp TEGRA186_CLK_HSIC_TRK>; + clock-names = "trk"; + status = "disabled"; + + lanes { + hsic-0 { + status = "disabled"; + #phy-cells = <0>; + }; + }; + }; + + usb3 { + status = "disabled"; + + lanes { + usb3-0 { + status = "disabled"; + #phy-cells = <0>; + }; + + usb3-1 { + status = "disabled"; + #phy-cells = <0>; + }; + + usb3-2 { + status = "disabled"; + #phy-cells = <0>; + }; + }; + }; + }; + + ports { + usb2-0 { + status = "disabled"; + }; + + usb2-1 { + status = "disabled"; + }; + + usb2-2 { + status = "disabled"; + }; + + hsic-0 { + status = "disabled"; + }; + + usb3-0 { + status = "disabled"; + }; + + usb3-1 { + status = "disabled"; + }; + + usb3-2 { + status = "disabled"; + }; + }; + }; + + usb@3530000 { + compatible = "nvidia,tegra186-xusb"; + reg = <0x0 0x03530000 0x0 0x8000>, + <0x0 0x03538000 0x0 0x1000>; + reg-names = "hcd", "fpci"; + + interrupts = , + , + ; + + clocks = <&bpmp TEGRA186_CLK_XUSB_HOST>, + <&bpmp TEGRA186_CLK_XUSB_FALCON>, + <&bpmp TEGRA186_CLK_XUSB_SS>, + <&bpmp TEGRA186_CLK_XUSB_CORE_SS>, + <&bpmp TEGRA186_CLK_CLK_M>, + <&bpmp TEGRA186_CLK_XUSB_FS>, + <&bpmp TEGRA186_CLK_PLLU>, + <&bpmp TEGRA186_CLK_CLK_M>, + <&bpmp TEGRA186_CLK_PLLE>; + clock-names = "xusb_host", "xusb_falcon_src", "xusb_ss", + "xusb_ss_src", "xusb_hs_src", "xusb_fs_src", + "pll_u_480m", "clk_m", "pll_e"; + + power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>, + <&bpmp TEGRA186_POWER_DOMAIN_XUSBA>; + power-domain-names = "xusb_host", "xusb_ss"; + nvidia,xusb-padctl = <&padctl>; + + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + }; + fuse@3820000 { compatible = "nvidia,tegra186-efuse"; reg = <0x0 0x03820000 0x0 0x10000>; -- 2.19.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [4/6] arm64: tegra: Add XUSB and pad controller on Tegra186 From: Thierry Reding Message-Id: <20190125113013.11447-4-thierry.reding@gmail.com> Date: Fri, 25 Jan 2019 12:30:11 +0100 To: Greg Kroah-Hartman Cc: Mathias Nyman , Jon Hunter , JC Kuo , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org List-ID: RnJvbTogVGhpZXJyeSBSZWRpbmcgPHRyZWRpbmdAbnZpZGlhLmNvbT4KCkFkZHMgdGhlIFhVU0Ig cGFkIGFuZCBYVVNCIGNvbnRyb2xsZXJzIG9uIFRlZ3JhMTg2LgoKU2lnbmVkLW9mZi1ieTogVGhp ZXJyeSBSZWRpbmcgPHRyZWRpbmdAbnZpZGlhLmNvbT4KLS0tCiBhcmNoL2FybTY0L2Jvb3QvZHRz L252aWRpYS90ZWdyYTE4Ni5kdHNpIHwgMTM1ICsrKysrKysrKysrKysrKysrKysrKysrCiAxIGZp bGUgY2hhbmdlZCwgMTM1IGluc2VydGlvbnMoKykKCmRpZmYgLS1naXQgYS9hcmNoL2FybTY0L2Jv b3QvZHRzL252aWRpYS90ZWdyYTE4Ni5kdHNpIGIvYXJjaC9hcm02NC9ib290L2R0cy9udmlkaWEv dGVncmExODYuZHRzaQppbmRleCAyMjgxNWRiNGEzZWQuLjA5ZDNiMGQ2MGU0MSAxMDA2NDQKLS0t IGEvYXJjaC9hcm02NC9ib290L2R0cy9udmlkaWEvdGVncmExODYuZHRzaQorKysgYi9hcmNoL2Fy bTY0L2Jvb3QvZHRzL252aWRpYS90ZWdyYTE4Ni5kdHNpCkBAIC0zMzgsNiArMzM4LDE0MSBAQAog CQlzdGF0dXMgPSAiZGlzYWJsZWQiOwogCX07CiAKKwlwYWRjdGw6IHBhZGN0bEAzNTIwMDAwIHsK KwkJY29tcGF0aWJsZSA9ICJudmlkaWEsdGVncmExODYteHVzYi1wYWRjdGwiOworCQlyZWcgPSA8 MHgwIDB4MDM1MjAwMDAgMHgwIDB4MTAwMD4sCisJCSAgICAgIDwweDAgMHgwMzU0MDAwMCAweDAg MHgxMDAwPjsKKwkJcmVnLW5hbWVzID0gInBhZGN0bCIsICJhbyI7CisKKwkJcmVzZXRzID0gPCZi cG1wIFRFR1JBMTg2X1JFU0VUX1hVU0JfUEFEQ1RMPjsKKwkJcmVzZXQtbmFtZXMgPSAicGFkY3Rs IjsKKworCQlzdGF0dXMgPSAiZGlzYWJsZWQiOworCisJCXBhZHMgeworCQkJdXNiMiB7CisJCQkJ Y2xvY2tzID0gPCZicG1wIFRFR1JBMTg2X0NMS19VU0IyX1RSSz47CisJCQkJY2xvY2stbmFtZXMg PSAidHJrIjsKKwkJCQlzdGF0dXMgPSAiZGlzYWJsZWQiOworCisJCQkJbGFuZXMgeworCQkJCQl1 c2IyLTAgeworCQkJCQkJc3RhdHVzID0gImRpc2FibGVkIjsKKwkJCQkJCSNwaHktY2VsbHMgPSA8 MD47CisJCQkJCX07CisKKwkJCQkJdXNiMi0xIHsKKwkJCQkJCXN0YXR1cyA9ICJkaXNhYmxlZCI7 CisJCQkJCQkjcGh5LWNlbGxzID0gPDA+OworCQkJCQl9OworCisJCQkJCXVzYjItMiB7CisJCQkJ CQlzdGF0dXMgPSAiZGlzYWJsZWQiOworCQkJCQkJI3BoeS1jZWxscyA9IDwwPjsKKwkJCQkJfTsK KwkJCQl9OworCQkJfTsKKworCQkJaHNpYyB7CisJCQkJY2xvY2tzID0gPCZicG1wIFRFR1JBMTg2 X0NMS19IU0lDX1RSSz47CisJCQkJY2xvY2stbmFtZXMgPSAidHJrIjsKKwkJCQlzdGF0dXMgPSAi ZGlzYWJsZWQiOworCisJCQkJbGFuZXMgeworCQkJCQloc2ljLTAgeworCQkJCQkJc3RhdHVzID0g ImRpc2FibGVkIjsKKwkJCQkJCSNwaHktY2VsbHMgPSA8MD47CisJCQkJCX07CisJCQkJfTsKKwkJ CX07CisKKwkJCXVzYjMgeworCQkJCXN0YXR1cyA9ICJkaXNhYmxlZCI7CisKKwkJCQlsYW5lcyB7 CisJCQkJCXVzYjMtMCB7CisJCQkJCQlzdGF0dXMgPSAiZGlzYWJsZWQiOworCQkJCQkJI3BoeS1j ZWxscyA9IDwwPjsKKwkJCQkJfTsKKworCQkJCQl1c2IzLTEgeworCQkJCQkJc3RhdHVzID0gImRp c2FibGVkIjsKKwkJCQkJCSNwaHktY2VsbHMgPSA8MD47CisJCQkJCX07CisKKwkJCQkJdXNiMy0y IHsKKwkJCQkJCXN0YXR1cyA9ICJkaXNhYmxlZCI7CisJCQkJCQkjcGh5LWNlbGxzID0gPDA+Owor CQkJCQl9OworCQkJCX07CisJCQl9OworCQl9OworCisJCXBvcnRzIHsKKwkJCXVzYjItMCB7CisJ CQkJc3RhdHVzID0gImRpc2FibGVkIjsKKwkJCX07CisKKwkJCXVzYjItMSB7CisJCQkJc3RhdHVz ID0gImRpc2FibGVkIjsKKwkJCX07CisKKwkJCXVzYjItMiB7CisJCQkJc3RhdHVzID0gImRpc2Fi bGVkIjsKKwkJCX07CisKKwkJCWhzaWMtMCB7CisJCQkJc3RhdHVzID0gImRpc2FibGVkIjsKKwkJ CX07CisKKwkJCXVzYjMtMCB7CisJCQkJc3RhdHVzID0gImRpc2FibGVkIjsKKwkJCX07CisKKwkJ CXVzYjMtMSB7CisJCQkJc3RhdHVzID0gImRpc2FibGVkIjsKKwkJCX07CisKKwkJCXVzYjMtMiB7 CisJCQkJc3RhdHVzID0gImRpc2FibGVkIjsKKwkJCX07CisJCX07CisJfTsKKworCXVzYkAzNTMw MDAwIHsKKwkJY29tcGF0aWJsZSA9ICJudmlkaWEsdGVncmExODYteHVzYiI7CisJCXJlZyA9IDww eDAgMHgwMzUzMDAwMCAweDAgMHg4MDAwPiwKKwkJICAgICAgPDB4MCAweDAzNTM4MDAwIDB4MCAw eDEwMDA+OworCQlyZWctbmFtZXMgPSAiaGNkIiwgImZwY2kiOworCisJCWludGVycnVwdHMgPSA8 R0lDX1NQSSAxNjMgSVJRX1RZUEVfTEVWRUxfSElHSD4sCisJCQkgICAgIDxHSUNfU1BJIDE2NCBJ UlFfVFlQRV9MRVZFTF9ISUdIPiwKKwkJCSAgICAgPEdJQ19TUEkgMTY3IElSUV9UWVBFX0xFVkVM X0hJR0g+OworCisJCWNsb2NrcyA9IDwmYnBtcCBURUdSQTE4Nl9DTEtfWFVTQl9IT1NUPiwKKwkJ CSA8JmJwbXAgVEVHUkExODZfQ0xLX1hVU0JfRkFMQ09OPiwKKwkJCSA8JmJwbXAgVEVHUkExODZf Q0xLX1hVU0JfU1M+LAorCQkJIDwmYnBtcCBURUdSQTE4Nl9DTEtfWFVTQl9DT1JFX1NTPiwKKwkJ CSA8JmJwbXAgVEVHUkExODZfQ0xLX0NMS19NPiwKKwkJCSA8JmJwbXAgVEVHUkExODZfQ0xLX1hV U0JfRlM+LAorCQkJIDwmYnBtcCBURUdSQTE4Nl9DTEtfUExMVT4sCisJCQkgPCZicG1wIFRFR1JB MTg2X0NMS19DTEtfTT4sCisJCQkgPCZicG1wIFRFR1JBMTg2X0NMS19QTExFPjsKKwkJY2xvY2st bmFtZXMgPSAieHVzYl9ob3N0IiwgInh1c2JfZmFsY29uX3NyYyIsICJ4dXNiX3NzIiwKKwkJCSAg ICAgICJ4dXNiX3NzX3NyYyIsICJ4dXNiX2hzX3NyYyIsICJ4dXNiX2ZzX3NyYyIsCisJCQkgICAg ICAicGxsX3VfNDgwbSIsICJjbGtfbSIsICJwbGxfZSI7CisKKwkJcG93ZXItZG9tYWlucyA9IDwm YnBtcCBURUdSQTE4Nl9QT1dFUl9ET01BSU5fWFVTQkM+LAorCQkJCTwmYnBtcCBURUdSQTE4Nl9Q T1dFUl9ET01BSU5fWFVTQkE+OworCQlwb3dlci1kb21haW4tbmFtZXMgPSAieHVzYl9ob3N0Iiwg Inh1c2Jfc3MiOworCQludmlkaWEseHVzYi1wYWRjdGwgPSA8JnBhZGN0bD47CisKKwkJc3RhdHVz ID0gImRpc2FibGVkIjsKKworCQkjYWRkcmVzcy1jZWxscyA9IDwxPjsKKwkJI3NpemUtY2VsbHMg PSA8MD47CisJfTsKKwogCWZ1c2VAMzgyMDAwMCB7CiAJCWNvbXBhdGlibGUgPSAibnZpZGlhLHRl Z3JhMTg2LWVmdXNlIjsKIAkJcmVnID0gPDB4MCAweDAzODIwMDAwIDB4MCAweDEwMDAwPjsK