From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3BBAC282C0 for ; Fri, 25 Jan 2019 16:54:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B01A8218CD for ; Fri, 25 Jan 2019 16:54:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="SyEy19Pb" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B01A8218CD Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ravnborg.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YZcWBeHgmKFAj1Ws8rAysr8WICkX7m++uGYcpkTHcdI=; b=SyEy19PbapyRy2 U4FnfHpnkqJadMsCpce2T4OF5pb7RLWcd/xH7mFFzohqleVUKvAO96kaaUMKETdUzi1s54l0LeGm2 E8tOV4YLVp72xT30OgQqUMb9n6JVsCt8SIGKLyB8f1AWAxnJcPEzFUBa8g8/jfPQb9z0ph8Ycfgpm ACGRwxPSlV+eKUp7CKUIFUBG19H6/TSSghPxC22ghhsTppIcmmh8Txaex+x1crggkSW4Buf11sD2W ang8wN9OpHITzbjp2Mg/lTAYCI9VGgyGc2xPJ7f+ObMclR2yngIFLuBi4A4L980XgFi1wAU30Wwwv ZfE1JjA8U9gQqUI7+E4A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gn4k0-0004Yk-Tu; Fri, 25 Jan 2019 16:54:04 +0000 Received: from asavdk3.altibox.net ([109.247.116.14]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gn4jw-0004YP-LH for linux-arm-kernel@lists.infradead.org; Fri, 25 Jan 2019 16:54:03 +0000 Received: from ravnborg.org (unknown [158.248.194.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by asavdk3.altibox.net (Postfix) with ESMTPS id 1431A20050; Fri, 25 Jan 2019 17:53:56 +0100 (CET) Date: Fri, 25 Jan 2019 17:53:55 +0100 From: Sam Ravnborg To: Guido =?iso-8859-1?Q?G=FCnther?= Subject: Re: [PATCH 2/2] phy: Add driver for mixel dphy Message-ID: <20190125165355.GA3522@ravnborg.org> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-CMAE-Score: 0 X-CMAE-Analysis: v=2.3 cv=dqr19Wo4 c=1 sm=1 tr=0 a=UWs3HLbX/2nnQ3s7vZ42gw==:117 a=UWs3HLbX/2nnQ3s7vZ42gw==:17 a=8nJEP1OIZ-IA:10 a=ze386MxoAAAA:8 a=e5mUnYsNAAAA:8 a=wTxEHkJ9yh_FIgG7YY4A:9 a=wPNLvfGTeEIA:10 a=iBZjaW-pnkserzjvUTHh:22 a=Vxmtnl_E_bksehYqCbjh:22 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190125_085401_057026_A0915539 X-CRM114-Status: GOOD ( 36.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maxime Ripard , Robert Chiras , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Guido. Patch looks good but a few comments below. Sam On Fri, Jan 25, 2019 at 11:14:46AM +0100, Guido G=FCnther wrote: > This adds support for the Mixel DPHY as found on i.MX8 CPUs but since > this is an IP core it will likely be found on others in the future. So > instead of adding this to the nwl host driver make it a generic PHY > driver. > = > The driver supports the i.MX8MQ. Support for i.MX8QM and i.MX8QXP can be > added once the necessary system controller bits are in via > mixel_dpy_ops. > = > Signed-off-by: Guido G=FCnther > --- > drivers/phy/Kconfig | 7 + > drivers/phy/Makefile | 1 + > drivers/phy/phy-mixel-mipi-dphy.c | 449 ++++++++++++++++++++++++++++++ > 3 files changed, 457 insertions(+) > create mode 100644 drivers/phy/phy-mixel-mipi-dphy.c > = > diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig > index 250abe290ca1..9195b5876bcc 100644 > --- a/drivers/phy/Kconfig > +++ b/drivers/phy/Kconfig > @@ -48,6 +48,13 @@ config PHY_XGENE > help > This option enables support for APM X-Gene SoC multi-purpose PHY. > = > +config PHY_MIXEL_MIPI_DPHY > + bool > + depends on OF > + select GENERIC_PHY > + select GENERIC_PHY_MIPI_DPHY > + default ARCH_MXC && ARM64 Is it correct that driver is mandatory if ARCH_MXC is y? There is no prompt to allow the user to select it. Or in other words - will all i.MX8 user need it? > + > source "drivers/phy/allwinner/Kconfig" > source "drivers/phy/amlogic/Kconfig" > source "drivers/phy/broadcom/Kconfig" > diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile > index 0d9fddc498a6..264f570b67bf 100644 > --- a/drivers/phy/Makefile > +++ b/drivers/phy/Makefile > @@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_MEDIATEK) +=3D mediatek/ > obj-$(CONFIG_ARCH_RENESAS) +=3D renesas/ > obj-$(CONFIG_ARCH_ROCKCHIP) +=3D rockchip/ > obj-$(CONFIG_ARCH_TEGRA) +=3D tegra/ > +obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) +=3D phy-mixel-mipi-dphy.o > obj-y +=3D broadcom/ \ > cadence/ \ > freescale/ \ > diff --git a/drivers/phy/phy-mixel-mipi-dphy.c b/drivers/phy/phy-mixel-mi= pi-dphy.c > new file mode 100644 > index 000000000000..8a43dab79cee > --- /dev/null > +++ b/drivers/phy/phy-mixel-mipi-dphy.c There is already a PHY named phy-fsl-imx8mq-usb, located in the freescale subdirectory. Why locate another imx8 PHY in the top level directory with another naming convention? > @@ -0,0 +1,449 @@ > +/* > + * Copyright 2017 NXP > + * Copyright 2019 Purism SPC > + * > + * SPDX-License-Identifier: GPL-2.0 > + */ SPDX-License-Identifier goes in at first line with //. It is documented somewhere. Also, did you double check that GPL 2.0 is correct? > + > +/* #define DEBUG 1 */ There is no reference to DEBUG in this file - delete? > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +/* DPHY registers */ > +#define DPHY_PD_DPHY 0x00 > +#define DPHY_M_PRG_HS_PREPARE 0x04 > +#define DPHY_MC_PRG_HS_PREPARE 0x08 > +#define DPHY_M_PRG_HS_ZERO 0x0c > +#define DPHY_MC_PRG_HS_ZERO 0x10 > +#define DPHY_M_PRG_HS_TRAIL 0x14 > +#define DPHY_MC_PRG_HS_TRAIL 0x18 > +#define DPHY_PD_PLL 0x1c > +#define DPHY_TST 0x20 > +#define DPHY_CN 0x24 > +#define DPHY_CM 0x28 > +#define DPHY_CO 0x2c > +#define DPHY_LOCK 0x30 > +#define DPHY_LOCK_BYP 0x34 > +#define DPHY_TX_RCAL 0x38 > +#define DPHY_AUTO_PD_EN 0x3c > +#define DPHY_RXLPRP 0x40 > +#define DPHY_RXCDRP 0x44 > + > +#define MBPS(x) ((x) * 1000000) > + > +#define DATA_RATE_MAX_SPEED MBPS(1500) > +#define DATA_RATE_MIN_SPEED MBPS(80) > + > +#define CN_BUF 0xcb7a89c0 > +#define CO_BUF 0x63 > +#define CM(x) ( \ > + ((x) < 32)?0xe0|((x)-16) : \ > + ((x) < 64)?0xc0|((x)-32) : \ > + ((x) < 128)?0x80|((x)-64) : \ > + ((x) - 128)) > +#define CN(x) (((x) =3D=3D 1)?0x1f : (((CN_BUF)>>((x)-1))&0x1f)) > +#define CO(x) ((CO_BUF)>>(8-(x))&0x3) > + > +/* PHY power on is LOW_ENABLE */ > +#define PWR_ON 0 > +#define PWR_OFF 1 > + > +struct mixel_dphy_cfg { > + u32 cm; > + u32 cn; > + u32 co; > + unsigned long hs_clk_rate; > + u8 mc_prg_hs_prepare; > + u8 m_prg_hs_prepare; > + u8 mc_prg_hs_zero; > + u8 m_prg_hs_zero; > + u8 mc_prg_hs_trail; > + u8 m_prg_hs_trail; > +}; For the naive reader it would be helpful to spell out the names in a commen= t. As I assume the names comes from the data sheet the short names are OK - but let others know the purpose. > + > +struct mixel_dphy_priv; > +struct mixel_dphy_ops { > + int (*probe)(struct mixel_dphy_priv *priv); > + int (*power_on)(struct phy *phy); > + int (*power_off)(struct phy *phy); > +}; Consider same argument for all three ops, less suprises. But then probe() is called before we have a phy, so this may be the best option. > + > +struct mixel_dphy_priv { > + struct mixel_dphy_cfg cfg; > + void __iomem *regs; > + struct clk *phy_ref_clk; > + struct mutex lock; > + const struct mixel_dphy_ops *ops; > +}; Document what the lock protects, or find a better name for the lock to docu= ment it > + > +/* Find a ratio close to the desired one using continued fraction > + approximation ending either at exact match or maximum allowed > + nominator, denominator. */ Use kernel style comments /* * Bla bla * more bla */ > +static void get_best_ratio(unsigned long *pnum, unsigned long *pdenom, u= nsigned max_n, unsigned max_d) Wrap line to stay below 80 chars. Use checkpatch to help you sport things like this. > +{ > + unsigned long a =3D *pnum; > + unsigned long b =3D *pdenom; > + unsigned long c; > + unsigned n[] =3D {0, 1}; > + unsigned d[] =3D {1, 0}; > + unsigned whole; > + unsigned i =3D 1; > + while (b) { Add empty line after last local variable. > + i ^=3D 1; > + whole =3D a / b; > + n[i] +=3D (n[i ^ 1] * whole); > + d[i] +=3D (d[i ^ 1] * whole); > + if ((n[i] > max_n) || (d[i] > max_d)) { > + i ^=3D 1; > + break; > + } > + c =3D a - (b * whole); > + a =3D b; > + b =3D c; > + } > + *pnum =3D n[i]; > + *pdenom =3D d[i]; > +} > + > +static int mixel_dphy_config_from_opts(struct phy *phy, > + struct phy_configure_opts_mipi_dphy *dphy_opts, > + struct mixel_dphy_cfg *cfg) > +{ Align extra paratmers below the first parameter using tabs and add necessary spaces. > + struct mixel_dphy_priv *priv =3D dev_get_drvdata(phy->dev.parent); > + unsigned long ref_clk =3D clk_get_rate(priv->phy_ref_clk); > + int i; > + unsigned long numerator, denominator, frequency; > + unsigned step; > + > +static int mixel_dphy_ref_power_on(struct phy *phy) > +{ > + struct mixel_dphy_priv *priv =3D phy_get_drvdata(phy); > + u32 lock, timeout; > + int ret =3D 0; > + > + mutex_lock(&priv->lock); > + clk_prepare_enable(priv->phy_ref_clk); > + > + phy_write(phy, PWR_ON, DPHY_PD_DPHY); > + phy_write(phy, PWR_ON, DPHY_PD_PLL); > + > + timeout =3D 100; > + while (!(lock =3D phy_read(phy, DPHY_LOCK))) { > + udelay(10); > + if (--timeout =3D=3D 0) { > + dev_err(&phy->dev, "Could not get DPHY lock!\n"); > + mutex_unlock(&priv->lock); > + return -EINVAL; > + } USe goto to have a single exit path where you do mutex_unlock() > + } > + mutex_unlock(&priv->lock); > + > + return ret; > +} > + > + > + mutex_lock(&priv->lock); > + > + phy_write(phy, 0x00, DPHY_LOCK_BYP); > + phy_write(phy, 0x01, DPHY_TX_RCAL); > + phy_write(phy, 0x00, DPHY_AUTO_PD_EN); > + phy_write(phy, 0x01, DPHY_RXLPRP); > + phy_write(phy, 0x01, DPHY_RXCDRP); > + phy_write(phy, 0x25, DPHY_TST); > + > + mixel_phy_set_hs_timings(phy); > + ret =3D mixel_dphy_set_pll_params(phy); > + if (ret < 0) { > + mutex_unlock(&priv->lock); > + return ret; > + } USe goto to have a single exit path where you do mutex_unlock() > + > + mutex_unlock(&priv->lock); > + > + return 0; > +} > + > + > +/* > + * This is the reference implementation of DPHY hooks. Specific integrat= ion of > + * this IP may have to re-implement some of them depending on how they d= ecided > + * to wire things in the SoC. > + */ > +static const struct mixel_dphy_ops mixel_dphy_ref_ops =3D { > + .power_on =3D mixel_dphy_ref_power_on, > + .power_off =3D mixel_dphy_ref_power_off, > +}; > + > +static const struct phy_ops mixel_dphy_ops =3D { > + .power_on =3D mixel_dphy_power_on, > + .power_off =3D mixel_dphy_power_off, > + .configure =3D mixel_dphy_configure, > + .validate =3D mixel_dphy_validate, > + .owner =3D THIS_MODULE, > +}; This is confusing. We have struct mixel_dphy_ops =3D> mixel_dphy_ref_ops And then struct phy_ops =3D> mixel_dphy_ops So reading this there are to uses of mixel_dphy_ops, one is a struct, and another is an instance of another type. Try to find a niming scheme that is less confusing. > + > +static const struct of_device_id mixel_dphy_of_match[] =3D { > + { .compatible =3D "mixel,imx8mq-mipi-dphy", .data =3D &mixel_dphy_ref_o= ps }, > + { /* sentinel */ }, > +}; Multi-line to keep line shorter? > +MODULE_DEVICE_TABLE(of, mixel_dphy_of_match); > + > +static int mixel_dphy_probe(struct platform_device *pdev) > +{ > + struct device *dev =3D &pdev->dev; > + struct device_node *np =3D dev->of_node; > + struct phy_provider *phy_provider; > + struct mixel_dphy_priv *priv; > + struct resource *res; > + struct phy *phy; > + int ret; > + > + if (!np) > + return -ENODEV; > + > + priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); > + if (!priv) > + return -ENOMEM; > + > + priv->ops =3D of_device_get_match_data(&pdev->dev); > + if (!priv->ops) > + return -EINVAL; > + > + res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); > + if (!res) > + return -ENODEV; > + > + priv->regs =3D devm_ioremap(dev, res->start, SZ_256); > + if (IS_ERR(priv->regs)) > + return PTR_ERR(priv->regs); > + > + priv->phy_ref_clk =3D devm_clk_get(&pdev->dev, "phy_ref"); > + if (IS_ERR(priv->phy_ref_clk)) { > + dev_err(dev, "No phy_ref clock found"); > + return PTR_ERR(priv->phy_ref_clk); > + } > + dev_dbg(dev, "phy_ref clock rate: %lu", clk_get_rate(priv->phy_ref_clk)= ); > + > + mutex_init(&priv->lock); > + dev_set_drvdata(dev, priv); > + > + if (priv->ops->probe) { > + ret =3D priv->ops->probe(priv); > + if (ret) > + return ret; > + } > + > + phy =3D devm_phy_create(dev, np, &mixel_dphy_ops); > + if (IS_ERR(phy)) { > + dev_err(dev, "Failed to create phy %ld\n", PTR_ERR(phy)); > + return PTR_ERR(phy); > + } > + phy_set_drvdata(phy, priv); > + > + phy_provider =3D devm_of_phy_provider_register(dev, of_phy_simple_xlate= ); > + > + return PTR_ERR_OR_ZERO(phy_provider); > +} > + > +static struct platform_driver mixel_dphy_driver =3D { > + .probe =3D mixel_dphy_probe, > + .driver =3D { > + .name =3D "mixel-mipi-dphy", > + .of_match_table =3D mixel_dphy_of_match, > + } > +}; > +module_platform_driver(mixel_dphy_driver); > + > +MODULE_AUTHOR("NXP Semiconductor"); > +MODULE_DESCRIPTION("Mixel MIPI-DSI PHY driver"); > +MODULE_LICENSE("GPL v2"); > -- = > 2.20.1 > = > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sam Ravnborg Subject: Re: [PATCH 2/2] phy: Add driver for mixel dphy Date: Fri, 25 Jan 2019 17:53:55 +0100 Message-ID: <20190125165355.GA3522@ravnborg.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from asavdk3.altibox.net (asavdk3.altibox.net [109.247.116.14]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9B20D6E047 for ; Fri, 25 Jan 2019 16:53:59 +0000 (UTC) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Guido =?iso-8859-1?Q?G=FCnther?= Cc: Maxime Ripard , Robert Chiras , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org SGkgR3VpZG8uCgpQYXRjaCBsb29rcyBnb29kIGJ1dCBhIGZldyBjb21tZW50cyBiZWxvdy4KCglT YW0KCk9uIEZyaSwgSmFuIDI1LCAyMDE5IGF0IDExOjE0OjQ2QU0gKzAxMDAsIEd1aWRvIEfDvG50 aGVyIHdyb3RlOgo+IFRoaXMgYWRkcyBzdXBwb3J0IGZvciB0aGUgTWl4ZWwgRFBIWSBhcyBmb3Vu ZCBvbiBpLk1YOCBDUFVzIGJ1dCBzaW5jZQo+IHRoaXMgaXMgYW4gSVAgY29yZSBpdCB3aWxsIGxp a2VseSBiZSBmb3VuZCBvbiBvdGhlcnMgaW4gdGhlIGZ1dHVyZS4gU28KPiBpbnN0ZWFkIG9mIGFk ZGluZyB0aGlzIHRvIHRoZSBud2wgaG9zdCBkcml2ZXIgbWFrZSBpdCBhIGdlbmVyaWMgUEhZCj4g ZHJpdmVyLgo+IAo+IFRoZSBkcml2ZXIgc3VwcG9ydHMgdGhlIGkuTVg4TVEuIFN1cHBvcnQgZm9y IGkuTVg4UU0gYW5kIGkuTVg4UVhQIGNhbiBiZQo+IGFkZGVkIG9uY2UgdGhlIG5lY2Vzc2FyeSBz eXN0ZW0gY29udHJvbGxlciBiaXRzIGFyZSBpbiB2aWEKPiBtaXhlbF9kcHlfb3BzLgo+IAo+IFNp Z25lZC1vZmYtYnk6IEd1aWRvIEfDvG50aGVyIDxhZ3hAc2lneGNwdS5vcmc+Cj4gLS0tCj4gIGRy aXZlcnMvcGh5L0tjb25maWcgICAgICAgICAgICAgICB8ICAgNyArCj4gIGRyaXZlcnMvcGh5L01h a2VmaWxlICAgICAgICAgICAgICB8ICAgMSArCj4gIGRyaXZlcnMvcGh5L3BoeS1taXhlbC1taXBp LWRwaHkuYyB8IDQ0OSArKysrKysrKysrKysrKysrKysrKysrKysrKysrKysKPiAgMyBmaWxlcyBj aGFuZ2VkLCA0NTcgaW5zZXJ0aW9ucygrKQo+ICBjcmVhdGUgbW9kZSAxMDA2NDQgZHJpdmVycy9w aHkvcGh5LW1peGVsLW1pcGktZHBoeS5jCj4gCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvcGh5L0tj b25maWcgYi9kcml2ZXJzL3BoeS9LY29uZmlnCj4gaW5kZXggMjUwYWJlMjkwY2ExLi45MTk1YjU4 NzZiY2MgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9waHkvS2NvbmZpZwo+ICsrKyBiL2RyaXZlcnMv cGh5L0tjb25maWcKPiBAQCAtNDgsNiArNDgsMTMgQEAgY29uZmlnIFBIWV9YR0VORQo+ICAJaGVs cAo+ICAJICBUaGlzIG9wdGlvbiBlbmFibGVzIHN1cHBvcnQgZm9yIEFQTSBYLUdlbmUgU29DIG11 bHRpLXB1cnBvc2UgUEhZLgo+ICAKPiArY29uZmlnIFBIWV9NSVhFTF9NSVBJX0RQSFkKPiArCWJv b2wKPiArCWRlcGVuZHMgb24gT0YKPiArCXNlbGVjdCBHRU5FUklDX1BIWQo+ICsJc2VsZWN0IEdF TkVSSUNfUEhZX01JUElfRFBIWQo+ICsJZGVmYXVsdCBBUkNIX01YQyAmJiBBUk02NAoKSXMgaXQg Y29ycmVjdCB0aGF0IGRyaXZlciBpcyBtYW5kYXRvcnkgaWYgQVJDSF9NWEMgaXMgeT8KVGhlcmUg aXMgbm8gcHJvbXB0IHRvIGFsbG93IHRoZSB1c2VyIHRvIHNlbGVjdCBpdC4KT3IgaW4gb3RoZXIg d29yZHMgLSB3aWxsIGFsbCBpLk1YOCB1c2VyIG5lZWQgaXQ/Cgo+ICsKPiAgc291cmNlICJkcml2 ZXJzL3BoeS9hbGx3aW5uZXIvS2NvbmZpZyIKPiAgc291cmNlICJkcml2ZXJzL3BoeS9hbWxvZ2lj L0tjb25maWciCj4gIHNvdXJjZSAiZHJpdmVycy9waHkvYnJvYWRjb20vS2NvbmZpZyIKPiBkaWZm IC0tZ2l0IGEvZHJpdmVycy9waHkvTWFrZWZpbGUgYi9kcml2ZXJzL3BoeS9NYWtlZmlsZQo+IGlu ZGV4IDBkOWZkZGM0OThhNi4uMjY0ZjU3MGI2N2JmIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvcGh5 L01ha2VmaWxlCj4gKysrIGIvZHJpdmVycy9waHkvTWFrZWZpbGUKPiBAQCAtMTUsNiArMTUsNyBA QCBvYmotJChDT05GSUdfQVJDSF9NRURJQVRFSykJCSs9IG1lZGlhdGVrLwo+ICBvYmotJChDT05G SUdfQVJDSF9SRU5FU0FTKQkJKz0gcmVuZXNhcy8KPiAgb2JqLSQoQ09ORklHX0FSQ0hfUk9DS0NI SVApCQkrPSByb2NrY2hpcC8KPiAgb2JqLSQoQ09ORklHX0FSQ0hfVEVHUkEpCQkrPSB0ZWdyYS8K PiArb2JqLSQoQ09ORklHX1BIWV9NSVhFTF9NSVBJX0RQSFkpCSs9IHBoeS1taXhlbC1taXBpLWRw aHkubwo+ICBvYmoteQkJCQkJKz0gYnJvYWRjb20vCVwKPiAgCQkJCQkgICBjYWRlbmNlLwlcCj4g IAkJCQkJICAgZnJlZXNjYWxlLwlcCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvcGh5L3BoeS1taXhl bC1taXBpLWRwaHkuYyBiL2RyaXZlcnMvcGh5L3BoeS1taXhlbC1taXBpLWRwaHkuYwo+IG5ldyBm aWxlIG1vZGUgMTAwNjQ0Cj4gaW5kZXggMDAwMDAwMDAwMDAwLi44YTQzZGFiNzljZWUKPiAtLS0g L2Rldi9udWxsCj4gKysrIGIvZHJpdmVycy9waHkvcGh5LW1peGVsLW1pcGktZHBoeS5jCgpUaGVy ZSBpcyBhbHJlYWR5IGEgUEhZIG5hbWVkIHBoeS1mc2wtaW14OG1xLXVzYiwgbG9jYXRlZCBpbiB0 aGUKZnJlZXNjYWxlIHN1YmRpcmVjdG9yeS4KV2h5IGxvY2F0ZSBhbm90aGVyIGlteDggUEhZIGlu IHRoZSB0b3AgbGV2ZWwgZGlyZWN0b3J5IHdpdGgKYW5vdGhlciBuYW1pbmcgY29udmVudGlvbj8K Cj4gQEAgLTAsMCArMSw0NDkgQEAKPiArLyoKPiArICogQ29weXJpZ2h0IDIwMTcgTlhQCj4gKyAq IENvcHlyaWdodCAyMDE5IFB1cmlzbSBTUEMKPiArICoKPiArICogU1BEWC1MaWNlbnNlLUlkZW50 aWZpZXI6IEdQTC0yLjAKPiArICovClNQRFgtTGljZW5zZS1JZGVudGlmaWVyIGdvZXMgaW4gYXQg Zmlyc3QgbGluZSB3aXRoIC8vLgpJdCBpcyBkb2N1bWVudGVkIHNvbWV3aGVyZS4KQWxzbywgZGlk IHlvdSBkb3VibGUgY2hlY2sgdGhhdCBHUEwgMi4wIGlzIGNvcnJlY3Q/Cgo+ICsKPiArLyogI2Rl ZmluZSBERUJVRyAxICovClRoZXJlIGlzIG5vIHJlZmVyZW5jZSB0byBERUJVRyBpbiB0aGlzIGZp bGUgLSBkZWxldGU/Cgo+ICsKPiArI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgo+ICsjaW5jbHVkZSA8 bGludXgvY2xrLXByb3ZpZGVyLmg+Cj4gKyNpbmNsdWRlIDxsaW51eC9kZWxheS5oPgo+ICsjaW5j bHVkZSA8bGludXgvaW8uaD4KPiArI2luY2x1ZGUgPGxpbnV4L2tlcm5lbC5oPgo+ICsjaW5jbHVk ZSA8bGludXgvbW9kdWxlLmg+Cj4gKyNpbmNsdWRlIDxsaW51eC9vZi5oPgo+ICsjaW5jbHVkZSA8 bGludXgvb2ZfcGxhdGZvcm0uaD4KPiArI2luY2x1ZGUgPGxpbnV4L3BoeS9waHkuaD4KPiArI2lu Y2x1ZGUgPGxpbnV4L3BsYXRmb3JtX2RldmljZS5oPgo+ICsKPiArLyogRFBIWSByZWdpc3RlcnMg Ki8KPiArI2RlZmluZSBEUEhZX1BEX0RQSFkJCQkweDAwCj4gKyNkZWZpbmUgRFBIWV9NX1BSR19I U19QUkVQQVJFCQkweDA0Cj4gKyNkZWZpbmUgRFBIWV9NQ19QUkdfSFNfUFJFUEFSRQkJMHgwOAo+ ICsjZGVmaW5lIERQSFlfTV9QUkdfSFNfWkVSTwkJMHgwYwo+ICsjZGVmaW5lIERQSFlfTUNfUFJH X0hTX1pFUk8JCTB4MTAKPiArI2RlZmluZSBEUEhZX01fUFJHX0hTX1RSQUlMCQkweDE0Cj4gKyNk ZWZpbmUgRFBIWV9NQ19QUkdfSFNfVFJBSUwJCTB4MTgKPiArI2RlZmluZSBEUEhZX1BEX1BMTAkJ CTB4MWMKPiArI2RlZmluZSBEUEhZX1RTVAkJCTB4MjAKPiArI2RlZmluZSBEUEhZX0NOCQkJCTB4 MjQKPiArI2RlZmluZSBEUEhZX0NNCQkJCTB4MjgKPiArI2RlZmluZSBEUEhZX0NPCQkJCTB4MmMK PiArI2RlZmluZSBEUEhZX0xPQ0sJCQkweDMwCj4gKyNkZWZpbmUgRFBIWV9MT0NLX0JZUAkJCTB4 MzQKPiArI2RlZmluZSBEUEhZX1RYX1JDQUwJCQkweDM4Cj4gKyNkZWZpbmUgRFBIWV9BVVRPX1BE X0VOCQkJMHgzYwo+ICsjZGVmaW5lIERQSFlfUlhMUFJQCQkJMHg0MAo+ICsjZGVmaW5lIERQSFlf UlhDRFJQCQkJMHg0NAo+ICsKPiArI2RlZmluZSBNQlBTKHgpICgoeCkgKiAxMDAwMDAwKQo+ICsK PiArI2RlZmluZSBEQVRBX1JBVEVfTUFYX1NQRUVEIE1CUFMoMTUwMCkKPiArI2RlZmluZSBEQVRB X1JBVEVfTUlOX1NQRUVEIE1CUFMoODApCj4gKwo+ICsjZGVmaW5lIENOX0JVRgkweGNiN2E4OWMw Cj4gKyNkZWZpbmUgQ09fQlVGCTB4NjMKPiArI2RlZmluZSBDTSh4KQkoCQkJCVwKPiArCQkoKHgp IDwgIDMyKT8weGUwfCgoeCktMTYpIDoJXAo+ICsJCSgoeCkgPCAgNjQpPzB4YzB8KCh4KS0zMikg OglcCj4gKwkJKCh4KSA8IDEyOCk/MHg4MHwoKHgpLTY0KSA6CVwKPiArCQkoKHgpIC0gMTI4KSkK PiArI2RlZmluZSBDTih4KQkoKCh4KSA9PSAxKT8weDFmIDogKCgoQ05fQlVGKT4+KCh4KS0xKSkm MHgxZikpCj4gKyNkZWZpbmUgQ08oeCkJKChDT19CVUYpPj4oOC0oeCkpJjB4MykKPiArCj4gKy8q IFBIWSBwb3dlciBvbiBpcyBMT1dfRU5BQkxFICovCj4gKyNkZWZpbmUgUFdSX09OCTAKPiArI2Rl ZmluZSBQV1JfT0ZGCTEKPiArCj4gK3N0cnVjdCBtaXhlbF9kcGh5X2NmZyB7Cj4gKwl1MzIgY207 Cj4gKwl1MzIgY247Cj4gKwl1MzIgY287Cj4gKwl1bnNpZ25lZCBsb25nIGhzX2Nsa19yYXRlOwo+ ICsJdTggbWNfcHJnX2hzX3ByZXBhcmU7Cj4gKwl1OCBtX3ByZ19oc19wcmVwYXJlOwo+ICsJdTgg bWNfcHJnX2hzX3plcm87Cj4gKwl1OCBtX3ByZ19oc196ZXJvOwo+ICsJdTggbWNfcHJnX2hzX3Ry YWlsOwo+ICsJdTggbV9wcmdfaHNfdHJhaWw7Cj4gK307CgpGb3IgdGhlIG5haXZlIHJlYWRlciBp dCB3b3VsZCBiZSBoZWxwZnVsIHRvIHNwZWxsIG91dCB0aGUgbmFtZXMgaW4gYSBjb21tZW50LgpB cyBJIGFzc3VtZSB0aGUgbmFtZXMgY29tZXMgZnJvbSB0aGUgZGF0YSBzaGVldCB0aGUgc2hvcnQg bmFtZXMgYXJlIE9LIC0gYnV0CmxldCBvdGhlcnMga25vdyB0aGUgcHVycG9zZS4KCj4gKwo+ICtz dHJ1Y3QgbWl4ZWxfZHBoeV9wcml2Owo+ICtzdHJ1Y3QgbWl4ZWxfZHBoeV9vcHMgewo+ICsJaW50 ICgqcHJvYmUpKHN0cnVjdCBtaXhlbF9kcGh5X3ByaXYgKnByaXYpOwo+ICsJaW50ICgqcG93ZXJf b24pKHN0cnVjdCBwaHkgKnBoeSk7Cj4gKwlpbnQgKCpwb3dlcl9vZmYpKHN0cnVjdCBwaHkgKnBo eSk7Cj4gK307CkNvbnNpZGVyIHNhbWUgYXJndW1lbnQgZm9yIGFsbCB0aHJlZSBvcHMsIGxlc3Mg c3VwcmlzZXMuCkJ1dCB0aGVuIHByb2JlKCkgaXMgY2FsbGVkIGJlZm9yZSB3ZSBoYXZlIGEgcGh5 LCBzbyB0aGlzIG1heSBiZQp0aGUgYmVzdCBvcHRpb24uCj4gKwo+ICtzdHJ1Y3QgbWl4ZWxfZHBo eV9wcml2IHsKPiArCXN0cnVjdCBtaXhlbF9kcGh5X2NmZyBjZmc7Cj4gKwl2b2lkIF9faW9tZW0g KnJlZ3M7Cj4gKwlzdHJ1Y3QgY2xrICpwaHlfcmVmX2NsazsKPiArCXN0cnVjdCBtdXRleCBsb2Nr Owo+ICsJY29uc3Qgc3RydWN0IG1peGVsX2RwaHlfb3BzICpvcHM7Cj4gK307CkRvY3VtZW50IHdo YXQgdGhlIGxvY2sgcHJvdGVjdHMsIG9yIGZpbmQgYSBiZXR0ZXIgbmFtZSBmb3IgdGhlIGxvY2sg dG8gZG9jdW1lbnQgaXQKCj4gKwo+ICsvKiBGaW5kIGEgcmF0aW8gY2xvc2UgdG8gdGhlIGRlc2ly ZWQgb25lIHVzaW5nIGNvbnRpbnVlZCBmcmFjdGlvbgo+ICsgICBhcHByb3hpbWF0aW9uIGVuZGlu ZyBlaXRoZXIgYXQgZXhhY3QgbWF0Y2ggb3IgbWF4aW11bSBhbGxvd2VkCj4gKyAgIG5vbWluYXRv ciwgZGVub21pbmF0b3IuICovCgpVc2Uga2VybmVsIHN0eWxlIGNvbW1lbnRzCi8qCiAqIEJsYSBi bGEKICogbW9yZSBibGEKICovCgo+ICtzdGF0aWMgdm9pZCBnZXRfYmVzdF9yYXRpbyh1bnNpZ25l ZCBsb25nICpwbnVtLCB1bnNpZ25lZCBsb25nICpwZGVub20sIHVuc2lnbmVkIG1heF9uLCB1bnNp Z25lZCBtYXhfZCkKV3JhcCBsaW5lIHRvIHN0YXkgYmVsb3cgODAgY2hhcnMuClVzZSBjaGVja3Bh dGNoIHRvIGhlbHAgeW91IHNwb3J0IHRoaW5ncyBsaWtlIHRoaXMuCgo+ICt7Cj4gKwl1bnNpZ25l ZCBsb25nIGEgPSAqcG51bTsKPiArCXVuc2lnbmVkIGxvbmcgYiA9ICpwZGVub207Cj4gKwl1bnNp Z25lZCBsb25nIGM7Cj4gKwl1bnNpZ25lZCBuW10gPSB7MCwgMX07Cj4gKwl1bnNpZ25lZCBkW10g PSB7MSwgMH07Cj4gKwl1bnNpZ25lZCB3aG9sZTsKPiArCXVuc2lnbmVkIGkgPSAxOwo+ICsJd2hp bGUgKGIpIHsKQWRkIGVtcHR5IGxpbmUgYWZ0ZXIgbGFzdCBsb2NhbCB2YXJpYWJsZS4KCj4gKwkJ aSBePSAxOwo+ICsJCXdob2xlID0gYSAvIGI7Cj4gKwkJbltpXSArPSAobltpIF4gMV0gKiB3aG9s ZSk7Cj4gKwkJZFtpXSArPSAoZFtpIF4gMV0gKiB3aG9sZSk7Cj4gKwkJaWYgKChuW2ldID4gbWF4 X24pIHx8IChkW2ldID4gbWF4X2QpKSB7Cj4gKwkJCWkgXj0gMTsKPiArCQkJYnJlYWs7Cj4gKwkJ fQo+ICsJCWMgPSBhIC0gKGIgKiB3aG9sZSk7Cj4gKwkJYSA9IGI7Cj4gKwkJYiA9IGM7Cj4gKwl9 Cj4gKwkqcG51bSA9IG5baV07Cj4gKwkqcGRlbm9tID0gZFtpXTsKPiArfQo+ICsKPiArc3RhdGlj IGludCBtaXhlbF9kcGh5X2NvbmZpZ19mcm9tX29wdHMoc3RydWN0IHBoeSAqcGh5LAo+ICsJICAg ICAgIHN0cnVjdCBwaHlfY29uZmlndXJlX29wdHNfbWlwaV9kcGh5ICpkcGh5X29wdHMsCj4gKwkg ICAgICAgc3RydWN0IG1peGVsX2RwaHlfY2ZnICpjZmcpCj4gK3sKQWxpZ24gZXh0cmEgcGFyYXRt ZXJzIGJlbG93IHRoZSBmaXJzdCBwYXJhbWV0ZXIgdXNpbmcgdGFicyBhbmQgYWRkIG5lY2Vzc2Fy eQpzcGFjZXMuCgo+ICsJc3RydWN0IG1peGVsX2RwaHlfcHJpdiAqcHJpdiA9IGRldl9nZXRfZHJ2 ZGF0YShwaHktPmRldi5wYXJlbnQpOwo+ICsJdW5zaWduZWQgbG9uZyByZWZfY2xrID0gY2xrX2dl dF9yYXRlKHByaXYtPnBoeV9yZWZfY2xrKTsKPiArCWludCBpOwo+ICsJdW5zaWduZWQgbG9uZyBu dW1lcmF0b3IsIGRlbm9taW5hdG9yLCBmcmVxdWVuY3k7Cj4gKwl1bnNpZ25lZCBzdGVwOwo+ICsK PiArc3RhdGljIGludCBtaXhlbF9kcGh5X3JlZl9wb3dlcl9vbihzdHJ1Y3QgcGh5ICpwaHkpCj4g K3sKPiArCXN0cnVjdCBtaXhlbF9kcGh5X3ByaXYgKnByaXYgPSBwaHlfZ2V0X2RydmRhdGEocGh5 KTsKPiArCXUzMiBsb2NrLCB0aW1lb3V0Owo+ICsJaW50IHJldCA9IDA7Cj4gKwo+ICsJbXV0ZXhf bG9jaygmcHJpdi0+bG9jayk7Cj4gKwljbGtfcHJlcGFyZV9lbmFibGUocHJpdi0+cGh5X3JlZl9j bGspOwo+ICsKPiArCXBoeV93cml0ZShwaHksIFBXUl9PTiwgRFBIWV9QRF9EUEhZKTsKPiArCXBo eV93cml0ZShwaHksIFBXUl9PTiwgRFBIWV9QRF9QTEwpOwo+ICsKPiArCXRpbWVvdXQgPSAxMDA7 Cj4gKwl3aGlsZSAoIShsb2NrID0gcGh5X3JlYWQocGh5LCBEUEhZX0xPQ0spKSkgewo+ICsJCXVk ZWxheSgxMCk7Cj4gKwkJaWYgKC0tdGltZW91dCA9PSAwKSB7Cj4gKwkJCWRldl9lcnIoJnBoeS0+ ZGV2LCAiQ291bGQgbm90IGdldCBEUEhZIGxvY2shXG4iKTsKPiArCQkJbXV0ZXhfdW5sb2NrKCZw cml2LT5sb2NrKTsKPiArCQkJcmV0dXJuIC1FSU5WQUw7Cj4gKwkJfQpVU2UgZ290byB0byBoYXZl IGEgc2luZ2xlIGV4aXQgcGF0aCB3aGVyZSB5b3UgZG8gbXV0ZXhfdW5sb2NrKCkKCj4gKwl9Cj4g KwltdXRleF91bmxvY2soJnByaXYtPmxvY2spOwo+ICsKPiArCXJldHVybiByZXQ7Cj4gK30KPiAr Cj4gKwo+ICsJbXV0ZXhfbG9jaygmcHJpdi0+bG9jayk7Cj4gKwo+ICsJcGh5X3dyaXRlKHBoeSwg MHgwMCwgRFBIWV9MT0NLX0JZUCk7Cj4gKwlwaHlfd3JpdGUocGh5LCAweDAxLCBEUEhZX1RYX1JD QUwpOwo+ICsJcGh5X3dyaXRlKHBoeSwgMHgwMCwgRFBIWV9BVVRPX1BEX0VOKTsKPiArCXBoeV93 cml0ZShwaHksIDB4MDEsIERQSFlfUlhMUFJQKTsKPiArCXBoeV93cml0ZShwaHksIDB4MDEsIERQ SFlfUlhDRFJQKTsKPiArCXBoeV93cml0ZShwaHksIDB4MjUsIERQSFlfVFNUKTsKPiArCj4gKwlt aXhlbF9waHlfc2V0X2hzX3RpbWluZ3MocGh5KTsKPiArCXJldCA9IG1peGVsX2RwaHlfc2V0X3Bs bF9wYXJhbXMocGh5KTsKPiArCWlmIChyZXQgPCAwKSB7Cj4gKwkJbXV0ZXhfdW5sb2NrKCZwcml2 LT5sb2NrKTsKPiArCQlyZXR1cm4gcmV0Owo+ICsJfQpVU2UgZ290byB0byBoYXZlIGEgc2luZ2xl IGV4aXQgcGF0aCB3aGVyZSB5b3UgZG8gbXV0ZXhfdW5sb2NrKCkKPiArCj4gKwltdXRleF91bmxv Y2soJnByaXYtPmxvY2spOwo+ICsKPiArCXJldHVybiAwOwo+ICt9Cj4gKwo+ICsKPiArLyoKPiAr ICogVGhpcyBpcyB0aGUgcmVmZXJlbmNlIGltcGxlbWVudGF0aW9uIG9mIERQSFkgaG9va3MuIFNw ZWNpZmljIGludGVncmF0aW9uIG9mCj4gKyAqIHRoaXMgSVAgbWF5IGhhdmUgdG8gcmUtaW1wbGVt ZW50IHNvbWUgb2YgdGhlbSBkZXBlbmRpbmcgb24gaG93IHRoZXkgZGVjaWRlZAo+ICsgKiB0byB3 aXJlIHRoaW5ncyBpbiB0aGUgU29DLgo+ICsgKi8KPiArc3RhdGljIGNvbnN0IHN0cnVjdCBtaXhl bF9kcGh5X29wcyBtaXhlbF9kcGh5X3JlZl9vcHMgPSB7Cj4gKwkucG93ZXJfb24gPSBtaXhlbF9k cGh5X3JlZl9wb3dlcl9vbiwKPiArCS5wb3dlcl9vZmYgPSBtaXhlbF9kcGh5X3JlZl9wb3dlcl9v ZmYsCj4gK307Cj4gKwo+ICtzdGF0aWMgY29uc3Qgc3RydWN0IHBoeV9vcHMgbWl4ZWxfZHBoeV9v cHMgPSB7Cj4gKwkucG93ZXJfb24gPSBtaXhlbF9kcGh5X3Bvd2VyX29uLAo+ICsJLnBvd2VyX29m ZiA9IG1peGVsX2RwaHlfcG93ZXJfb2ZmLAo+ICsJLmNvbmZpZ3VyZSA9IG1peGVsX2RwaHlfY29u ZmlndXJlLAo+ICsJLnZhbGlkYXRlID0gbWl4ZWxfZHBoeV92YWxpZGF0ZSwKPiArCS5vd25lciA9 IFRISVNfTU9EVUxFLAo+ICt9OwpUaGlzIGlzIGNvbmZ1c2luZy4KV2UgaGF2ZSBzdHJ1Y3QgbWl4 ZWxfZHBoeV9vcHMgPT4gbWl4ZWxfZHBoeV9yZWZfb3BzCkFuZCB0aGVuIHN0cnVjdCBwaHlfb3Bz ID0+IG1peGVsX2RwaHlfb3BzCgpTbyByZWFkaW5nIHRoaXMgdGhlcmUgYXJlIHRvIHVzZXMgb2Yg bWl4ZWxfZHBoeV9vcHMsCm9uZSBpcyBhIHN0cnVjdCwgYW5kIGFub3RoZXIgaXMgYW4gaW5zdGFu Y2Ugb2YgYW5vdGhlciB0eXBlLgpUcnkgdG8gZmluZCBhIG5pbWluZyBzY2hlbWUgdGhhdCBpcyBs ZXNzIGNvbmZ1c2luZy4KCgo+ICsKPiArc3RhdGljIGNvbnN0IHN0cnVjdCBvZl9kZXZpY2VfaWQg bWl4ZWxfZHBoeV9vZl9tYXRjaFtdID0gewo+ICsJeyAuY29tcGF0aWJsZSA9ICJtaXhlbCxpbXg4 bXEtbWlwaS1kcGh5IiwgLmRhdGEgPSAmbWl4ZWxfZHBoeV9yZWZfb3BzIH0sCj4gKwl7IC8qIHNl bnRpbmVsICovIH0sCj4gK307Ck11bHRpLWxpbmUgdG8ga2VlcCBsaW5lIHNob3J0ZXI/Cgo+ICtN T0RVTEVfREVWSUNFX1RBQkxFKG9mLCBtaXhlbF9kcGh5X29mX21hdGNoKTsKPiArCj4gK3N0YXRp YyBpbnQgbWl4ZWxfZHBoeV9wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQo+ICt7 Cj4gKwlzdHJ1Y3QgZGV2aWNlICpkZXYgPSAmcGRldi0+ZGV2Owo+ICsJc3RydWN0IGRldmljZV9u b2RlICpucCA9IGRldi0+b2Zfbm9kZTsKPiArCXN0cnVjdCBwaHlfcHJvdmlkZXIgKnBoeV9wcm92 aWRlcjsKPiArCXN0cnVjdCBtaXhlbF9kcGh5X3ByaXYgKnByaXY7Cj4gKwlzdHJ1Y3QgcmVzb3Vy Y2UgKnJlczsKPiArCXN0cnVjdCBwaHkgKnBoeTsKPiArCWludCByZXQ7Cj4gKwo+ICsJaWYgKCFu cCkKPiArCQlyZXR1cm4gLUVOT0RFVjsKPiArCj4gKwlwcml2ID0gZGV2bV9remFsbG9jKGRldiwg c2l6ZW9mKCpwcml2KSwgR0ZQX0tFUk5FTCk7Cj4gKwlpZiAoIXByaXYpCj4gKwkJcmV0dXJuIC1F Tk9NRU07Cj4gKwo+ICsJcHJpdi0+b3BzID0gb2ZfZGV2aWNlX2dldF9tYXRjaF9kYXRhKCZwZGV2 LT5kZXYpOwo+ICsJaWYgKCFwcml2LT5vcHMpCj4gKwkJcmV0dXJuIC1FSU5WQUw7Cj4gKwo+ICsJ cmVzID0gcGxhdGZvcm1fZ2V0X3Jlc291cmNlKHBkZXYsIElPUkVTT1VSQ0VfTUVNLCAwKTsKPiAr CWlmICghcmVzKQo+ICsJCXJldHVybiAtRU5PREVWOwo+ICsKPiArCXByaXYtPnJlZ3MgPSBkZXZt X2lvcmVtYXAoZGV2LCByZXMtPnN0YXJ0LCBTWl8yNTYpOwo+ICsJaWYgKElTX0VSUihwcml2LT5y ZWdzKSkKPiArCQlyZXR1cm4gUFRSX0VSUihwcml2LT5yZWdzKTsKPiArCj4gKwlwcml2LT5waHlf cmVmX2NsayA9IGRldm1fY2xrX2dldCgmcGRldi0+ZGV2LCAicGh5X3JlZiIpOwo+ICsJaWYgKElT X0VSUihwcml2LT5waHlfcmVmX2NsaykpIHsKPiArCQlkZXZfZXJyKGRldiwgIk5vIHBoeV9yZWYg Y2xvY2sgZm91bmQiKTsKPiArCQlyZXR1cm4gUFRSX0VSUihwcml2LT5waHlfcmVmX2Nsayk7Cj4g Kwl9Cj4gKwlkZXZfZGJnKGRldiwgInBoeV9yZWYgY2xvY2sgcmF0ZTogJWx1IiwgY2xrX2dldF9y YXRlKHByaXYtPnBoeV9yZWZfY2xrKSk7Cj4gKwo+ICsJbXV0ZXhfaW5pdCgmcHJpdi0+bG9jayk7 Cj4gKwlkZXZfc2V0X2RydmRhdGEoZGV2LCBwcml2KTsKPiArCj4gKwlpZiAocHJpdi0+b3BzLT5w cm9iZSkgewo+ICsJCXJldCA9IHByaXYtPm9wcy0+cHJvYmUocHJpdik7Cj4gKwkJaWYgKHJldCkK PiArCQkJcmV0dXJuIHJldDsKPiArCX0KPiArCj4gKwlwaHkgPSBkZXZtX3BoeV9jcmVhdGUoZGV2 LCBucCwgJm1peGVsX2RwaHlfb3BzKTsKPiArCWlmIChJU19FUlIocGh5KSkgewo+ICsJCWRldl9l cnIoZGV2LCAiRmFpbGVkIHRvIGNyZWF0ZSBwaHkgJWxkXG4iLCBQVFJfRVJSKHBoeSkpOwo+ICsJ CXJldHVybiBQVFJfRVJSKHBoeSk7Cj4gKwl9Cj4gKwlwaHlfc2V0X2RydmRhdGEocGh5LCBwcml2 KTsKPiArCj4gKwlwaHlfcHJvdmlkZXIgPSBkZXZtX29mX3BoeV9wcm92aWRlcl9yZWdpc3Rlcihk ZXYsIG9mX3BoeV9zaW1wbGVfeGxhdGUpOwo+ICsKPiArCXJldHVybiBQVFJfRVJSX09SX1pFUk8o cGh5X3Byb3ZpZGVyKTsKPiArfQo+ICsKPiArc3RhdGljIHN0cnVjdCBwbGF0Zm9ybV9kcml2ZXIg bWl4ZWxfZHBoeV9kcml2ZXIgPSB7Cj4gKwkucHJvYmUJPSBtaXhlbF9kcGh5X3Byb2JlLAo+ICsJ LmRyaXZlciA9IHsKPiArCQkubmFtZSA9ICJtaXhlbC1taXBpLWRwaHkiLAo+ICsJCS5vZl9tYXRj aF90YWJsZQk9IG1peGVsX2RwaHlfb2ZfbWF0Y2gsCj4gKwl9Cj4gK307Cj4gK21vZHVsZV9wbGF0 Zm9ybV9kcml2ZXIobWl4ZWxfZHBoeV9kcml2ZXIpOwo+ICsKPiArTU9EVUxFX0FVVEhPUigiTlhQ IFNlbWljb25kdWN0b3IiKTsKPiArTU9EVUxFX0RFU0NSSVBUSU9OKCJNaXhlbCBNSVBJLURTSSBQ SFkgZHJpdmVyIik7Cj4gK01PRFVMRV9MSUNFTlNFKCJHUEwgdjIiKTsKPiAtLSAKPiAyLjIwLjEK PiAKPiBfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwo+IGRy aS1kZXZlbCBtYWlsaW5nIGxpc3QKPiBkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCj4g aHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg==