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From: "Gustavo A. R. Silva" <gustavo@embeddedor.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	x86@kernel.org
Cc: linux-kernel@vger.kernel.org,
	"Gustavo A. R. Silva" <gustavo@embeddedor.com>,
	Kees Cook <keescook@chromium.org>
Subject: [PATCH] x86/events: Mark expected switch fall-throughs
Date: Fri, 25 Jan 2019 12:49:17 -0600	[thread overview]
Message-ID: <20190125184917.GA7289@embeddedor> (raw)

In preparation to enabling -Wimplicit-fallthrough, mark switch
cases where we are expecting to fall through.

This patch fixes the following warnings:

In file included from arch/x86/events/intel/core.c:22:
arch/x86/events/intel/core.c: In function ‘intel_pmu_init’:
arch/x86/events/intel/../perf_event.h:668:17: warning: this statement may fall through [-Wimplicit-fallthrough=]
  x86_pmu.quirks = &__quirk;     \
  ~~~~~~~~~~~~~~~^~~~~~~~~~
arch/x86/events/intel/core.c:4170:3: note: in expansion of macro ‘x86_add_quirk’
   x86_add_quirk(intel_clovertown_quirk);
   ^~~~~~~~~~~~~
arch/x86/events/intel/core.c:4171:2: note: here
  case INTEL_FAM6_CORE2_MEROM_L:
  ^~~~
arch/x86/events/intel/lbr.c:929:6: warning: this statement may fall through [-Wimplicit-fallthrough=]

Warning level 3 was used: -Wimplicit-fallthrough=3

This patch is part of the ongoing efforts to enabling -Wimplicit-fallthrough.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
---
 arch/x86/events/intel/core.c | 2 ++
 arch/x86/events/intel/lbr.c  | 1 +
 2 files changed, 3 insertions(+)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 40e12cfc87f6..ece43e7e4569 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4168,6 +4168,8 @@ __init int intel_pmu_init(void)
 
 	case INTEL_FAM6_CORE2_MEROM:
 		x86_add_quirk(intel_clovertown_quirk);
+		/* fall through */
+
 	case INTEL_FAM6_CORE2_MEROM_L:
 	case INTEL_FAM6_CORE2_PENRYN:
 	case INTEL_FAM6_CORE2_DUNNINGTON:
diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
index c88ed39582a1..580c1b91c454 100644
--- a/arch/x86/events/intel/lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -931,6 +931,7 @@ static int branch_type(unsigned long from, unsigned long to, int abort)
 			ret = X86_BR_ZERO_CALL;
 			break;
 		}
+		/* fall through */
 	case 0x9a: /* call far absolute */
 		ret = X86_BR_CALL;
 		break;
-- 
2.20.1


             reply	other threads:[~2019-01-25 18:49 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-25 18:49 Gustavo A. R. Silva [this message]
2019-01-29 15:25 ` [PATCH] x86/events: Mark expected switch fall-throughs Borislav Petkov
2019-01-29 15:58   ` Gustavo A. R. Silva
2019-01-29 16:07     ` Borislav Petkov
2019-01-29 16:19       ` Gustavo A. R. Silva
2019-01-29 17:04         ` Borislav Petkov
2019-01-29 17:09           ` Gustavo A. R. Silva
2019-01-29 15:27 ` [tip:x86/cleanups] x86/events: Mark expected switch-case fall-throughs tip-bot for Gustavo A. R. Silva

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