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[209.51.188.17]) by mx.google.com with ESMTPS id i67si29674425wmi.164.2019.01.25.15.03.31 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 25 Jan 2019 15:03:31 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org" Received: from localhost ([127.0.0.1]:52087 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gnAVW-0001E1-MH for alex.bennee@linaro.org; Fri, 25 Jan 2019 18:03:30 -0500 Received: from eggs.gnu.org ([209.51.188.92]:52578) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gn9M8-0001Sj-Kp for qemu-devel@nongnu.org; Fri, 25 Jan 2019 16:49:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gn9M7-00035o-Ai for qemu-devel@nongnu.org; Fri, 25 Jan 2019 16:49:44 -0500 Received: from poy.remlab.net ([2001:41d0:2:5a1a::]:42982 helo=ns207790.ip-94-23-215.eu) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gn9M5-0002wk-BT; Fri, 25 Jan 2019 16:49:41 -0500 Received: from basile.remlab.net (ip6-localhost [IPv6:::1]) by ns207790.ip-94-23-215.eu (Postfix) with ESMTP id 126DB5FBCB; Fri, 25 Jan 2019 22:49:27 +0100 (CET) From: =?UTF-8?q?R=C3=A9mi=20Denis-Courmont?= To: qemu-arm@nongnu.org Date: Fri, 25 Jan 2019 23:49:25 +0200 Message-Id: <20190125214926.3204-2-remi@remlab.net> X-Mailer: git-send-email 2.20.1 In-Reply-To: <1648289.tQCHxfjYn9@basile.remlab.net> References: <1648289.tQCHxfjYn9@basile.remlab.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:41d0:2:5a1a:: X-Mailman-Approved-At: Fri, 25 Jan 2019 18:02:26 -0500 Subject: [Qemu-devel] [PATCH 2/3] target/arm: actually enable PAuth in user mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-devel" X-TUID: QPhl/WRkmMQg From: Remi Denis-Courmont This always enables IA, IB, DA and DB keys in user mode on the maximum CPU, in a manner that is consistent with the other CPUs. That is to say redefining the reset value of SCTLR_ELx registers. Without this patch, the PAC* and AUT* instructions have no effects (except PACGA of course). Signed-off-by: Remi Denis-Courmont --- target/arm/cpu64.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index e9bc461c36..148c103ca4 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -413,8 +413,8 @@ static void aarch64_max_initfn(Object *obj) (void *)&apdb_bit, &error_fatal); =20 /* Enable all PAC keys by default. */ - cpu->env.cp15.sctlr_el[1] |=3D SCTLR_EnIA | SCTLR_EnIB; - cpu->env.cp15.sctlr_el[1] |=3D SCTLR_EnDA | SCTLR_EnDB; + cpu->reset_sctlr |=3D SCTLR_EnIA | SCTLR_EnIB; + cpu->reset_sctlr |=3D SCTLR_EnDA | SCTLR_EnDB; } #endif =20 --=20 2.20.1