From: "Rémi Denis-Courmont" <remi@remlab.net>
To: qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org
Subject: [Qemu-arm] [PATCHv2 1/3] target/arm: fix AArch64 virtual address space size
Date: Sat, 26 Jan 2019 08:52:10 +0200 [thread overview]
Message-ID: <20190126065211.3587-1-remi@remlab.net> (raw)
In-Reply-To: <1648289.tQCHxfjYn9@basile.remlab.net>
From: Remi Denis-Courmont <remi.denis.courmont@huawei.com>
Since QEMU does not support the ARMv8.2-LVA, Large Virtual Address,
extension (yet), the VA address space is 48-bits plus a sign bit. User
mode can only handle the positive half of the address space, so that
makes a limit of 48 bits.
(With LVA, it would be 53 and 52 bits respectively.)
The incorrectly large address space conflicts with PAuth instructions,
which bits 48-54 and 56-63 for the pointer authentication code. This
also conflicts with (as yet unsupported by QEMU) data tagging and with
the ARMv8.5-MTE extension.
Signed-off-by: Remi Denis-Courmont <remi.denis.courmont@huawei.com>
---
target/arm/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ff81db420d..a3781600ba 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2503,7 +2503,7 @@ bool write_cpustate_to_list(ARMCPU *cpu);
#if defined(TARGET_AARCH64)
# define TARGET_PHYS_ADDR_SPACE_BITS 48
-# define TARGET_VIRT_ADDR_SPACE_BITS 64
+# define TARGET_VIRT_ADDR_SPACE_BITS 48
#else
# define TARGET_PHYS_ADDR_SPACE_BITS 40
# define TARGET_VIRT_ADDR_SPACE_BITS 32
--
2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: "Rémi Denis-Courmont" <remi@remlab.net>
To: qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCHv2 1/3] target/arm: fix AArch64 virtual address space size
Date: Sat, 26 Jan 2019 08:52:10 +0200 [thread overview]
Message-ID: <20190126065211.3587-1-remi@remlab.net> (raw)
In-Reply-To: <1648289.tQCHxfjYn9@basile.remlab.net>
From: Remi Denis-Courmont <remi.denis.courmont@huawei.com>
Since QEMU does not support the ARMv8.2-LVA, Large Virtual Address,
extension (yet), the VA address space is 48-bits plus a sign bit. User
mode can only handle the positive half of the address space, so that
makes a limit of 48 bits.
(With LVA, it would be 53 and 52 bits respectively.)
The incorrectly large address space conflicts with PAuth instructions,
which bits 48-54 and 56-63 for the pointer authentication code. This
also conflicts with (as yet unsupported by QEMU) data tagging and with
the ARMv8.5-MTE extension.
Signed-off-by: Remi Denis-Courmont <remi.denis.courmont@huawei.com>
---
target/arm/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ff81db420d..a3781600ba 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2503,7 +2503,7 @@ bool write_cpustate_to_list(ARMCPU *cpu);
#if defined(TARGET_AARCH64)
# define TARGET_PHYS_ADDR_SPACE_BITS 48
-# define TARGET_VIRT_ADDR_SPACE_BITS 64
+# define TARGET_VIRT_ADDR_SPACE_BITS 48
#else
# define TARGET_PHYS_ADDR_SPACE_BITS 40
# define TARGET_VIRT_ADDR_SPACE_BITS 32
--
2.20.1
next prev parent reply other threads:[~2019-01-26 6:52 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-25 21:48 [Qemu-arm] [PATCH 0/3] target/arm: fix PAuth in user mode Rémi Denis-Courmont
2019-01-25 21:48 ` [Qemu-devel] " Rémi Denis-Courmont
2019-01-25 21:49 ` [Qemu-arm] [PATCH 1/3] target/arm: fix AArch64 virtual address space size Rémi Denis-Courmont
2019-01-25 21:49 ` [Qemu-devel] " Rémi Denis-Courmont
2019-01-25 23:29 ` [Qemu-arm] " Richard Henderson
2019-01-25 23:29 ` Richard Henderson
2019-01-26 6:36 ` [Qemu-arm] " Rémi Denis-Courmont
2019-01-26 6:36 ` [Qemu-devel] [Qemu-arm] " Rémi Denis-Courmont
2019-01-26 6:46 ` [Qemu-arm] [Qemu-devel] " Rémi Denis-Courmont
2019-01-26 6:46 ` [Qemu-devel] [Qemu-arm] " Rémi Denis-Courmont
2019-01-26 20:00 ` [Qemu-arm] [Qemu-devel] " Richard Henderson
2019-01-26 20:00 ` [Qemu-devel] [Qemu-arm] " Richard Henderson
2019-01-25 21:49 ` [Qemu-devel] [PATCH 2/3] target/arm: actually enable PAuth in user mode Rémi Denis-Courmont
2019-01-25 23:34 ` [Qemu-arm] " Richard Henderson
2019-01-25 23:34 ` Richard Henderson
2019-01-25 21:49 ` [Qemu-arm] [PATCH 3/3] target/arm: fix decoding of B{,L}RA{A,B} Rémi Denis-Courmont
2019-01-25 21:49 ` [Qemu-devel] " Rémi Denis-Courmont
2019-01-25 23:40 ` [Qemu-arm] [Qemu-devel] [PATCH 3/3] target/arm: fix decoding of B{, L}RA{A, B} Richard Henderson
2019-01-25 23:40 ` Richard Henderson
2019-01-27 19:06 ` [Qemu-arm] " Richard Henderson
2019-01-27 19:06 ` Richard Henderson
2019-01-26 6:52 ` Rémi Denis-Courmont [this message]
2019-01-26 6:52 ` [Qemu-devel] [PATCHv2 1/3] target/arm: fix AArch64 virtual address space size Rémi Denis-Courmont
2019-01-27 18:47 ` Richard Henderson
2019-01-26 6:52 ` [Qemu-arm] [PATCHv2 2/3] target/arm: actually enable PAuth in user mode Rémi Denis-Courmont
2019-01-26 6:52 ` [Qemu-devel] " Rémi Denis-Courmont
2019-01-27 18:48 ` [Qemu-arm] " Richard Henderson
2019-01-27 18:48 ` Richard Henderson
2019-02-01 15:27 ` [Qemu-arm] [PATCH 0/3] target/arm: fix " Peter Maydell
2019-02-01 15:27 ` [Qemu-devel] " Peter Maydell
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