From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7B83C282C7 for ; Tue, 29 Jan 2019 23:12:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 55D8220882 for ; Tue, 29 Jan 2019 23:12:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="anZDZHlv" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729748AbfA2XMV (ORCPT ); Tue, 29 Jan 2019 18:12:21 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:59951 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726980AbfA2XMU (ORCPT ); Tue, 29 Jan 2019 18:12:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=j/+E2sx1ktpUneU5A+RWnZHtpLJG4dNVqcaJgquS424=; b=anZDZHlvJGgh0Cv13Py2vr9BaY ZY6Em1QHEEZVaKXo94xaYZSIkYXDyuYV06vKz17AcpAeDzurRdMYo+AisQaS+bE3bqKBTsflyWJAd h3n2Bub631CNVrNC9VR1S9rZ9LxmwA1rBD6g9UEjihOgeaC+AK02YI/Q8awHWOmGtHd8=; Received: from andrew by vps0.lunn.ch with local (Exim 4.89) (envelope-from ) id 1gocYD-0005b4-Ed; Wed, 30 Jan 2019 00:12:17 +0100 Date: Wed, 30 Jan 2019 00:12:17 +0100 From: Andrew Lunn To: Pavel Machek Cc: netdev@vger.kernel.org, f.fainelli@gmail.com, buytenh@marvell.com, buytenh@wantstofly.org, nico@marvell.com Subject: Re: mv88e6xxx -- DSA support for Marvell 88e6065 switch (and maybe 88e6060?) Message-ID: <20190129231217.GH13334@lunn.ch> References: <20181115195111.GA9946@amd> <20181115202618.GF32274@lunn.ch> <20181118180712.GA16507@amd> <20181118182053.GE7446@lunn.ch> <20190129225732.GA11686@amd> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190129225732.GA11686@amd> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org > Is someone is interested in getting 6060 to work with mv88e6xxx? Vivien is. I also have a set of patches which modernize the driver. That might be a step towards merging it in. > @@ -2126,6 +2146,7 @@ static int mv88e6xxx_setup_egress_floods(struct mv88e6xxx_chip *chip, int port) > > /* Upstream ports flood frames with unknown unicast or multicast DA */ > flood = dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port); > + flood = 1; /* This is strange, but original driver also sets flood everywhere */ This might be because the driver did not support hardware offload. What happens if you don't have this? > +static const struct mv88e6xxx_ops mv88e6065_ops = { > + /* MV88E6XXX_FAMILY_6095 */ /* Here */ > + //.ieee_pri_map = mv88e6085_g1_ieee_pri_map, /* FIXME */ > + // .ip_pri_map = mv88e6085_g1_ip_pri_map, /* FIXME */ > + // .set_switch_mac = mv88e6xxx_g1_set_switch_mac, /* FIXME */ What you should do is see if the hardware supports these functions. If it does not, simply leave it out of mv88e6065_ops. If it does have the functionality, but needs a new implementation, add a mv88e6065_ version. In theory, nearly everything is optional. So you can start simple and then add features. Andrew