From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v2 1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings Date: Wed, 30 Jan 2019 14:02:18 -0600 Message-ID: <20190130200218.GB5908@bogus> References: <1548761715-4004-1-git-send-email-jorge.ramirez-ortiz@linaro.org> <1548761715-4004-2-git-send-email-jorge.ramirez-ortiz@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1548761715-4004-2-git-send-email-jorge.ramirez-ortiz@linaro.org> Sender: linux-kernel-owner@vger.kernel.org To: Jorge Ramirez-Ortiz Cc: gregkh@linuxfoundation.org, mark.rutland@arm.com, kishon@ti.com, jackp@codeaurora.org, andy.gross@linaro.org, swboyd@chromium.org, shawn.guo@linaro.org, vkoul@kernel.org, bjorn.andersson@linaro.org, khasim.mohammed@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org On Tue, Jan 29, 2019 at 12:35:14PM +0100, Jorge Ramirez-Ortiz wrote: > Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY > controller embedded in QCS404. > > Based on Sriharsha Allenki's original > definitions. > > Signed-off-by: Jorge Ramirez-Ortiz > --- > .../devicetree/bindings/usb/qcom,usb-ssphy.txt | 73 ++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > > diff --git a/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > new file mode 100644 > index 0000000..8ef6e39 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > @@ -0,0 +1,73 @@ > +Qualcomm Synopsys 1.0.0 SS phy controller > +=========================================== > + > +Synopsys 1.0.0 ss phy controller supports SS usb connectivity on Qualcomm > +chipsets > + > +Required properties: > + > +- compatible: > + Value type: > + Definition: Should contain "qcom,usb-ssphy". This is in no way specific enough. > + > +- reg: > + Value type: > + Definition: USB PHY base address and length of the register map. > + > +- #phy-cells: > + Value type: > + Definition: Should be 0. See phy/phy-bindings.txt for details. > + > +- clocks: > + Value type: > + Definition: See clock-bindings.txt section "consumers". List of > + three clock specifiers for reference, phy core and > + pipe clocks. > + > +- clock-names: > + Value type: > + Definition: Names of the clocks in 1-1 correspondence with the "clocks" > + property. Must contain "ref", "phy" and "pipe". > + > +- vdd-supply: > + Value type: > + Definition: phandle to the regulator VDD supply node. > + > +- vdda1p8-supply: > + Value type: > + Definition: phandle to the regulator 1.8V supply node. > + > + > +Optional child nodes: > + > +- vbus-supply: > + Value type: > + Definition: phandle to the VBUS supply node. Does the phy actually get supplied by Vbus? If not, then Vbus supply should be defined in a USB connector node. > + > +- resets: > + Value type: > + Definition: See reset.txt section "consumers". PHY reset specifiers > + for phy core and COR resets. COR or COM? Looks to me the order is reversed. > + > +- reset-names: > + Value type: > + Definition: Names of the resets in 1-1 correspondence with the "resets" > + property. Must contain "com" and "phy". > + > +Example: > + > +usb3_phy: phy@78000 { usb3-phy@... > + compatible = "qcom,usb-ssphy"; > + reg = <0x78000 0x400>; > + #phy-cells = <0>; > + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, > + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, > + <&gcc GCC_USB3_PHY_PIPE_CLK>; > + clock-names = "ref", "phy", "pipe"; > + resets = <&gcc GCC_USB3_PHY_BCR>, > + <&gcc GCC_USB3PHY_PHY_BCR>; > + reset-names = "com", "phy"; > + vdd-supply = <&vreg_l3_1p05>; > + vdda1p8-supply = <&vreg_l5_1p8>; > + vbus-supply = <&usb3_vbus_reg>; > +}; > -- > 2.7.4 > From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v2,1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings From: Rob Herring Message-Id: <20190130200218.GB5908@bogus> Date: Wed, 30 Jan 2019 14:02:18 -0600 To: Jorge Ramirez-Ortiz Cc: gregkh@linuxfoundation.org, mark.rutland@arm.com, kishon@ti.com, jackp@codeaurora.org, andy.gross@linaro.org, swboyd@chromium.org, shawn.guo@linaro.org, vkoul@kernel.org, bjorn.andersson@linaro.org, khasim.mohammed@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org List-ID: T24gVHVlLCBKYW4gMjksIDIwMTkgYXQgMTI6MzU6MTRQTSArMDEwMCwgSm9yZ2UgUmFtaXJlei1P cnRpeiB3cm90ZToKPiBCaW5kaW5nIGRlc2NyaXB0aW9uIGZvciBRdWFsY29tbSdzIFN5bm9wc3lz IDEuMC4wIHN1cGVyLXNwZWVkIFBIWQo+IGNvbnRyb2xsZXIgZW1iZWRkZWQgaW4gUUNTNDA0Lgo+ IAo+IEJhc2VkIG9uIFNyaWhhcnNoYSBBbGxlbmtpJ3MgPHNhbGxlbmtpQGNvZGVhdXJvcmEub3Jn PiBvcmlnaW5hbAo+IGRlZmluaXRpb25zLgo+IAo+IFNpZ25lZC1vZmYtYnk6IEpvcmdlIFJhbWly ZXotT3J0aXogPGpvcmdlLnJhbWlyZXotb3J0aXpAbGluYXJvLm9yZz4KPiAtLS0KPiAgLi4uL2Rl dmljZXRyZWUvYmluZGluZ3MvdXNiL3Fjb20sdXNiLXNzcGh5LnR4dCAgICAgfCA3MyArKysrKysr KysrKysrKysrKysrKysrCj4gIDEgZmlsZSBjaGFuZ2VkLCA3MyBpbnNlcnRpb25zKCspCj4gIGNy ZWF0ZSBtb2RlIDEwMDY0NCBEb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvdXNiL3Fj b20sdXNiLXNzcGh5LnR4dAo+IAo+IGRpZmYgLS1naXQgYS9Eb2N1bWVudGF0aW9uL2RldmljZXRy ZWUvYmluZGluZ3MvdXNiL3Fjb20sdXNiLXNzcGh5LnR4dCBiL0RvY3VtZW50YXRpb24vZGV2aWNl dHJlZS9iaW5kaW5ncy91c2IvcWNvbSx1c2Itc3NwaHkudHh0Cj4gbmV3IGZpbGUgbW9kZSAxMDA2 NDQKPiBpbmRleCAwMDAwMDAwLi44ZWY2ZTM5Cj4gLS0tIC9kZXYvbnVsbAo+ICsrKyBiL0RvY3Vt ZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy91c2IvcWNvbSx1c2Itc3NwaHkudHh0Cj4gQEAg LTAsMCArMSw3MyBAQAo+ICtRdWFsY29tbSBTeW5vcHN5cyAxLjAuMCBTUyBwaHkgY29udHJvbGxl cgo+ICs9PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09Cj4gKwo+ICtT eW5vcHN5cyAxLjAuMCBzcyBwaHkgY29udHJvbGxlciBzdXBwb3J0cyBTUyB1c2IgY29ubmVjdGl2 aXR5IG9uIFF1YWxjb21tCj4gK2NoaXBzZXRzCj4gKwo+ICtSZXF1aXJlZCBwcm9wZXJ0aWVzOgo+ ICsKPiArLSBjb21wYXRpYmxlOgo+ICsgICAgVmFsdWUgdHlwZTogPHN0cmluZz4KPiArICAgIERl ZmluaXRpb246IFNob3VsZCBjb250YWluICJxY29tLHVzYi1zc3BoeSIuCgpUaGlzIGlzIGluIG5v IHdheSBzcGVjaWZpYyBlbm91Z2guCgo+ICsKPiArLSByZWc6Cj4gKyAgICBWYWx1ZSB0eXBlOiA8 cHJvcC1lbmNvZGVkLWFycmF5Pgo+ICsgICAgRGVmaW5pdGlvbjogVVNCIFBIWSBiYXNlIGFkZHJl c3MgYW5kIGxlbmd0aCBvZiB0aGUgcmVnaXN0ZXIgbWFwLgo+ICsKPiArLSAjcGh5LWNlbGxzOgo+ ICsgICAgVmFsdWUgdHlwZTogPHUzMj4KPiArICAgIERlZmluaXRpb246IFNob3VsZCBiZSAwLiBT ZWUgcGh5L3BoeS1iaW5kaW5ncy50eHQgZm9yIGRldGFpbHMuCj4gKwo+ICstIGNsb2NrczoKPiAr ICAgIFZhbHVlIHR5cGU6IDxwcm9wLWVuY29kZWQtYXJyYXk+Cj4gKyAgICBEZWZpbml0aW9uOiBT ZWUgY2xvY2stYmluZGluZ3MudHh0IHNlY3Rpb24gImNvbnN1bWVycyIuIExpc3Qgb2YKPiArCQkg dGhyZWUgY2xvY2sgc3BlY2lmaWVycyBmb3IgcmVmZXJlbmNlLCBwaHkgY29yZSBhbmQKPiArCQkg cGlwZSBjbG9ja3MuCj4gKwo+ICstIGNsb2NrLW5hbWVzOgo+ICsgICAgVmFsdWUgdHlwZTogPHN0 cmluZz4KPiArICAgIERlZmluaXRpb246IE5hbWVzIG9mIHRoZSBjbG9ja3MgaW4gMS0xIGNvcnJl c3BvbmRlbmNlIHdpdGggdGhlICJjbG9ja3MiCj4gKwkJIHByb3BlcnR5LiBNdXN0IGNvbnRhaW4g InJlZiIsICJwaHkiIGFuZCAicGlwZSIuCj4gKwo+ICstIHZkZC1zdXBwbHk6Cj4gKyAgICBWYWx1 ZSB0eXBlOiA8cGhhbmRsZT4KPiArICAgIERlZmluaXRpb246IHBoYW5kbGUgdG8gdGhlIHJlZ3Vs YXRvciBWREQgc3VwcGx5IG5vZGUuCj4gKwo+ICstIHZkZGExcDgtc3VwcGx5Ogo+ICsgICAgVmFs dWUgdHlwZTogPHBoYW5kbGU+Cj4gKyAgICBEZWZpbml0aW9uOiBwaGFuZGxlIHRvIHRoZSByZWd1 bGF0b3IgMS44ViBzdXBwbHkgbm9kZS4KPiArCj4gKwo+ICtPcHRpb25hbCBjaGlsZCBub2RlczoK PiArCj4gKy0gdmJ1cy1zdXBwbHk6Cj4gKyAgICBWYWx1ZSB0eXBlOiA8cGhhbmRsZT4KPiArICAg IERlZmluaXRpb246IHBoYW5kbGUgdG8gdGhlIFZCVVMgc3VwcGx5IG5vZGUuCgpEb2VzIHRoZSBw aHkgYWN0dWFsbHkgZ2V0IHN1cHBsaWVkIGJ5IFZidXM/IElmIG5vdCwgdGhlbiBWYnVzIHN1cHBs eSAKc2hvdWxkIGJlIGRlZmluZWQgaW4gYSBVU0IgY29ubmVjdG9yIG5vZGUuCgo+ICsKPiArLSBy ZXNldHM6Cj4gKyAgICBWYWx1ZSB0eXBlOiA8cHJvcC1lbmNvZGVkLWFycmF5Pgo+ICsgICAgRGVm aW5pdGlvbjogU2VlIHJlc2V0LnR4dCBzZWN0aW9uICJjb25zdW1lcnMiLiBQSFkgcmVzZXQgc3Bl Y2lmaWVycwo+ICsJCSBmb3IgcGh5IGNvcmUgYW5kIENPUiByZXNldHMuCgpDT1Igb3IgQ09NPwoK TG9va3MgdG8gbWUgdGhlIG9yZGVyIGlzIHJldmVyc2VkLgoKPiArCj4gKy0gcmVzZXQtbmFtZXM6 Cj4gKyAgICBWYWx1ZSB0eXBlOiA8c3RyaW5nPgo+ICsgICAgRGVmaW5pdGlvbjogTmFtZXMgb2Yg dGhlIHJlc2V0cyBpbiAxLTEgY29ycmVzcG9uZGVuY2Ugd2l0aCB0aGUgInJlc2V0cyIKPiArCQkg cHJvcGVydHkuIE11c3QgY29udGFpbiAiY29tIiBhbmQgInBoeSIuCj4gKwo+ICtFeGFtcGxlOgo+ ICsKPiArdXNiM19waHk6IHBoeUA3ODAwMCB7Cgp1c2IzLXBoeUAuLi4KCj4gKwljb21wYXRpYmxl ID0gInFjb20sdXNiLXNzcGh5IjsKPiArCXJlZyA9IDwweDc4MDAwIDB4NDAwPjsKPiArCSNwaHkt Y2VsbHMgPSA8MD47Cj4gKwljbG9ja3MgPSA8JnJwbWNjIFJQTV9TTURfTE5fQkJfQ0xLPiwKPiAr CQkgPCZnY2MgR0NDX1VTQl9IU19QSFlfQ0ZHX0FIQl9DTEs+LAo+ICsJCSA8JmdjYyBHQ0NfVVNC M19QSFlfUElQRV9DTEs+Owo+ICsJY2xvY2stbmFtZXMgPSAicmVmIiwgInBoeSIsICJwaXBlIjsK PiArCXJlc2V0cyA9IDwmZ2NjIEdDQ19VU0IzX1BIWV9CQ1I+LAo+ICsJCSA8JmdjYyBHQ0NfVVNC M1BIWV9QSFlfQkNSPjsKPiArCXJlc2V0LW5hbWVzID0gImNvbSIsICJwaHkiOwo+ICsJdmRkLXN1 cHBseSA9IDwmdnJlZ19sM18xcDA1PjsKPiArCXZkZGExcDgtc3VwcGx5ID0gPCZ2cmVnX2w1XzFw OD47Cj4gKwl2YnVzLXN1cHBseSA9IDwmdXNiM192YnVzX3JlZz47Cj4gK307Cj4gLS0gCj4gMi43 LjQKPgo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS, URIBL_BLOCKED,USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 148EDC282D8 for ; Wed, 30 Jan 2019 20:02:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D5DF220989 for ; Wed, 30 Jan 2019 20:02:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Il66eJhZ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D5DF220989 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=q2ew3E/NvB5MIWLjYJmhGuDhM79Q3Gliu9na245uJyc=; b=Il66eJhZp9p5lQ YpY+WZMj0UQscM5rFjPsqnzv1L1cUk/szp04Papiccg+jAKAh4JlvH3CoV8jTawWqkg6fXmthys0s uZABLYSjLAMssh8ZWKT1cWIQO6KdC8a2Fd6DYRHkkeCAmDK0lq9YtQizWZj0iQ/qYk6THRxnaKsbg UFzy7P4Dfd58VUHd/rutRD5ZFMtC3aUGDNO0cE2oybf/p43vJj4ogtBt1OPKwhptEACdLBgE5jLMf mo3lvOfAv9SEPE27hGzOs/nXrl4M3Y7niDqcWAvTDPbkxdy+VXN/3VE5TNp9X35EdLT5C52gaQWoe LS/MlliCOnlruP00f5bw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gow41-0003g5-Oe; Wed, 30 Jan 2019 20:02:25 +0000 Received: from mail-oi1-f193.google.com ([209.85.167.193]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gow3w-0003fc-Uh for linux-arm-kernel@lists.infradead.org; Wed, 30 Jan 2019 20:02:23 +0000 Received: by mail-oi1-f193.google.com with SMTP id u18so689791oie.10 for ; Wed, 30 Jan 2019 12:02:20 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=z7U4FwF4rwvNfXRrLtt0q+Bh7E9FjuCDZRhkCbsAnKo=; b=IHRNP1UllYA9h37lpLMvB/RpZ/IK0MCeX/+y5L1WjY8GS1+JKqwryYfFtKgLqD8H7v kH9SlXXUlvPn8GeHVn2rZr/sMCBr15doF7vH5yo6Jf2nJzqF36+uUATrlW4jyYrtqBi4 Mk119PU1GwllV/SAMs/cgaaCWvpe4D/daH5MVWnnTgY/2BH13tJFpLWBwP9pV1EUafuJ V3J3nKB9f1SqacU+tsDPxsdo9kkBxAI1/lOT7xnBlsZDzT2RpeBRXpkRzWyeCCIdg+aA mmQQ2n88/KuLgwsFOJLbC+qw+AHYC0/kJd6ypWJOLvOYDELkr0EEWl5Zb5zA4TH77bVl OlKw== X-Gm-Message-State: AJcUukc1ID4F8UoWBGzKzplA8wKwSVSRpEhEmOc8SyLSP3D45zwLAMXc rMnKvHH4l/yFsPxyi8jClQ== X-Google-Smtp-Source: ALg8bN6UVC6iZTdLJlj4jcLfLc176T8NLD5kdGdWZIYeHNOXIPBLYnhsLAJr7zyLp9iqK1O/Pr1uUw== X-Received: by 2002:aca:c413:: with SMTP id u19mr12736474oif.209.1548878539803; Wed, 30 Jan 2019 12:02:19 -0800 (PST) Received: from localhost (24-155-109-49.dyn.grandenetworks.net. [24.155.109.49]) by smtp.gmail.com with ESMTPSA id u109sm925002otb.8.2019.01.30.12.02.18 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 30 Jan 2019 12:02:18 -0800 (PST) Date: Wed, 30 Jan 2019 14:02:18 -0600 From: Rob Herring To: Jorge Ramirez-Ortiz Subject: Re: [PATCH v2 1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings Message-ID: <20190130200218.GB5908@bogus> References: <1548761715-4004-1-git-send-email-jorge.ramirez-ortiz@linaro.org> <1548761715-4004-2-git-send-email-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1548761715-4004-2-git-send-email-jorge.ramirez-ortiz@linaro.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190130_120222_229709_2C90637D X-CRM114-Status: GOOD ( 18.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, jackp@codeaurora.org, shawn.guo@linaro.org, gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, khasim.mohammed@linaro.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, vkoul@kernel.org, bjorn.andersson@linaro.org, linux-arm-msm@vger.kernel.org, andy.gross@linaro.org, kishon@ti.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jan 29, 2019 at 12:35:14PM +0100, Jorge Ramirez-Ortiz wrote: > Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY > controller embedded in QCS404. > > Based on Sriharsha Allenki's original > definitions. > > Signed-off-by: Jorge Ramirez-Ortiz > --- > .../devicetree/bindings/usb/qcom,usb-ssphy.txt | 73 ++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > > diff --git a/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > new file mode 100644 > index 0000000..8ef6e39 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > @@ -0,0 +1,73 @@ > +Qualcomm Synopsys 1.0.0 SS phy controller > +=========================================== > + > +Synopsys 1.0.0 ss phy controller supports SS usb connectivity on Qualcomm > +chipsets > + > +Required properties: > + > +- compatible: > + Value type: > + Definition: Should contain "qcom,usb-ssphy". This is in no way specific enough. > + > +- reg: > + Value type: > + Definition: USB PHY base address and length of the register map. > + > +- #phy-cells: > + Value type: > + Definition: Should be 0. See phy/phy-bindings.txt for details. > + > +- clocks: > + Value type: > + Definition: See clock-bindings.txt section "consumers". List of > + three clock specifiers for reference, phy core and > + pipe clocks. > + > +- clock-names: > + Value type: > + Definition: Names of the clocks in 1-1 correspondence with the "clocks" > + property. Must contain "ref", "phy" and "pipe". > + > +- vdd-supply: > + Value type: > + Definition: phandle to the regulator VDD supply node. > + > +- vdda1p8-supply: > + Value type: > + Definition: phandle to the regulator 1.8V supply node. > + > + > +Optional child nodes: > + > +- vbus-supply: > + Value type: > + Definition: phandle to the VBUS supply node. Does the phy actually get supplied by Vbus? If not, then Vbus supply should be defined in a USB connector node. > + > +- resets: > + Value type: > + Definition: See reset.txt section "consumers". PHY reset specifiers > + for phy core and COR resets. COR or COM? Looks to me the order is reversed. > + > +- reset-names: > + Value type: > + Definition: Names of the resets in 1-1 correspondence with the "resets" > + property. Must contain "com" and "phy". > + > +Example: > + > +usb3_phy: phy@78000 { usb3-phy@... > + compatible = "qcom,usb-ssphy"; > + reg = <0x78000 0x400>; > + #phy-cells = <0>; > + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, > + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, > + <&gcc GCC_USB3_PHY_PIPE_CLK>; > + clock-names = "ref", "phy", "pipe"; > + resets = <&gcc GCC_USB3_PHY_BCR>, > + <&gcc GCC_USB3PHY_PHY_BCR>; > + reset-names = "com", "phy"; > + vdd-supply = <&vreg_l3_1p05>; > + vdda1p8-supply = <&vreg_l5_1p8>; > + vbus-supply = <&usb3_vbus_reg>; > +}; > -- > 2.7.4 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel