From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marcel Ziswiler Date: Fri, 1 Feb 2019 16:04:50 +0100 Subject: [U-Boot] [PATCH v1 2/3] imx: serial_mxc: disable ri and dcd irq in dte mode In-Reply-To: <20190201150451.4818-1-marcel@ziswiler.com> References: <20190201150451.4818-1-marcel@ziswiler.com> Message-ID: <20190201150451.4818-3-marcel@ziswiler.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Max Krummenacher If the UART is used in DTE mode the RI and DCD bits in UCR3 become irq enable bits. Both are set to enabled after reset and both likely are pending. Disable the bits to prevent an interrupt storm when Linux enables the UART interrupts. Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler --- drivers/serial/serial_mxc.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index 7e4e6d36b8..df35ac9114 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -138,13 +138,18 @@ struct mxc_uart { u32 ts; }; -static void _mxc_serial_init(struct mxc_uart *base) +static void _mxc_serial_init(struct mxc_uart *base, int use_dte) { writel(0, &base->cr1); writel(0, &base->cr2); while (!(readl(&base->cr2) & UCR2_SRST)); + if (use_dte) + writel(0x404 | UCR3_ADNIMP, &base->cr3); + else + writel(0x704 | UCR3_ADNIMP, &base->cr3); + writel(0x704 | UCR3_ADNIMP, &base->cr3); writel(0x8000, &base->cr4); writel(0x2b, &base->esc); @@ -226,7 +231,7 @@ static int mxc_serial_tstc(void) */ static int mxc_serial_init(void) { - _mxc_serial_init(mxc_base); + _mxc_serial_init(mxc_base, false); serial_setbrg(); @@ -271,7 +276,7 @@ static int mxc_serial_probe(struct udevice *dev) { struct mxc_serial_platdata *plat = dev->platdata; - _mxc_serial_init(plat->reg); + _mxc_serial_init(plat->reg, plat->use_dte); return 0; } @@ -367,7 +372,7 @@ static inline void _debug_uart_init(void) { struct mxc_uart *base = (struct mxc_uart *)CONFIG_DEBUG_UART_BASE; - _mxc_serial_init(base); + _mxc_serial_init(base, false); _mxc_serial_setbrg(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE, false); } -- 2.20.1