From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E5CAC282C4 for ; Tue, 5 Feb 2019 02:22:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 56CA62083B for ; Tue, 5 Feb 2019 02:22:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="tiuh9EYm" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727435AbfBECV7 (ORCPT ); Mon, 4 Feb 2019 21:21:59 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:38945 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726941AbfBECV7 (ORCPT ); Mon, 4 Feb 2019 21:21:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Transfer-Encoding:Content-Type:MIME-Version :References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=SuPy+WI+Dvz86djIGtTtc/NaeFQo8FuVnnjQDe737CQ=; b=tiuh9EYmY/CU0nLPgjoHttfn/C hBQGGLE9nhrK3D5jVicpnTj8SPsNKkFu4XlbFELt5kNvLO3MQuqzXok0TI7WBnMpakE/TKNeUxi05 IPsMu4i/sDdM3FqDt0BIi2QESguMiGuSopveUw1NqcxSCsTp5xpx43gSDUzYsD8HqT4w=; Received: from andrew by vps0.lunn.ch with local (Exim 4.89) (envelope-from ) id 1gqqMv-0002wf-Bg; Tue, 05 Feb 2019 03:21:49 +0100 Date: Tue, 5 Feb 2019 03:21:49 +0100 From: Andrew Lunn To: John David Anglin Cc: Russell King , Vivien Didelot , Florian Fainelli , netdev@vger.kernel.org Subject: Re: [PATCH v2] net: dsa: mv88e6xxx: Revise irq setup ordering Message-ID: <20190205022149.GA10838@lunn.ch> References: <20190130172818.GJ21904@lunn.ch> <2ea9fd81-f92d-9505-dd0b-bdd0f67d8ce7@bell.net> <20190130223846.GB30115@lunn.ch> <9415d82e-965b-7777-0ad0-f23d6c9f177e@bell.net> <53b49df8-53ed-704f-9197-230b18d83090@bell.net> <824d011b-3692-69c3-5e2c-58e950a80abf@bell.net> <20190204231410.GG3397@lunn.ch> <8d8123cc-60f0-e236-e496-0aacf735fceb@bell.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <8d8123cc-60f0-e236-e496-0aacf735fceb@bell.net> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org > The problem is INTn can go low before the interrupt handler for it is > registered and enabled. > This can't happen.  The domain is setup immediately after registering > the GPIO interrupt. > The interrupt can't fire until one of the enables is set. These two statement seem to contradict each other? > These are set > by mv88e6xxx_g2_irq_setup(), > mv88e6xxx_g1_atu_prob_irq_setup() and > mv88e6xxx_g1_vtu_prob_irq_setup().  These irqs > are setup after mv88e6xxx_g1_irq_setup()/mv88e6xxx_irq_poll_setup() is > called.  Thus, the > irq domain is setup before the GPIO interrupt can fire. At what point is INTn going low, causing you all these problems? I've yet to see a real description of the race. Please give us a blow by blow of how the race happens. And then explain how your fix actually fixes this. Also, i'm not yet convinced this hardware can actually work correctly with edge interrupts. You can probably reduce the size of the race window, but i don't think you can eliminate it. And if you cannot eliminate it, at some point it is going to hit you. Andrew