From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: Re: [PATCH v6 2/2] pwm: sifive: Add a driver for SiFive SoC PWM Date: Wed, 13 Feb 2019 13:39:02 +0100 Message-ID: <20190213123902.GF647@ulmo> References: <1550049978-20705-1-git-send-email-yash.shah@sifive.com> <1550049978-20705-3-git-send-email-yash.shah@sifive.com> <20190213103459.t5bvemxrb2x6iagm@pengutronix.de> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="27ZtN5FSuKKSZcBU" Return-path: Content-Disposition: inline In-Reply-To: <20190213103459.t5bvemxrb2x6iagm@pengutronix.de> Sender: linux-kernel-owner@vger.kernel.org To: Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= Cc: Yash Shah , palmer@sifive.com, linux-pwm@vger.kernel.org, linux-riscv@lists.infradead.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, sachin.ghadi@sifive.com, paul.walmsley@sifive.com List-Id: linux-pwm@vger.kernel.org --27ZtN5FSuKKSZcBU Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Feb 13, 2019 at 11:34:59AM +0100, Uwe Kleine-K=C3=B6nig wrote: > On Wed, Feb 13, 2019 at 02:56:18PM +0530, Yash Shah wrote: [...] > > + unsigned long scale_pow =3D > > + div64_ul(pwm->real_period * (u64)rate, NSEC_PER_SEC); > > + int scale =3D clamp(ilog2(scale_pow) - PWM_SIFIVE_CMPWIDTH, 0, 0xf); > > + > > + writel((1 << PWM_SIFIVE_PWMCFG_EN_ALWAYS) | (scale << > > + PWM_SIFIVE_PWMCFG_SCALE), pwm->regs + PWM_SIFIVE_PWMCFG); >=20 > I think this would be better readable with the newline after the |. With > my editor's configuration when broken like this, the 2nd line would be > intended with the opening ( after the |. >=20 > > + > > + /* As scale <=3D 15 the shift operation cannot overflow. */ > > + pwm->real_period =3D div64_ul(1000000000ULL << (PWM_SIFIVE_CMPWIDTH + > > + scale), rate); >=20 > ditto. Maybe break after the =3D? >=20 > > + dev_dbg(pwm->chip.dev, "New real_period =3D %u ns\n", pwm->real_perio= d); > > +} > > + > > +static void pwm_sifive_get_state(struct pwm_chip *chip, struct pwm_dev= ice *dev, > > + struct pwm_state *state) > > +{ > > + struct pwm_sifive_ddata *pwm =3D pwm_sifive_chip_to_ddata(chip); > > + u32 duty; > > + int val; > > + > > + duty =3D readl(pwm->regs + PWM_SIFIVE_PWMCMP0 + dev->hwpwm * > > + PWM_SIFIVE_SIZE_PWMCMP); > > + > > + val =3D readl(pwm->regs + PWM_SIFIVE_PWMCFG); > > + state->enabled =3D (val & BIT(PWM_SIFIVE_PWMCFG_EN_ALWAYS)) > 0; > > + > > + val &=3D 0x0F; > > + pwm->real_period =3D div64_ul(1000000000ULL << (PWM_SIFIVE_CMPWIDTH + > > + val), clk_get_rate(pwm->clk)); >=20 > Another bad line break. Maybe just split all of these very long expressions up by introducing temporary variables to make things more palatable? Thierry --27ZtN5FSuKKSZcBU Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlxkD+YACgkQ3SOs138+ s6E7jQ//UQwS8ncrUfiucp+4IA2Ttqa0MkZBKpHZFYd5NABgdUdAFrxiUkNHRx3k Ziz1Og6o1xAcdhlQwFsirpvgkSuB27t0UPwVEfjhOtE2nsp4NlMrulqzLhhTMRqm dJOXUdnz5DlnmXAvTVLEqwM0oVdcotD7flgqcSbJ5/C9Xj3GVnybLsYvluNrfkgD FOO6uXAl84hwzk8eoPMVZ4xyT4M08FVyxUG4S4abayZ+ZO7qGuMCFByebbfk3qXI 9Wp/5TgEfndb5vYv0BGHwRLjTtjm7zk5x/cAQgd+i9vB3dQRTekdPg87XiY3gq2j +Do5Otmno1yBowJ2Q5HTatN+o246BEgbaUjyqS/ZxSK5T8ei2HKZgR2fv6DQqPYy etOx8wOfVOxgF7allr4E5hAnKhUlfV1nXE+K15vXNVeE8vTggpdQa8y8cj0Qvx2g xfEFBlf92sEQ1uSQEvPoEBLRLKNK1N4ZlscIhKz84vrMfeN+l5vchJ9j6jCqq29l Qi6xTgCb49tBLdhjO7Od7evIY6E7tPzax1YAg1oeNjNGm0q5xEmXH85mSILeeCO3 jdfOyaEIGGDziBcJ6xVROejOHowX+09hJQDFyK/xUQ8/U4rppxSs/cuhPAXCFRQG /Axaqlt3wF1V1Oj0ZEwDc27VQT3I31heLxz4cyeLjCjJknUi0zU= =VfjV -----END PGP SIGNATURE----- --27ZtN5FSuKKSZcBU-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 986C3C282CA for ; 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[217.229.29.45]) by smtp.gmail.com with ESMTPSA id f187sm6998739wma.4.2019.02.13.04.39.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 13 Feb 2019 04:39:03 -0800 (PST) Date: Wed, 13 Feb 2019 13:39:02 +0100 From: Thierry Reding To: Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= Subject: Re: [PATCH v6 2/2] pwm: sifive: Add a driver for SiFive SoC PWM Message-ID: <20190213123902.GF647@ulmo> References: <1550049978-20705-1-git-send-email-yash.shah@sifive.com> <1550049978-20705-3-git-send-email-yash.shah@sifive.com> <20190213103459.t5bvemxrb2x6iagm@pengutronix.de> MIME-Version: 1.0 In-Reply-To: <20190213103459.t5bvemxrb2x6iagm@pengutronix.de> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190213_043905_883045_BA5BA767 X-CRM114-Status: GOOD ( 12.74 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, palmer@sifive.com, linux-kernel@vger.kernel.org, sachin.ghadi@sifive.com, Yash Shah , robh+dt@kernel.org, paul.walmsley@sifive.com, linux-riscv@lists.infradead.org Content-Type: multipart/mixed; boundary="===============0331196516688902814==" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org --===============0331196516688902814== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="27ZtN5FSuKKSZcBU" Content-Disposition: inline --27ZtN5FSuKKSZcBU Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Feb 13, 2019 at 11:34:59AM +0100, Uwe Kleine-K=C3=B6nig wrote: > On Wed, Feb 13, 2019 at 02:56:18PM +0530, Yash Shah wrote: [...] > > + unsigned long scale_pow =3D > > + div64_ul(pwm->real_period * (u64)rate, NSEC_PER_SEC); > > + int scale =3D clamp(ilog2(scale_pow) - PWM_SIFIVE_CMPWIDTH, 0, 0xf); > > + > > + writel((1 << PWM_SIFIVE_PWMCFG_EN_ALWAYS) | (scale << > > + PWM_SIFIVE_PWMCFG_SCALE), pwm->regs + PWM_SIFIVE_PWMCFG); >=20 > I think this would be better readable with the newline after the |. With > my editor's configuration when broken like this, the 2nd line would be > intended with the opening ( after the |. >=20 > > + > > + /* As scale <=3D 15 the shift operation cannot overflow. */ > > + pwm->real_period =3D div64_ul(1000000000ULL << (PWM_SIFIVE_CMPWIDTH + > > + scale), rate); >=20 > ditto. Maybe break after the =3D? >=20 > > + dev_dbg(pwm->chip.dev, "New real_period =3D %u ns\n", pwm->real_perio= d); > > +} > > + > > +static void pwm_sifive_get_state(struct pwm_chip *chip, struct pwm_dev= ice *dev, > > + struct pwm_state *state) > > +{ > > + struct pwm_sifive_ddata *pwm =3D pwm_sifive_chip_to_ddata(chip); > > + u32 duty; > > + int val; > > + > > + duty =3D readl(pwm->regs + PWM_SIFIVE_PWMCMP0 + dev->hwpwm * > > + PWM_SIFIVE_SIZE_PWMCMP); > > + > > + val =3D readl(pwm->regs + PWM_SIFIVE_PWMCFG); > > + state->enabled =3D (val & BIT(PWM_SIFIVE_PWMCFG_EN_ALWAYS)) > 0; > > + > > + val &=3D 0x0F; > > + pwm->real_period =3D div64_ul(1000000000ULL << (PWM_SIFIVE_CMPWIDTH + > > + val), clk_get_rate(pwm->clk)); >=20 > Another bad line break. Maybe just split all of these very long expressions up by introducing temporary variables to make things more palatable? Thierry --27ZtN5FSuKKSZcBU Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlxkD+YACgkQ3SOs138+ s6E7jQ//UQwS8ncrUfiucp+4IA2Ttqa0MkZBKpHZFYd5NABgdUdAFrxiUkNHRx3k Ziz1Og6o1xAcdhlQwFsirpvgkSuB27t0UPwVEfjhOtE2nsp4NlMrulqzLhhTMRqm dJOXUdnz5DlnmXAvTVLEqwM0oVdcotD7flgqcSbJ5/C9Xj3GVnybLsYvluNrfkgD FOO6uXAl84hwzk8eoPMVZ4xyT4M08FVyxUG4S4abayZ+ZO7qGuMCFByebbfk3qXI 9Wp/5TgEfndb5vYv0BGHwRLjTtjm7zk5x/cAQgd+i9vB3dQRTekdPg87XiY3gq2j +Do5Otmno1yBowJ2Q5HTatN+o246BEgbaUjyqS/ZxSK5T8ei2HKZgR2fv6DQqPYy etOx8wOfVOxgF7allr4E5hAnKhUlfV1nXE+K15vXNVeE8vTggpdQa8y8cj0Qvx2g xfEFBlf92sEQ1uSQEvPoEBLRLKNK1N4ZlscIhKz84vrMfeN+l5vchJ9j6jCqq29l Qi6xTgCb49tBLdhjO7Od7evIY6E7tPzax1YAg1oeNjNGm0q5xEmXH85mSILeeCO3 jdfOyaEIGGDziBcJ6xVROejOHowX+09hJQDFyK/xUQ8/U4rppxSs/cuhPAXCFRQG /Axaqlt3wF1V1Oj0ZEwDc27VQT3I31heLxz4cyeLjCjJknUi0zU= =VfjV -----END PGP SIGNATURE----- --27ZtN5FSuKKSZcBU-- --===============0331196516688902814== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============0331196516688902814==--