From: "Ville Syrjälä" <ville.syrjala@intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: dri-devel@lists.freedesktop.org,
Kenneth Graunke <kenneth@whitecape.org>,
Jos?? Roberto de Souza <jose.souza@intel.com>,
mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH] intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.
Date: Tue, 19 Feb 2019 20:08:13 +0200 [thread overview]
Message-ID: <20190219180813.GC20097@intel.com> (raw)
In-Reply-To: <20190219173614.GH23434@intel.com>
On Tue, Feb 19, 2019 at 09:36:14AM -0800, Rodrigo Vivi wrote:
> On Mon, Feb 18, 2019 at 04:54:34PM +1100, Jonathan Gray wrote:
> > Compared to linux and libdrm Mesa is missing a VLV and ICL id.
> >
> > 0x0f30
> > ff049b6ce21d2814451afd4a116d001712e0116b
> > drm/i915: bind driver to ValleyView chipsets
> >
> > 0x8A70
> > d55cb4fa2cf0105bfb16b60a2846737b91fdc173
> > drm/i915/icl: Add the ICL PCI IDs
> >
> > The Intel Media SDK describes these as
> >
> > /* VLV */
> > { 0x0f30, MFX_HW_VLV, MFX_GT1 }, /* VLV mobile */
>
> hmmm... no idea about this one...
> Ville?
> maybe we should just remove from kernel since it was never
> missed from Mesa?
Bspec says that is the infamous X0. Assuming it's not
lying to us it should be safe to remove.
>
> >
> > /* ICL LP */
> > { 0x8A70, MFX_HW_ICL_LP, MFX_GT1 }
>
> This is pure display so no Mesa needed for this ID.
>
> >
> > and libdrm's intel_chipset.h describes the VLV id as
> >
> > #define PCI_CHIP_VALLEYVIEW_PO 0x0f30 /* VLV PO board */
> >
> > It isn't clear what the ICL configuration should be from public
> > information.
> >
> > diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
> > index b91abd7a3f9..3568007b1ef 100644
> > --- a/include/pci_ids/i965_pci_ids.h
> > +++ b/include/pci_ids/i965_pci_ids.h
> > @@ -86,6 +86,7 @@ CHIPSET(0x0D2B, hsw_gt3, "Intel(R) Haswell")
> > CHIPSET(0x0D0E, hsw_gt1, "Intel(R) Haswell")
> > CHIPSET(0x0D1E, hsw_gt2, "Intel(R) Haswell")
> > CHIPSET(0x0D2E, hsw_gt3, "Intel(R) Haswell")
> > +CHIPSET(0x0F30, byt, "Intel(R) Bay Trail")
> > CHIPSET(0x0F31, byt, "Intel(R) Bay Trail")
> > CHIPSET(0x0F32, byt, "Intel(R) Bay Trail")
> > CHIPSET(0x0F33, byt, "Intel(R) Bay Trail")
> > @@ -212,4 +213,5 @@ CHIPSET(0x8A5A, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
> > CHIPSET(0x8A5B, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> > CHIPSET(0x8A5C, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
> > CHIPSET(0x8A5D, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> > +CHIPSET(0x8A70, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> > CHIPSET(0x8A71, icl_1x8, "Intel(R) HD Graphics (Ice Lake 1x8 GT0.5)")
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2019-02-19 18:08 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-02 8:07 [PATCH] intel: Add more PCI Device IDs for Coffee Lake and Ice Lake Rodrigo Vivi
2019-02-04 15:08 ` Lionel Landwerlin
2019-02-18 5:54 ` Jonathan Gray
2019-02-19 17:36 ` [Mesa-dev] " Rodrigo Vivi
2019-02-19 18:08 ` Ville Syrjälä [this message]
2019-02-19 18:13 ` Kenneth Graunke
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