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Wed, 20 Feb 2019 22:40:20 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v7 02/17] hw/arm/virt: Rename highmem IO regions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-devel" X-TUID: dxlR4E+2cKLF In preparation for a split of the memory map into a static part and a dynamic part floating after the RAM, let's rename the regions located after the RAM Signed-off-by: Eric Auger Reviewed-by: Peter Maydell --- v7: added Peter's R-b v6: creation --- hw/arm/virt-acpi-build.c | 8 ++++---- hw/arm/virt.c | 21 +++++++++++---------- include/hw/arm/virt.h | 8 ++++---- 3 files changed, 19 insertions(+), 18 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 04b62c714d..829d2f0035 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -229,8 +229,8 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMa= pEntry *memmap, size_pio)); =20 if (use_highmem) { - hwaddr base_mmio_high =3D memmap[VIRT_PCIE_MMIO_HIGH].base; - hwaddr size_mmio_high =3D memmap[VIRT_PCIE_MMIO_HIGH].size; + hwaddr base_mmio_high =3D memmap[VIRT_HIGH_PCIE_MMIO].base; + hwaddr size_mmio_high =3D memmap[VIRT_HIGH_PCIE_MMIO].size; =20 aml_append(rbuf, aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXE= D, @@ -663,8 +663,8 @@ build_madt(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) gicr =3D acpi_data_push(table_data, sizeof(*gicr)); gicr->type =3D ACPI_APIC_GENERIC_REDISTRIBUTOR; gicr->length =3D sizeof(*gicr); - gicr->base_address =3D cpu_to_le64(memmap[VIRT_GIC_REDIST2].= base); - gicr->range_length =3D cpu_to_le32(memmap[VIRT_GIC_REDIST2].= size); + gicr->base_address =3D cpu_to_le64(memmap[VIRT_HIGH_GIC_REDI= ST2].base); + gicr->range_length =3D cpu_to_le32(memmap[VIRT_HIGH_GIC_REDI= ST2].size); } =20 if (its_class_name() && !vmc->no_its) { diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 99c2b6e60d..a1955e7764 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -150,10 +150,10 @@ static const MemMapEntry a15memmap[] =3D { [VIRT_PCIE_ECAM] =3D { 0x3f000000, 0x01000000 }, [VIRT_MEM] =3D { 0x40000000, RAMLIMIT_BYTES }, /* Additional 64 MB redist region (can contain up to 512 redistribut= ors) */ - [VIRT_GIC_REDIST2] =3D { 0x4000000000ULL, 0x4000000 }, - [VIRT_PCIE_ECAM_HIGH] =3D { 0x4010000000ULL, 0x10000000 }, + [VIRT_HIGH_GIC_REDIST2] =3D { 0x4000000000ULL, 0x4000000 }, + [VIRT_HIGH_PCIE_ECAM] =3D { 0x4010000000ULL, 0x10000000 }, /* Second PCIe window, 512GB wide at the 512GB boundary */ - [VIRT_PCIE_MMIO_HIGH] =3D { 0x8000000000ULL, 0x8000000000ULL }, + [VIRT_HIGH_PCIE_MMIO] =3D { 0x8000000000ULL, 0x8000000000ULL }, }; =20 static const int a15irqmap[] =3D { @@ -435,8 +435,8 @@ static void fdt_add_gic_node(VirtMachineState *vms) 2, vms->memmap[VIRT_GIC_DIST].s= ize, 2, vms->memmap[VIRT_GIC_REDIST]= .base, 2, vms->memmap[VIRT_GIC_REDIST]= .size, - 2, vms->memmap[VIRT_GIC_REDIST2= ].base, - 2, vms->memmap[VIRT_GIC_REDIST2= ].size); + 2, vms->memmap[VIRT_HIGH_GIC_RE= DIST2].base, + 2, vms->memmap[VIRT_HIGH_GIC_RE= DIST2].size); } =20 if (vms->virt) { @@ -584,7 +584,7 @@ static void create_gic(VirtMachineState *vms, qemu_ir= q *pic) =20 if (nb_redist_regions =3D=3D 2) { uint32_t redist1_capacity =3D - vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDIS= T_SIZE; + vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDI= ST_SIZE; =20 qdev_prop_set_uint32(gicdev, "redist-region-count[1]", MIN(smp_cpus - redist0_count, redist1_capacity)); @@ -601,7 +601,8 @@ static void create_gic(VirtMachineState *vms, qemu_ir= q *pic) if (type =3D=3D 3) { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base)= ; if (nb_redist_regions =3D=3D 2) { - sysbus_mmio_map(gicbusdev, 2, vms->memmap[VIRT_GIC_REDIST2].= base); + sysbus_mmio_map(gicbusdev, 2, + vms->memmap[VIRT_HIGH_GIC_REDIST2].base); } } else { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_CPU].base); @@ -1088,8 +1089,8 @@ static void create_pcie(VirtMachineState *vms, qemu= _irq *pic) { hwaddr base_mmio =3D vms->memmap[VIRT_PCIE_MMIO].base; hwaddr size_mmio =3D vms->memmap[VIRT_PCIE_MMIO].size; - hwaddr base_mmio_high =3D vms->memmap[VIRT_PCIE_MMIO_HIGH].base; - hwaddr size_mmio_high =3D vms->memmap[VIRT_PCIE_MMIO_HIGH].size; + hwaddr base_mmio_high =3D vms->memmap[VIRT_HIGH_PCIE_MMIO].base; + hwaddr size_mmio_high =3D vms->memmap[VIRT_HIGH_PCIE_MMIO].size; hwaddr base_pio =3D vms->memmap[VIRT_PCIE_PIO].base; hwaddr size_pio =3D vms->memmap[VIRT_PCIE_PIO].size; hwaddr base_ecam, size_ecam; @@ -1418,7 +1419,7 @@ static void machvirt_init(MachineState *machine) */ if (vms->gic_version =3D=3D 3) { virt_max_cpus =3D vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDI= ST_SIZE; - virt_max_cpus +=3D vms->memmap[VIRT_GIC_REDIST2].size / GICV3_RE= DIST_SIZE; + virt_max_cpus +=3D vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GIC= V3_REDIST_SIZE; } else { virt_max_cpus =3D GIC_NCPU; } diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 4cc57a7ef6..a27086d524 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -64,7 +64,7 @@ enum { VIRT_GIC_VCPU, VIRT_GIC_ITS, VIRT_GIC_REDIST, - VIRT_GIC_REDIST2, + VIRT_HIGH_GIC_REDIST2, VIRT_SMMU, VIRT_UART, VIRT_MMIO, @@ -74,9 +74,9 @@ enum { VIRT_PCIE_MMIO, VIRT_PCIE_PIO, VIRT_PCIE_ECAM, - VIRT_PCIE_ECAM_HIGH, + VIRT_HIGH_PCIE_ECAM, VIRT_PLATFORM_BUS, - VIRT_PCIE_MMIO_HIGH, + VIRT_HIGH_PCIE_MMIO, VIRT_GPIO, VIRT_SECURE_UART, VIRT_SECURE_MEM, @@ -128,7 +128,7 @@ typedef struct { int psci_conduit; } VirtMachineState; =20 -#define VIRT_ECAM_ID(high) (high ? VIRT_PCIE_ECAM_HIGH : VIRT_PCIE_ECAM) +#define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) =20 #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") #define VIRT_MACHINE(obj) \ --=20 2.20.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:34994) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gwaXS-0003uw-Tz for qemu-devel@nongnu.org; Wed, 20 Feb 2019 17:40:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gwaXR-0008Sh-QX for qemu-devel@nongnu.org; Wed, 20 Feb 2019 17:40:26 -0500 From: Eric Auger Date: Wed, 20 Feb 2019 23:39:48 +0100 Message-Id: <20190220224003.4420-3-eric.auger@redhat.com> In-Reply-To: <20190220224003.4420-1-eric.auger@redhat.com> References: <20190220224003.4420-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v7 02/17] hw/arm/virt: Rename highmem IO regions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Cc: dgilbert@redhat.com, david@gibson.dropbear.id.au, drjones@redhat.com In preparation for a split of the memory map into a static part and a dynamic part floating after the RAM, let's rename the regions located after the RAM Signed-off-by: Eric Auger Reviewed-by: Peter Maydell --- v7: added Peter's R-b v6: creation --- hw/arm/virt-acpi-build.c | 8 ++++---- hw/arm/virt.c | 21 +++++++++++---------- include/hw/arm/virt.h | 8 ++++---- 3 files changed, 19 insertions(+), 18 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 04b62c714d..829d2f0035 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -229,8 +229,8 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMa= pEntry *memmap, size_pio)); =20 if (use_highmem) { - hwaddr base_mmio_high =3D memmap[VIRT_PCIE_MMIO_HIGH].base; - hwaddr size_mmio_high =3D memmap[VIRT_PCIE_MMIO_HIGH].size; + hwaddr base_mmio_high =3D memmap[VIRT_HIGH_PCIE_MMIO].base; + hwaddr size_mmio_high =3D memmap[VIRT_HIGH_PCIE_MMIO].size; =20 aml_append(rbuf, aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXE= D, @@ -663,8 +663,8 @@ build_madt(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) gicr =3D acpi_data_push(table_data, sizeof(*gicr)); gicr->type =3D ACPI_APIC_GENERIC_REDISTRIBUTOR; gicr->length =3D sizeof(*gicr); - gicr->base_address =3D cpu_to_le64(memmap[VIRT_GIC_REDIST2].= base); - gicr->range_length =3D cpu_to_le32(memmap[VIRT_GIC_REDIST2].= size); + gicr->base_address =3D cpu_to_le64(memmap[VIRT_HIGH_GIC_REDI= ST2].base); + gicr->range_length =3D cpu_to_le32(memmap[VIRT_HIGH_GIC_REDI= ST2].size); } =20 if (its_class_name() && !vmc->no_its) { diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 99c2b6e60d..a1955e7764 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -150,10 +150,10 @@ static const MemMapEntry a15memmap[] =3D { [VIRT_PCIE_ECAM] =3D { 0x3f000000, 0x01000000 }, [VIRT_MEM] =3D { 0x40000000, RAMLIMIT_BYTES }, /* Additional 64 MB redist region (can contain up to 512 redistribut= ors) */ - [VIRT_GIC_REDIST2] =3D { 0x4000000000ULL, 0x4000000 }, - [VIRT_PCIE_ECAM_HIGH] =3D { 0x4010000000ULL, 0x10000000 }, + [VIRT_HIGH_GIC_REDIST2] =3D { 0x4000000000ULL, 0x4000000 }, + [VIRT_HIGH_PCIE_ECAM] =3D { 0x4010000000ULL, 0x10000000 }, /* Second PCIe window, 512GB wide at the 512GB boundary */ - [VIRT_PCIE_MMIO_HIGH] =3D { 0x8000000000ULL, 0x8000000000ULL }, + [VIRT_HIGH_PCIE_MMIO] =3D { 0x8000000000ULL, 0x8000000000ULL }, }; =20 static const int a15irqmap[] =3D { @@ -435,8 +435,8 @@ static void fdt_add_gic_node(VirtMachineState *vms) 2, vms->memmap[VIRT_GIC_DIST].s= ize, 2, vms->memmap[VIRT_GIC_REDIST]= .base, 2, vms->memmap[VIRT_GIC_REDIST]= .size, - 2, vms->memmap[VIRT_GIC_REDIST2= ].base, - 2, vms->memmap[VIRT_GIC_REDIST2= ].size); + 2, vms->memmap[VIRT_HIGH_GIC_RE= DIST2].base, + 2, vms->memmap[VIRT_HIGH_GIC_RE= DIST2].size); } =20 if (vms->virt) { @@ -584,7 +584,7 @@ static void create_gic(VirtMachineState *vms, qemu_ir= q *pic) =20 if (nb_redist_regions =3D=3D 2) { uint32_t redist1_capacity =3D - vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDIS= T_SIZE; + vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDI= ST_SIZE; =20 qdev_prop_set_uint32(gicdev, "redist-region-count[1]", MIN(smp_cpus - redist0_count, redist1_capacity)); @@ -601,7 +601,8 @@ static void create_gic(VirtMachineState *vms, qemu_ir= q *pic) if (type =3D=3D 3) { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base)= ; if (nb_redist_regions =3D=3D 2) { - sysbus_mmio_map(gicbusdev, 2, vms->memmap[VIRT_GIC_REDIST2].= base); + sysbus_mmio_map(gicbusdev, 2, + vms->memmap[VIRT_HIGH_GIC_REDIST2].base); } } else { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_CPU].base); @@ -1088,8 +1089,8 @@ static void create_pcie(VirtMachineState *vms, qemu= _irq *pic) { hwaddr base_mmio =3D vms->memmap[VIRT_PCIE_MMIO].base; hwaddr size_mmio =3D vms->memmap[VIRT_PCIE_MMIO].size; - hwaddr base_mmio_high =3D vms->memmap[VIRT_PCIE_MMIO_HIGH].base; - hwaddr size_mmio_high =3D vms->memmap[VIRT_PCIE_MMIO_HIGH].size; + hwaddr base_mmio_high =3D vms->memmap[VIRT_HIGH_PCIE_MMIO].base; + hwaddr size_mmio_high =3D vms->memmap[VIRT_HIGH_PCIE_MMIO].size; hwaddr base_pio =3D vms->memmap[VIRT_PCIE_PIO].base; hwaddr size_pio =3D vms->memmap[VIRT_PCIE_PIO].size; hwaddr base_ecam, size_ecam; @@ -1418,7 +1419,7 @@ static void machvirt_init(MachineState *machine) */ if (vms->gic_version =3D=3D 3) { virt_max_cpus =3D vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDI= ST_SIZE; - virt_max_cpus +=3D vms->memmap[VIRT_GIC_REDIST2].size / GICV3_RE= DIST_SIZE; + virt_max_cpus +=3D vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GIC= V3_REDIST_SIZE; } else { virt_max_cpus =3D GIC_NCPU; } diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 4cc57a7ef6..a27086d524 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -64,7 +64,7 @@ enum { VIRT_GIC_VCPU, VIRT_GIC_ITS, VIRT_GIC_REDIST, - VIRT_GIC_REDIST2, + VIRT_HIGH_GIC_REDIST2, VIRT_SMMU, VIRT_UART, VIRT_MMIO, @@ -74,9 +74,9 @@ enum { VIRT_PCIE_MMIO, VIRT_PCIE_PIO, VIRT_PCIE_ECAM, - VIRT_PCIE_ECAM_HIGH, + VIRT_HIGH_PCIE_ECAM, VIRT_PLATFORM_BUS, - VIRT_PCIE_MMIO_HIGH, + VIRT_HIGH_PCIE_MMIO, VIRT_GPIO, VIRT_SECURE_UART, VIRT_SECURE_MEM, @@ -128,7 +128,7 @@ typedef struct { int psci_conduit; } VirtMachineState; =20 -#define VIRT_ECAM_ID(high) (high ? VIRT_PCIE_ECAM_HIGH : VIRT_PCIE_ECAM) +#define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) =20 #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") #define VIRT_MACHINE(obj) \ --=20 2.20.1