From: Keith Busch <keith.busch@intel.com>
To: Brice Goglin <Brice.Goglin@inria.fr>
Cc: linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org,
linux-mm@kvack.org, linux-api@vger.kernel.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Rafael Wysocki <rafael@kernel.org>,
Dave Hansen <dave.hansen@intel.com>,
Dan Williams <dan.j.williams@intel.com>
Subject: Re: [PATCHv6 06/10] node: Add memory-side caching attributes
Date: Fri, 22 Feb 2019 11:13:17 -0700 [thread overview]
Message-ID: <20190222181316.GE10237@localhost.localdomain> (raw)
In-Reply-To: <16221be9-2f60-3a39-fd6c-5299cd94dc02@inria.fr>
On Fri, Feb 22, 2019 at 11:22:12AM +0100, Brice Goglin wrote:
> Le 14/02/2019 à 18:10, Keith Busch a écrit :
> > +What: /sys/devices/system/node/nodeX/memory_side_cache/indexY/associativity
> > +Date: December 2018
> > +Contact: Keith Busch <keith.busch@intel.com>
> > +Description:
> > + The caches associativity: 0 for direct mapped, non-zero if
> > + indexed.
>
>
> Should we rename "associativity" into "indexing" or something else?
>
> When I see "associativity" that contains 0, I tend to interpret this as
> the associativity value itself, which would mean fully-associative here
> (as in CPU-side cache "ways_of_associativity" attribute), while actually
> 0 means direct-mapped (ie 1-associative) with yout semantics.
>
> Brice
Yes, that's a good suggestion.
next prev parent reply other threads:[~2019-02-22 18:13 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-14 17:10 [PATCHv6 00/10] Heterogenous memory node attributes Keith Busch
2019-02-14 17:10 ` [PATCHv6 01/10] acpi: Create subtable parsing infrastructure Keith Busch
2019-02-14 17:10 ` [PATCHv6 02/10] acpi: Add HMAT to generic parsing tables Keith Busch
2019-02-14 17:10 ` [PATCHv6 03/10] acpi/hmat: Parse and report heterogeneous memory Keith Busch
2019-02-14 17:10 ` [PATCHv6 04/10] node: Link memory nodes to their compute nodes Keith Busch
2019-02-14 17:10 ` [PATCHv6 05/10] node: Add heterogenous memory access attributes Keith Busch
2019-02-14 17:10 ` [PATCHv6 06/10] node: Add memory-side caching attributes Keith Busch
2019-02-22 10:12 ` Brice Goglin
2019-02-22 18:09 ` Keith Busch
2019-02-22 18:20 ` Dan Williams
2019-02-22 10:22 ` Brice Goglin
2019-02-22 18:13 ` Keith Busch [this message]
2019-02-14 17:10 ` [PATCHv6 07/10] acpi/hmat: Register processor domain to its memory Keith Busch
2019-02-20 22:02 ` Rafael J. Wysocki
2019-02-20 22:11 ` Dave Hansen
2019-02-20 22:13 ` Dan Williams
2019-02-20 22:16 ` Rafael J. Wysocki
2019-02-20 22:20 ` Dan Williams
2019-02-20 22:21 ` Rafael J. Wysocki
2019-02-20 22:44 ` Keith Busch
2019-02-20 22:50 ` Rafael J. Wysocki
2019-02-22 18:48 ` Keith Busch
2019-02-22 19:21 ` Dan Williams
2019-02-24 20:07 ` Rafael J. Wysocki
2019-02-24 19:59 ` Rafael J. Wysocki
2019-02-25 16:51 ` Keith Busch
2019-02-25 22:30 ` Rafael J. Wysocki
2019-03-07 11:49 ` Brice Goglin
2019-03-07 15:19 ` Keith Busch
2019-02-14 17:10 ` [PATCHv6 08/10] acpi/hmat: Register performance attributes Keith Busch
2019-02-20 22:04 ` Rafael J. Wysocki
2019-02-14 17:10 ` [PATCHv6 09/10] acpi/hmat: Register memory side cache attributes Keith Busch
2019-02-20 22:05 ` Rafael J. Wysocki
2019-02-14 17:10 ` [PATCHv6 10/10] doc/mm: New documentation for memory performance Keith Busch
2019-02-18 14:25 ` [PATCHv6 00/10] Heterogenous memory node attributes Brice Goglin
2019-02-19 17:20 ` Keith Busch
2019-02-20 18:25 ` Keith Busch
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