From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (146.0.238.70:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 25 Feb 2019 16:06:29 -0000 Received: from mail.kernel.org ([198.145.29.99]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1gyIlw-00016x-5l for speck@linutronix.de; Mon, 25 Feb 2019 17:06:28 +0100 Received: from localhost (lfbn-1-18527-45.w90-101.abo.wanadoo.fr [90.101.69.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EC3E820842 for ; Mon, 25 Feb 2019 16:06:20 +0000 (UTC) Date: Mon, 25 Feb 2019 17:06:18 +0100 From: Frederic Weisbecker Subject: [MODERATED] Re: [patch V4 04/11] x86/speculation/mds: Add mds_clear_cpu_buffer() Message-ID: <20190225160617.GA6051@lenoir> References: <20190222222418.405369026@linutronix.de> <20190222224149.440041789@linutronix.de> MIME-Version: 1.0 In-Reply-To: <20190222224149.440041789@linutronix.de> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Fri, Feb 22, 2019 at 11:24:22PM +0100, speck for Thomas Gleixner wrote: > From: Thomas Gleixner > > The Microarchitectural Data Sampling (MDS) vulernabilities are mitigated by > clearing the affected CPU buffers. The mechanism for clearing the buffers > uses the unused and obsolete VERW instruction in combination with a > microcode update which triggers a CPU buffer clear when VERW is executed. > > Provide a inline function with the assembly magic. The argument of the VERW > instruction must be a memory operand as documented: > > "MD_CLEAR enumerates that the memory-operand variant of VERW (for > example, VERW m16) has been extended to also overwrite buffers affected > by MDS. This buffer overwriting functionality is not guaranteed for the > register operand variant of VERW." > > Documentation also recommends to use a writable data segment selector: > > "The buffer overwriting occurs regardless of the result of the VERW > permission check, as well as when the selector is null or causes a > descriptor load segment violation. However, for lowest latency we > recommend using a selector that indicates a valid writable data > segment." > > Add x86 specific documentation about MDS and the internal workings of the > mitigation. > > Signed-off-by: Thomas Gleixner > Reviewed-by: Borislav Petkov > Reviewed-by: Greg Kroah-Hartman Reviewed-by: Frederic Weisbecker