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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915: don't check internal state in PP_STATUS
Date: Mon, 25 Feb 2019 21:31:47 +0200	[thread overview]
Message-ID: <20190225193147.GN20097@intel.com> (raw)
In-Reply-To: <20190223003449.22159-2-lucas.demarchi@intel.com>

On Fri, Feb 22, 2019 at 04:34:49PM -0800, Lucas De Marchi wrote:
> Instead of checking the bits that give the internal machine state we can
> simply rely on the information from the other bits: 1) on or off,
> 2) transitioning or not.
> 
> Bit 31 has the "Panel Power On Status"
> Bits 29:28 has the "Power Sequence Progress"
> 
> So, wait_panel_on() only needs to wait for bit 31 to indicate it's on
> and bits 29:28 to indicate there's no transition in progress.
> 
> From my limited test that includes the cycle delay, so we are safe with
> only checking those bits, like we do in wait_panel_off().

Is there a specific benefit to not checking the state?

> 
> Admittedly this needs more test, so let CI go through more platforms.

CI is probably not going to tell us if we break this and start angering
the panels.

The details of the state machine escape me right now, so can't remember
if there's some state which would somehow not be indicated quite right
by the other bits.

> 
> Cc: Clint Taylor <Clinton.A.Taylor@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index e1a051c0fbfe..9c16b69043cc 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -2315,8 +2315,8 @@ static void intel_dp_prepare(struct intel_encoder *encoder,
>  	}
>  }
>  
> -#define IDLE_ON_MASK		(PP_ON | PP_SEQUENCE_MASK | 0                     | PP_SEQUENCE_STATE_MASK)
> -#define IDLE_ON_VALUE   	(PP_ON | PP_SEQUENCE_NONE | 0                     | PP_SEQUENCE_STATE_ON_IDLE)
> +#define IDLE_ON_MASK		(PP_ON | PP_SEQUENCE_MASK | PP_CYCLE_DELAY_ACTIVE | 0)
> +#define IDLE_ON_VALUE		(PP_ON | PP_SEQUENCE_NONE | 0			  | 0)
>  
>  #define IDLE_OFF_MASK		(PP_ON | PP_SEQUENCE_MASK | 0                     | 0)
>  #define IDLE_OFF_VALUE		(0     | PP_SEQUENCE_NONE | 0                     | 0)
> -- 
> 2.20.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-02-25 19:31 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-23  0:34 [PATCH 1/2] drm/i915: remove unused bits from Panel Power Sequence State Lucas De Marchi
2019-02-23  0:34 ` [PATCH 2/2] drm/i915: don't check internal state in PP_STATUS Lucas De Marchi
2019-02-25 19:31   ` Ville Syrjälä [this message]
2019-02-23  2:20 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: remove unused bits from Panel Power Sequence State Patchwork
2019-02-23 10:55 ` ✓ Fi.CI.IGT: " Patchwork
2019-02-25 19:28 ` [PATCH 1/2] " Ville Syrjälä
2019-02-25 21:54   ` Lucas De Marchi
2019-02-26 10:10     ` Jani Nikula
2019-02-26 19:20       ` Lucas De Marchi
2019-02-26 13:49     ` Ville Syrjälä

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