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[209.51.188.17]) by mx.google.com with ESMTPS id z128si12605967ywf.445.2019.03.01.06.40.05 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 01 Mar 2019 06:40:05 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([127.0.0.1]:38843 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzjKX-0004Oe-Dc for alex.bennee@linaro.org; Fri, 01 Mar 2019 09:40:05 -0500 Received: from eggs.gnu.org ([209.51.188.92]:39456) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzjE2-0007do-6K for qemu-devel@nongnu.org; Fri, 01 Mar 2019 09:33:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gzjE1-0004WN-96 for qemu-devel@nongnu.org; Fri, 01 Mar 2019 09:33:22 -0500 Received: from mx1.redhat.com ([209.132.183.28]:32854) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gzjDw-0004Ob-92; Fri, 01 Mar 2019 09:33:16 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5BF0C9090D; Fri, 1 Mar 2019 14:33:14 +0000 (UTC) Received: from localhost (unknown [10.43.2.182]) by smtp.corp.redhat.com (Postfix) with ESMTP id BAE0A1001DF7; Fri, 1 Mar 2019 14:33:12 +0000 (UTC) Date: Fri, 1 Mar 2019 15:33:11 +0100 From: Igor Mammedov To: "Michael S. Tsirkin" Message-ID: <20190301153311.79c0d287@redhat.com> In-Reply-To: <20190301091214-mutt-send-email-mst@kernel.org> References: <1551407310-32413-1-git-send-email-guoheyi@huawei.com> <20190301084619-mutt-send-email-mst@kernel.org> <20190301091214-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Fri, 01 Mar 2019 14:33:14 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-devel@nongnu.org, Shannon Zhao , Heyi Guo , qemu-arm@nongnu.org, Heyi Guo , wanghaibin.wang@huawei.com Errors-To: qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-devel" X-TUID: M0aiMsUdFooi On Fri, 1 Mar 2019 09:12:33 -0500 "Michael S. Tsirkin" wrote: > On Fri, Mar 01, 2019 at 10:04:38PM +0800, Heyi Guo wrote: > > > > > > On 2019/3/1 21:47, Michael S. Tsirkin wrote: > > > On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote: > > > > After the introduction of generic PCIe root port and PCIe-PCI bridge, > > > > we will also have SHPC controller on ARM, so just enalbe SHPC native > > > > hot plug. > > > > > > > > Cc: Shannon Zhao > > > > Cc: Peter Maydell > > > > Cc: "Michael S. Tsirkin" > > > > Cc: Igor Mammedov > > > > Signed-off-by: Heyi Guo > > > > Signed-off-by: Heyi Guo > > > > > > So when OS enables SHPC, should we block ACPI hotplug events? > > I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently? > > > > Thanks, > > Heyi > > Oh I didn't realise. That explains it sorry about the noise. And I thought we did not support them on PCIe completely (I mean q35/ich9). (Or did I miss something)? > > > > > > > > --- > > > > hw/arm/virt-acpi-build.c | 7 ++++++- > > > > 1 file changed, 6 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c > > > > index 04b62c7..7849ec5 100644 > > > > --- a/hw/arm/virt-acpi-build.c > > > > +++ b/hw/arm/virt-acpi-build.c > > > > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, > > > > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); > > > > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP"))); > > > > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); > > > > - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL), > > > > + > > > > + /* > > > > + * Allow OS control for all 5 features: > > > > + * PCIeHotplug SHPCHotplug PME AER PCIeCapability. > > > > + */ > > > > + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL), > > > > aml_name("CTRL"))); > > > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1)))); > > > > -- > > > > 1.8.3.1 > > > . > > > > > From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:39456) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzjE2-0007do-6K for qemu-devel@nongnu.org; Fri, 01 Mar 2019 09:33:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gzjE1-0004WN-96 for qemu-devel@nongnu.org; Fri, 01 Mar 2019 09:33:22 -0500 Date: Fri, 1 Mar 2019 15:33:11 +0100 From: Igor Mammedov Message-ID: <20190301153311.79c0d287@redhat.com> In-Reply-To: <20190301091214-mutt-send-email-mst@kernel.org> References: <1551407310-32413-1-git-send-email-guoheyi@huawei.com> <20190301084619-mutt-send-email-mst@kernel.org> <20190301091214-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: Heyi Guo , qemu-arm@nongnu.org, qemu-devel@nongnu.org, wanghaibin.wang@huawei.com, Shannon Zhao , Peter Maydell , Heyi Guo On Fri, 1 Mar 2019 09:12:33 -0500 "Michael S. Tsirkin" wrote: > On Fri, Mar 01, 2019 at 10:04:38PM +0800, Heyi Guo wrote: > > > > > > On 2019/3/1 21:47, Michael S. Tsirkin wrote: > > > On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote: > > > > After the introduction of generic PCIe root port and PCIe-PCI bridge, > > > > we will also have SHPC controller on ARM, so just enalbe SHPC native > > > > hot plug. > > > > > > > > Cc: Shannon Zhao > > > > Cc: Peter Maydell > > > > Cc: "Michael S. Tsirkin" > > > > Cc: Igor Mammedov > > > > Signed-off-by: Heyi Guo > > > > Signed-off-by: Heyi Guo > > > > > > So when OS enables SHPC, should we block ACPI hotplug events? > > I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently? > > > > Thanks, > > Heyi > > Oh I didn't realise. That explains it sorry about the noise. And I thought we did not support them on PCIe completely (I mean q35/ich9). (Or did I miss something)? > > > > > > > > --- > > > > hw/arm/virt-acpi-build.c | 7 ++++++- > > > > 1 file changed, 6 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c > > > > index 04b62c7..7849ec5 100644 > > > > --- a/hw/arm/virt-acpi-build.c > > > > +++ b/hw/arm/virt-acpi-build.c > > > > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, > > > > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); > > > > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP"))); > > > > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); > > > > - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL), > > > > + > > > > + /* > > > > + * Allow OS control for all 5 features: > > > > + * PCIeHotplug SHPCHotplug PME AER PCIeCapability. > > > > + */ > > > > + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL), > > > > aml_name("CTRL"))); > > > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1)))); > > > > -- > > > > 1.8.3.1 > > > . > > > > >