From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915: Fix bit name in PP_STATUS register
Date: Mon, 4 Mar 2019 21:43:43 +0200 [thread overview]
Message-ID: <20190304194343.GA16917@intel.com> (raw)
In-Reply-To: <20190302011405.6405-1-lucas.demarchi@intel.com>
On Fri, Mar 01, 2019 at 05:14:04PM -0800, Lucas De Marchi wrote:
> According to the spec PP_SEQUENCE_STATE_ON_S1_1 is the correct name, so
> just rename it.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c9b482bc6433..c9b868347481 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4723,7 +4723,7 @@ enum {
> #define PP_SEQUENCE_STATE_OFF_S0_2 (0x2 << 0)
> #define PP_SEQUENCE_STATE_OFF_S0_3 (0x3 << 0)
> #define PP_SEQUENCE_STATE_ON_IDLE (0x8 << 0)
> -#define PP_SEQUENCE_STATE_ON_S1_0 (0x9 << 0)
> +#define PP_SEQUENCE_STATE_ON_S1_1 (0x9 << 0)
> #define PP_SEQUENCE_STATE_ON_S1_2 (0xa << 0)
> #define PP_SEQUENCE_STATE_ON_S1_3 (0xb << 0)
> #define PP_SEQUENCE_STATE_RESET (0xf << 0)
> --
> 2.20.1
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2019-03-04 19:43 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-02 1:14 [PATCH 1/2] drm/i915: Fix bit name in PP_STATUS register Lucas De Marchi
2019-03-02 1:14 ` [PATCH 2/2] drm/i915: fix placement of ICP_PP_CONTROL Lucas De Marchi
2019-03-04 19:48 ` Ville Syrjälä
2019-03-04 21:13 ` Jani Nikula
2019-03-05 13:23 ` Jani Nikula
2019-03-05 21:07 ` Lucas De Marchi
2019-03-06 13:19 ` Ville Syrjälä
2019-03-08 23:23 ` [PATCH v2] drm/i915: remove ICP_PP_CONTROL Lucas De Marchi
2020-01-02 23:44 ` [Intel-gfx] " Lucas De Marchi
2020-01-07 14:20 ` Ville Syrjälä
2019-03-02 2:08 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register Patchwork
2019-03-02 2:40 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-02 12:29 ` ✓ Fi.CI.IGT: " Patchwork
2019-03-04 19:43 ` Ville Syrjälä [this message]
2019-03-09 0:21 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register (rev2) Patchwork
2019-03-09 8:17 ` ✓ Fi.CI.IGT: " Patchwork
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