From: Qiang Yu <yuq825@gmail.com>
To: dri-devel@lists.freedesktop.org
Cc: lima@lists.freedesktop.org,
Maxime Ripard <maxime.ripard@bootlin.com>,
David Airlie <airlied@linux.ie>, Qiang Yu <yuq825@gmail.com>,
Sean Paul <sean@poorly.run>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>
Subject: [PATCH v2] drm/fourcc: add ARM GPU tile format
Date: Sat, 9 Mar 2019 22:09:02 +0800 [thread overview]
Message-ID: <20190309140902.9871-1-yuq825@gmail.com> (raw)
v2: seperate AFBC and GPU encoding
Cc: Brian Starkey <Brian.Starkey@arm.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
---
include/uapi/drm/drm_fourcc.h | 31 ++++++++++++++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 9fa7cf7bb274..7af5197e7ebc 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -601,6 +601,19 @@ extern "C" {
*/
#define DRM_FORMAT_MOD_BROADCOM_UIF fourcc_mod_code(BROADCOM, 6)
+/*
+ * Arm Device code
+ *
+ * Arm has multiple devices which do not share buffer format,
+ * so add a device field at the MSB of the format field to seperate
+ * each device's encoding.
+ */
+#define DRM_FORMAT_MOD_ARM_DEVICE_AFBC 0x00
+#define DRM_FORMAT_MOD_ARM_DEVICE_GPU 0x01
+
+#define DRM_FORMAT_MOD_ARM_CODE(device, val) \
+ fourcc_mod_code(ARM, ((__u64)device << 48) | ((val) & 0x0000ffffffffffffULL))
+
/*
* Arm Framebuffer Compression (AFBC) modifiers
*
@@ -615,7 +628,8 @@ extern "C" {
* Further information on the use of AFBC modifiers can be found in
* Documentation/gpu/afbc.rst
*/
-#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) fourcc_mod_code(ARM, __afbc_mode)
+#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) \
+ DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_DEVICE_AFBC, __afbc_mode)
/*
* AFBC superblock size
@@ -709,6 +723,21 @@ extern "C" {
*/
#define AFBC_FORMAT_MOD_BCH (1ULL << 11)
+/*
+ * Arm GPU modifiers
+ */
+#define DRM_FORMAT_MOD_ARM_GPU(mode) \
+ DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_DEVICE_GPU, mode)
+
+/*
+ * Arm GPU tiled format
+ *
+ * This is used by ARM Mali Utgard/Midgard GPU. It divides buffer into
+ * 16x16 pixel blocks. Blocks are stored linearly in order, but pixels
+ * in the block are reordered.
+ */
+#define DRM_FORMAT_MOD_ARM_GPU_TILED DRM_FORMAT_MOD_ARM_GPU(1)
+
/*
* Allwinner tiled modifier
*
--
2.17.1
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next reply other threads:[~2019-03-09 14:09 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-09 14:09 Qiang Yu [this message]
2019-03-10 2:08 ` [PATCH v2] drm/fourcc: add ARM GPU tile format Alyssa Rosenzweig
2019-03-10 2:35 ` Qiang Yu
2019-03-10 2:53 ` Alyssa Rosenzweig
2019-03-10 3:01 ` Qiang Yu
2019-03-10 3:04 ` Alyssa Rosenzweig
2019-03-11 16:00 ` Ayan Halder
2019-03-11 16:39 ` Alyssa Rosenzweig
2019-03-12 1:50 ` Qiang Yu
2019-03-12 15:41 ` Ayan Halder
2019-03-13 13:16 ` Qiang Yu
2019-03-14 22:58 ` Alyssa Rosenzweig
2019-03-14 22:54 ` Alyssa Rosenzweig
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