From mboxrd@z Thu Jan 1 00:00:00 1970 From: Greg Kroah-Hartman Subject: [PATCH 5.0 13/25] drm: disable uncached DMA optimization for ARM and arm64 Date: Tue, 12 Mar 2019 10:08:51 -0700 Message-ID: <20190312170404.531087175@linuxfoundation.org> References: <20190312170403.643852550@linuxfoundation.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20190312170403.643852550@linuxfoundation.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: linux-kernel@vger.kernel.org Cc: Maxime Ripard , Will Deacon , dri-devel , Huang Rui , Sasha Levin , Carsten Haitzler , Michael Ellerman , amd-gfx list , Christoph Hellwig , David Airlie , Junwei Zhang , Sean Paul , Ard Biesheuvel , Greg Kroah-Hartman , Michel Daenzer , stable@vger.kernel.org, Alex Deucher , Robin Murphy , Christian Koenig List-Id: amd-gfx.lists.freedesktop.org NS4wLXN0YWJsZSByZXZpZXcgcGF0Y2guICBJZiBhbnlvbmUgaGFzIGFueSBvYmplY3Rpb25zLCBw bGVhc2UgbGV0IG1lIGtub3cuCgotLS0tLS0tLS0tLS0tLS0tLS0KClsgVXBzdHJlYW0gY29tbWl0 IGUwMmY1YzFiYjIyODNjZmNlZTY4ZjJmMGZlZGRjYzA2MTUwZjEzYWEgXQoKVGhlIERSTSBkcml2 ZXIgc3RhY2sgaXMgZGVzaWduZWQgdG8gd29yayB3aXRoIGNhY2hlIGNvaGVyZW50IGRldmljZXMK b25seSwgYnV0IHBlcm1pdHMgYW4gb3B0aW1pemF0aW9uIHRvIGJlIGVuYWJsZWQgaW4gc29tZSBj YXNlcywgd2hlcmUKZm9yIHNvbWUgYnVmZmVycywgYm90aCB0aGUgQ1BVIGFuZCB0aGUgR1BVIHVz ZSB1bmNhY2hlZCBtYXBwaW5ncywKcmVtb3ZpbmcgdGhlIG5lZWQgZm9yIERNQSBzbm9vcGluZyBh bmQgYWxsb2NhdGlvbiBpbiB0aGUgQ1BVIGNhY2hlcy4KClRoZSB1c2Ugb2YgdW5jYWNoZWQgR1BV IG1hcHBpbmdzIHJlbGllcyBvbiB0aGUgY29ycmVjdCBpbXBsZW1lbnRhdGlvbgpvZiB0aGUgUENJ ZSBOb1Nub29wIFRMUCBhdHRyaWJ1dGUgYnkgdGhlIHBsYXRmb3JtLCBvdGhlcndpc2UgdGhlIEdQ VQp3aWxsIHVzZSBjYWNoZWQgbWFwcGluZ3Mgbm9uZXRoZWxlc3MuIE9uIHg4NiBwbGF0Zm9ybXMs IHRoaXMgZG9lcyBub3QKc2VlbSB0byBtYXR0ZXIsIGFzIHVuY2FjaGVkIENQVSBtYXBwaW5ncyB3 aWxsIHNub29wIHRoZSBjYWNoZXMgaW4gYW55CmNhc2UuIEhvd2V2ZXIsIG9uIEFSTSBhbmQgYXJt NjQsIGVuYWJsaW5nIHRoaXMgb3B0aW1pemF0aW9uIG9uIGEKcGxhdGZvcm0gd2hlcmUgTm9Tbm9v cCBpcyBpZ25vcmVkIHJlc3VsdHMgaW4gbG9zcyBvZiBjb2hlcmVuY3ksIHdoaWNoCmJyZWFrcyBj b3JyZWN0IG9wZXJhdGlvbiBvZiB0aGUgZGV2aWNlLiBTaW5jZSB3ZSBoYXZlIG5vIHdheSBvZgpk ZXRlY3Rpbmcgd2hldGhlciBOb1Nub29wIHdvcmtzIG9yIG5vdCwganVzdCBkaXNhYmxlIHRoaXMK b3B0aW1pemF0aW9uIGVudGlyZWx5IGZvciBBUk0gYW5kIGFybTY0LgoKQ2M6IENocmlzdGlhbiBL b2VuaWcgPGNocmlzdGlhbi5rb2VuaWdAYW1kLmNvbT4KQ2M6IEFsZXggRGV1Y2hlciA8YWxleGFu ZGVyLmRldWNoZXJAYW1kLmNvbT4KQ2M6IERhdmlkIFpob3UgPERhdmlkMS5aaG91QGFtZC5jb20+ CkNjOiBIdWFuZyBSdWkgPHJheS5odWFuZ0BhbWQuY29tPgpDYzogSnVud2VpIFpoYW5nIDxKZXJy eS5aaGFuZ0BhbWQuY29tPgpDYzogTWljaGVsIERhZW56ZXIgPG1pY2hlbC5kYWVuemVyQGFtZC5j b20+CkNjOiBEYXZpZCBBaXJsaWUgPGFpcmxpZWRAbGludXguaWU+CkNjOiBEYW5pZWwgVmV0dGVy IDxkYW5pZWxAZmZ3bGwuY2g+CkNjOiBNYWFydGVuIExhbmtob3JzdCA8bWFhcnRlbi5sYW5raG9y c3RAbGludXguaW50ZWwuY29tPgpDYzogTWF4aW1lIFJpcGFyZCA8bWF4aW1lLnJpcGFyZEBib290 bGluLmNvbT4KQ2M6IFNlYW4gUGF1bCA8c2VhbkBwb29ybHkucnVuPgpDYzogTWljaGFlbCBFbGxl cm1hbiA8bXBlQGVsbGVybWFuLmlkLmF1PgpDYzogQmVuamFtaW4gSGVycmVuc2NobWlkdCA8YmVu aEBrZXJuZWwuY3Jhc2hpbmcub3JnPgpDYzogV2lsbCBEZWFjb24gPHdpbGwuZGVhY29uQGFybS5j b20+CkNjOiBDaHJpc3RvcGggSGVsbHdpZyA8aGNoQGluZnJhZGVhZC5vcmc+CkNjOiBSb2JpbiBN dXJwaHkgPHJvYmluLm11cnBoeUBhcm0uY29tPgpDYzogYW1kLWdmeCBsaXN0IDxhbWQtZ2Z4QGxp c3RzLmZyZWVkZXNrdG9wLm9yZz4KQ2M6IGRyaS1kZXZlbCA8ZHJpLWRldmVsQGxpc3RzLmZyZWVk ZXNrdG9wLm9yZz4KUmVwb3J0ZWQtYnk6IENhcnN0ZW4gSGFpdHpsZXIgPENhcnN0ZW4uSGFpdHps ZXJAYXJtLmNvbT4KU2lnbmVkLW9mZi1ieTogQXJkIEJpZXNoZXV2ZWwgPGFyZC5iaWVzaGV1dmVs QGxpbmFyby5vcmc+ClJldmlld2VkLWJ5OiBDaHJpc3RpYW4gS8O2bmlnIDxjaHJpc3RpYW4ua29l bmlnQGFtZC5jb20+ClJldmlld2VkLWJ5OiBBbGV4IERldWNoZXIgPGFsZXhhbmRlci5kZXVjaGVy QGFtZC5jb20+Ckxpbms6IGh0dHBzOi8vcGF0Y2h3b3JrLmtlcm5lbC5vcmcvcGF0Y2gvMTA3Nzg4 MTUvClNpZ25lZC1vZmYtYnk6IENocmlzdGlhbiBLw7ZuaWcgPGNocmlzdGlhbi5rb2VuaWdAYW1k LmNvbT4KU2lnbmVkLW9mZi1ieTogU2FzaGEgTGV2aW4gPHNhc2hhbEBrZXJuZWwub3JnPgotLS0K IGluY2x1ZGUvZHJtL2RybV9jYWNoZS5oIHwgICAxOCArKysrKysrKysrKysrKysrKysKIDEgZmls ZSBjaGFuZ2VkLCAxOCBpbnNlcnRpb25zKCspCgotLS0gYS9pbmNsdWRlL2RybS9kcm1fY2FjaGUu aAorKysgYi9pbmNsdWRlL2RybS9kcm1fY2FjaGUuaApAQCAtNDcsNiArNDcsMjQgQEAgc3RhdGlj IGlubGluZSBib29sIGRybV9hcmNoX2Nhbl93Y19tZW1vcgogCXJldHVybiBmYWxzZTsKICNlbGlm IGRlZmluZWQoQ09ORklHX01JUFMpICYmIGRlZmluZWQoQ09ORklHX0NQVV9MT09OR1NPTjMpCiAJ cmV0dXJuIGZhbHNlOworI2VsaWYgZGVmaW5lZChDT05GSUdfQVJNKSB8fCBkZWZpbmVkKENPTkZJ R19BUk02NCkKKwkvKgorCSAqIFRoZSBEUk0gZHJpdmVyIHN0YWNrIGlzIGRlc2lnbmVkIHRvIHdv cmsgd2l0aCBjYWNoZSBjb2hlcmVudCBkZXZpY2VzCisJICogb25seSwgYnV0IHBlcm1pdHMgYW4g b3B0aW1pemF0aW9uIHRvIGJlIGVuYWJsZWQgaW4gc29tZSBjYXNlcywgd2hlcmUKKwkgKiBmb3Ig c29tZSBidWZmZXJzLCBib3RoIHRoZSBDUFUgYW5kIHRoZSBHUFUgdXNlIHVuY2FjaGVkIG1hcHBp bmdzLAorCSAqIHJlbW92aW5nIHRoZSBuZWVkIGZvciBETUEgc25vb3BpbmcgYW5kIGFsbG9jYXRp b24gaW4gdGhlIENQVSBjYWNoZXMuCisJICoKKwkgKiBUaGUgdXNlIG9mIHVuY2FjaGVkIEdQVSBt YXBwaW5ncyByZWxpZXMgb24gdGhlIGNvcnJlY3QgaW1wbGVtZW50YXRpb24KKwkgKiBvZiB0aGUg UENJZSBOb1Nub29wIFRMUCBhdHRyaWJ1dGUgYnkgdGhlIHBsYXRmb3JtLCBvdGhlcndpc2UgdGhl IEdQVQorCSAqIHdpbGwgdXNlIGNhY2hlZCBtYXBwaW5ncyBub25ldGhlbGVzcy4gT24geDg2IHBs YXRmb3JtcywgdGhpcyBkb2VzIG5vdAorCSAqIHNlZW0gdG8gbWF0dGVyLCBhcyB1bmNhY2hlZCBD UFUgbWFwcGluZ3Mgd2lsbCBzbm9vcCB0aGUgY2FjaGVzIGluIGFueQorCSAqIGNhc2UuIEhvd2V2 ZXIsIG9uIEFSTSBhbmQgYXJtNjQsIGVuYWJsaW5nIHRoaXMgb3B0aW1pemF0aW9uIG9uIGEKKwkg KiBwbGF0Zm9ybSB3aGVyZSBOb1Nub29wIGlzIGlnbm9yZWQgcmVzdWx0cyBpbiBsb3NzIG9mIGNv aGVyZW5jeSwgd2hpY2gKKwkgKiBicmVha3MgY29ycmVjdCBvcGVyYXRpb24gb2YgdGhlIGRldmlj ZS4gU2luY2Ugd2UgaGF2ZSBubyB3YXkgb2YKKwkgKiBkZXRlY3Rpbmcgd2hldGhlciBOb1Nub29w IHdvcmtzIG9yIG5vdCwganVzdCBkaXNhYmxlIHRoaXMKKwkgKiBvcHRpbWl6YXRpb24gZW50aXJl bHkgZm9yIEFSTSBhbmQgYXJtNjQuCisJICovCisJcmV0dXJuIGZhbHNlOwogI2Vsc2UKIAlyZXR1 cm4gdHJ1ZTsKICNlbmRpZgoKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNr dG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2Ry aS1kZXZlbA== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E91AC43381 for ; Tue, 12 Mar 2019 18:14:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ED20D2087C for ; Tue, 12 Mar 2019 18:14:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1552414451; bh=FipTVCBHndGvnon2xyD2/dLzZY90Gik19ywchGNhqHM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=AUo6Y6lw6G8PfwEE/er9V8Tj0eVwfsSl9L6CndGz5Ob+Mywmh0YaSQhBlrLglBTon SICLJVzRD+bae3ZkhXjLdoapcjUTxu5onGzype0PLLUhVZ3ngquDkYw/WZddIByFgx mv1fOZsFECtoS1hl367VwBKCz3RdthdDW3J/QycQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727286AbfCLSN5 (ORCPT ); Tue, 12 Mar 2019 14:13:57 -0400 Received: from mail.kernel.org ([198.145.29.99]:44548 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726886AbfCLRLY (ORCPT ); Tue, 12 Mar 2019 13:11:24 -0400 Received: from localhost (unknown [104.133.8.98]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7609C21734; Tue, 12 Mar 2019 17:11:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1552410683; bh=FipTVCBHndGvnon2xyD2/dLzZY90Gik19ywchGNhqHM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=D0mAfRO6inqd68TpDBywk9NZsarQ96njklBSLBo1Hy32Xv8YstJ7qcYfN7Ve8i8Gr wqN515lJlRgFoqrbn/4PRAzsIFJgqQpqioqiDEYwCEP/tRM0N1TlA84IlxbS/CWnWJ J/4WIhpp0Dh9DJc7jcWn6dDCdOwEfdycdYjkHy3E= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Christian Koenig , Alex Deucher , David Zhou , Huang Rui , Junwei Zhang , Michel Daenzer , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Sean Paul , Michael Ellerman , Benjamin Herrenschmidt , Will Deacon , Christoph Hellwig , Robin Murphy , amd-gfx list , dri-devel , Carsten Haitzler , Ard Biesheuvel , Sasha Levin Subject: [PATCH 5.0 13/25] drm: disable uncached DMA optimization for ARM and arm64 Date: Tue, 12 Mar 2019 10:08:51 -0700 Message-Id: <20190312170404.531087175@linuxfoundation.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190312170403.643852550@linuxfoundation.org> References: <20190312170403.643852550@linuxfoundation.org> User-Agent: quilt/0.65 X-stable: review X-Patchwork-Hint: ignore MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 5.0-stable review patch. If anyone has any objections, please let me know. ------------------ [ Upstream commit e02f5c1bb2283cfcee68f2f0feddcc06150f13aa ] The DRM driver stack is designed to work with cache coherent devices only, but permits an optimization to be enabled in some cases, where for some buffers, both the CPU and the GPU use uncached mappings, removing the need for DMA snooping and allocation in the CPU caches. The use of uncached GPU mappings relies on the correct implementation of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU will use cached mappings nonetheless. On x86 platforms, this does not seem to matter, as uncached CPU mappings will snoop the caches in any case. However, on ARM and arm64, enabling this optimization on a platform where NoSnoop is ignored results in loss of coherency, which breaks correct operation of the device. Since we have no way of detecting whether NoSnoop works or not, just disable this optimization entirely for ARM and arm64. Cc: Christian Koenig Cc: Alex Deucher Cc: David Zhou Cc: Huang Rui Cc: Junwei Zhang Cc: Michel Daenzer Cc: David Airlie Cc: Daniel Vetter Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Sean Paul Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Will Deacon Cc: Christoph Hellwig Cc: Robin Murphy Cc: amd-gfx list Cc: dri-devel Reported-by: Carsten Haitzler Signed-off-by: Ard Biesheuvel Reviewed-by: Christian König Reviewed-by: Alex Deucher Link: https://patchwork.kernel.org/patch/10778815/ Signed-off-by: Christian König Signed-off-by: Sasha Levin --- include/drm/drm_cache.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) --- a/include/drm/drm_cache.h +++ b/include/drm/drm_cache.h @@ -47,6 +47,24 @@ static inline bool drm_arch_can_wc_memor return false; #elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3) return false; +#elif defined(CONFIG_ARM) || defined(CONFIG_ARM64) + /* + * The DRM driver stack is designed to work with cache coherent devices + * only, but permits an optimization to be enabled in some cases, where + * for some buffers, both the CPU and the GPU use uncached mappings, + * removing the need for DMA snooping and allocation in the CPU caches. + * + * The use of uncached GPU mappings relies on the correct implementation + * of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU + * will use cached mappings nonetheless. On x86 platforms, this does not + * seem to matter, as uncached CPU mappings will snoop the caches in any + * case. However, on ARM and arm64, enabling this optimization on a + * platform where NoSnoop is ignored results in loss of coherency, which + * breaks correct operation of the device. Since we have no way of + * detecting whether NoSnoop works or not, just disable this + * optimization entirely for ARM and arm64. + */ + return false; #else return true; #endif