From: Peter Zijlstra <peterz@infradead.org>
To: Andi Kleen <ak@linux.intel.com>
Cc: kan.liang@linux.intel.com, acme@kernel.org, mingo@redhat.com,
linux-kernel@vger.kernel.org, tglx@linutronix.de,
jolsa@kernel.org, eranian@google.com,
alexander.shishkin@linux.intel.com
Subject: Re: [PATCH 03/22] perf/x86/intel: Support adaptive PEBSv4
Date: Wed, 20 Mar 2019 16:58:15 +0100 [thread overview]
Message-ID: <20190320155815.GI6058@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20190319213824.GY24002@tassilo.jf.intel.com>
On Tue, Mar 19, 2019 at 02:38:24PM -0700, Andi Kleen wrote:
> > How much work would intel_pmu_drain_pebs_icl() be?
> >
> > I'm thinking that might not be terrible.
>
> I had it in an early version of the code, but it ended up with a lot
> of code duplication.
I'm thinking that if you remove all the <v3 nonsense, it shouldn't be
_that_ much. A quick hack here makes it ~60 lines.
And it avoids sprinkling a whole bunch of conditionals around and
introducing that new x86_pmu method.
next prev parent reply other threads:[~2019-03-20 15:58 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-18 21:41 [PATCH 00/22] perf: Add Icelake support kan.liang
2019-03-18 21:41 ` [PATCH 01/22] perf/core: Support outputting registers from a separate array kan.liang
2019-03-19 13:00 ` Peter Zijlstra
2019-03-19 14:13 ` Peter Zijlstra
2019-03-18 21:41 ` [PATCH 02/22] perf/x86/intel: Extract memory code PEBS parser for reuse kan.liang
2019-03-19 13:14 ` Peter Zijlstra
2019-03-18 21:41 ` [PATCH 03/22] perf/x86/intel: Support adaptive PEBSv4 kan.liang
2019-03-19 14:47 ` Peter Zijlstra
2019-03-19 16:03 ` Andi Kleen
2019-03-19 16:11 ` Peter Zijlstra
2019-03-19 21:20 ` Liang, Kan
2019-03-19 21:38 ` Andi Kleen
2019-03-20 15:58 ` Peter Zijlstra [this message]
2019-03-18 21:41 ` [PATCH 04/22] perf/x86/lbr: Avoid reading the LBRs when adaptive PEBS handles them kan.liang
2019-03-18 21:41 ` [PATCH 05/22] perf/x86: Support constraint ranges kan.liang
2019-03-19 14:53 ` Peter Zijlstra
2019-03-19 15:27 ` Peter Zijlstra
2019-03-19 15:57 ` Andi Kleen
2019-03-19 16:09 ` Peter Zijlstra
2019-03-18 21:41 ` [PATCH 06/22] perf/x86/intel: Add Icelake support kan.liang
2019-03-20 0:08 ` Stephane Eranian
2019-03-20 14:20 ` Liang, Kan
2019-03-18 21:41 ` [PATCH 07/22] perf/x86/intel/cstate: " kan.liang
2019-03-18 21:41 ` [PATCH 08/22] perf/x86/intel/rapl: " kan.liang
2019-03-18 21:41 ` [PATCH 09/22] perf/x86/msr: " kan.liang
2019-03-18 21:41 ` [PATCH 10/22] perf/x86/intel/uncore: Add Intel Icelake uncore support kan.liang
2019-03-18 21:41 ` [PATCH 11/22] perf/core: Support a REMOVE transaction kan.liang
2019-03-19 15:29 ` Peter Zijlstra
2019-03-18 21:41 ` [PATCH 12/22] perf/x86/intel: Basic support for metrics counters kan.liang
2019-03-18 21:41 ` [PATCH 13/22] perf/x86/intel: Support overflows on SLOTS kan.liang
2019-03-18 21:41 ` [PATCH 14/22] perf/x86/intel: Support hardware TopDown metrics kan.liang
2019-03-18 21:41 ` [PATCH 15/22] perf/x86/intel: Set correct weight for topdown subevent counters kan.liang
2019-03-18 21:41 ` [PATCH 16/22] perf/x86/intel: Export new top down events for Icelake kan.liang
2019-03-18 21:41 ` [PATCH 17/22] perf/x86/intel: Disable sampling read slots and topdown kan.liang
2019-03-18 21:41 ` [PATCH 18/22] perf/x86/intel: Support CPUID 10.ECX to disable fixed counters kan.liang
2019-03-18 21:41 ` [PATCH 19/22] perf, tools: Add support for recording and printing XMM registers kan.liang
2019-03-18 21:41 ` [PATCH 20/22] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2019-03-18 21:41 ` [PATCH 21/22] perf, tools: Add documentation for topdown metrics kan.liang
2019-03-18 21:41 ` [PATCH 22/22] perf vendor events intel: Add JSON files for Icelake kan.liang
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