* [PATCH] [Outreachy kernel] staging: sm750fb: avoid camelcase
@ 2019-03-21 5:51 Payal Kshirsagar
2019-03-21 7:18 ` Greg KH
0 siblings, 1 reply; 3+ messages in thread
From: Payal Kshirsagar @ 2019-03-21 5:51 UTC (permalink / raw)
To: outreachy-kernel; +Cc: Payal Kshirsagar
Eliminate camelcase to meet the style.
Signed-off-by: Payal Kshirsagar <payal.s.kshirsagar.98@gmail.com>
---
drivers/staging/sm750fb/ddk750_mode.c | 94 +++++++++++++++++------------------
1 file changed, 47 insertions(+), 47 deletions(-)
diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c
index 4dac691..5dfa87d 100644
--- a/drivers/staging/sm750fb/ddk750_mode.c
+++ b/drivers/staging/sm750fb/ddk750_mode.c
@@ -13,13 +13,13 @@
* HW only supports 7 predefined pixel clocks, and clock select is
* in bit 29:27 of Display Control register.
*/
-static unsigned long displayControlAdjust_SM750LE(struct mode_parameter *pModeParam,
- unsigned long dispControl)
+static unsigned long display_control_adjust_SM750LE(struct mode_parameter *p_mode_param,
+ unsigned long disp_control)
{
unsigned long x, y;
- x = pModeParam->horizontal_display_end;
- y = pModeParam->vertical_display_end;
+ x = p_mode_param->horizontal_display_end;
+ y = p_mode_param->vertical_display_end;
/*
* SM750LE has to set up the top-left and bottom-right
@@ -35,47 +35,47 @@ static unsigned long displayControlAdjust_SM750LE(struct mode_parameter *pModePa
((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK));
/*
- * Assume common fields in dispControl have been properly set before
+ * Assume common fields in disp_control have been properly set before
* calling this function.
- * This function only sets the extra fields in dispControl.
+ * This function only sets the extra fields in disp_control.
*/
/* Clear bit 29:27 of display control register */
- dispControl &= ~CRT_DISPLAY_CTRL_CLK_MASK;
+ disp_control &= ~CRT_DISPLAY_CTRL_CLK_MASK;
/* Set bit 29:27 of display control register for the right clock */
/* Note that SM750LE only need to supported 7 resolutions. */
if (x == 800 && y == 600)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL41;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL41;
else if (x == 1024 && y == 768)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL65;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL65;
else if (x == 1152 && y == 864)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL80;
else if (x == 1280 && y == 768)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL80;
else if (x == 1280 && y == 720)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL74;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL74;
else if (x == 1280 && y == 960)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL108;
else if (x == 1280 && y == 1024)
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL108;
else /* default to VGA clock */
- dispControl |= CRT_DISPLAY_CTRL_CLK_PLL25;
+ disp_control |= CRT_DISPLAY_CTRL_CLK_PLL25;
/* Set bit 25:24 of display controller */
- dispControl |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT);
+ disp_control |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT);
/* Set bit 14 of display controller */
- dispControl |= DISPLAY_CTRL_CLOCK_PHASE;
+ disp_control |= DISPLAY_CTRL_CLOCK_PHASE;
- poke32(CRT_DISPLAY_CTRL, dispControl);
+ poke32(CRT_DISPLAY_CTRL, disp_control);
- return dispControl;
+ return disp_control;
}
/* only timing related registers will be programed */
-static int programModeRegisters(struct mode_parameter *pModeParam,
- struct pll_value *pll)
+static int program_mode_registers(struct mode_parameter *p_mode_param,
+ struct pll_value *pll)
{
int ret = 0;
int cnt = 0;
@@ -85,46 +85,46 @@ static int programModeRegisters(struct mode_parameter *pModeParam,
/* programe secondary pixel clock */
poke32(CRT_PLL_CTRL, sm750_format_pll_reg(pll));
- tmp = ((pModeParam->horizontal_total - 1) <<
+ tmp = ((p_mode_param->horizontal_total - 1) <<
CRT_HORIZONTAL_TOTAL_TOTAL_SHIFT) &
CRT_HORIZONTAL_TOTAL_TOTAL_MASK;
- tmp |= (pModeParam->horizontal_display_end - 1) &
+ tmp |= (p_mode_param->horizontal_display_end - 1) &
CRT_HORIZONTAL_TOTAL_DISPLAY_END_MASK;
poke32(CRT_HORIZONTAL_TOTAL, tmp);
- tmp = (pModeParam->horizontal_sync_width <<
+ tmp = (p_mode_param->horizontal_sync_width <<
CRT_HORIZONTAL_SYNC_WIDTH_SHIFT) &
CRT_HORIZONTAL_SYNC_WIDTH_MASK;
- tmp |= (pModeParam->horizontal_sync_start - 1) &
+ tmp |= (p_mode_param->horizontal_sync_start - 1) &
CRT_HORIZONTAL_SYNC_START_MASK;
poke32(CRT_HORIZONTAL_SYNC, tmp);
- tmp = ((pModeParam->vertical_total - 1) <<
+ tmp = ((p_mode_param->vertical_total - 1) <<
CRT_VERTICAL_TOTAL_TOTAL_SHIFT) &
CRT_VERTICAL_TOTAL_TOTAL_MASK;
- tmp |= (pModeParam->vertical_display_end - 1) &
+ tmp |= (p_mode_param->vertical_display_end - 1) &
CRT_VERTICAL_TOTAL_DISPLAY_END_MASK;
poke32(CRT_VERTICAL_TOTAL, tmp);
- tmp = ((pModeParam->vertical_sync_height <<
+ tmp = ((p_mode_param->vertical_sync_height <<
CRT_VERTICAL_SYNC_HEIGHT_SHIFT)) &
CRT_VERTICAL_SYNC_HEIGHT_MASK;
- tmp |= (pModeParam->vertical_sync_start - 1) &
+ tmp |= (p_mode_param->vertical_sync_start - 1) &
CRT_VERTICAL_SYNC_START_MASK;
poke32(CRT_VERTICAL_SYNC, tmp);
tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE;
- if (pModeParam->vertical_sync_polarity)
+ if (p_mode_param->vertical_sync_polarity)
tmp |= DISPLAY_CTRL_VSYNC_PHASE;
- if (pModeParam->horizontal_sync_polarity)
+ if (p_mode_param->horizontal_sync_polarity)
tmp |= DISPLAY_CTRL_HSYNC_PHASE;
if (sm750_get_chip_type() == SM750LE) {
- displayControlAdjust_SM750LE(pModeParam, tmp);
+ display_control_adjust_SM750LE(p_mode_param, tmp);
} else {
reg = peek32(CRT_DISPLAY_CTRL) &
~(DISPLAY_CTRL_VSYNC_PHASE |
@@ -139,40 +139,40 @@ static int programModeRegisters(struct mode_parameter *pModeParam,
poke32(PANEL_PLL_CTRL, sm750_format_pll_reg(pll));
- reg = ((pModeParam->horizontal_total - 1) <<
+ reg = ((p_mode_param->horizontal_total - 1) <<
PANEL_HORIZONTAL_TOTAL_TOTAL_SHIFT) &
PANEL_HORIZONTAL_TOTAL_TOTAL_MASK;
- reg |= ((pModeParam->horizontal_display_end - 1) &
+ reg |= ((p_mode_param->horizontal_display_end - 1) &
PANEL_HORIZONTAL_TOTAL_DISPLAY_END_MASK);
poke32(PANEL_HORIZONTAL_TOTAL, reg);
poke32(PANEL_HORIZONTAL_SYNC,
- ((pModeParam->horizontal_sync_width <<
+ ((p_mode_param->horizontal_sync_width <<
PANEL_HORIZONTAL_SYNC_WIDTH_SHIFT) &
PANEL_HORIZONTAL_SYNC_WIDTH_MASK) |
- ((pModeParam->horizontal_sync_start - 1) &
+ ((p_mode_param->horizontal_sync_start - 1) &
PANEL_HORIZONTAL_SYNC_START_MASK));
poke32(PANEL_VERTICAL_TOTAL,
- (((pModeParam->vertical_total - 1) <<
+ (((p_mode_param->vertical_total - 1) <<
PANEL_VERTICAL_TOTAL_TOTAL_SHIFT) &
PANEL_VERTICAL_TOTAL_TOTAL_MASK) |
- ((pModeParam->vertical_display_end - 1) &
+ ((p_mode_param->vertical_display_end - 1) &
PANEL_VERTICAL_TOTAL_DISPLAY_END_MASK));
poke32(PANEL_VERTICAL_SYNC,
- ((pModeParam->vertical_sync_height <<
+ ((p_mode_param->vertical_sync_height <<
PANEL_VERTICAL_SYNC_HEIGHT_SHIFT) &
PANEL_VERTICAL_SYNC_HEIGHT_MASK) |
- ((pModeParam->vertical_sync_start - 1) &
+ ((p_mode_param->vertical_sync_start - 1) &
PANEL_VERTICAL_SYNC_START_MASK));
tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE;
- if (pModeParam->vertical_sync_polarity)
+ if (p_mode_param->vertical_sync_polarity)
tmp |= DISPLAY_CTRL_VSYNC_PHASE;
- if (pModeParam->horizontal_sync_polarity)
+ if (p_mode_param->horizontal_sync_polarity)
tmp |= DISPLAY_CTRL_HSYNC_PHASE;
- if (pModeParam->clock_phase_polarity)
+ if (p_mode_param->clock_phase_polarity)
tmp |= DISPLAY_CTRL_CLOCK_PHASE;
reserved = PANEL_DISPLAY_CTRL_RESERVED_MASK |
@@ -206,20 +206,20 @@ static int programModeRegisters(struct mode_parameter *pModeParam,
return ret;
}
-int ddk750_setModeTiming(struct mode_parameter *parm, enum clock_type clock)
+int ddk750_set_mode_timing(struct mode_parameter *parm, enum clock_type clock)
{
struct pll_value pll;
- unsigned int uiActualPixelClk;
+ unsigned int ui_actual_pixel_clk;
pll.inputFreq = DEFAULT_INPUT_CLOCK;
pll.clockType = clock;
- uiActualPixelClk = sm750_calc_pll_value(parm->pixel_clock, &pll);
+ ui_actual_pixel_clk = sm750_calc_pll_value(parm->pixel_clock, &pll);
if (sm750_get_chip_type() == SM750LE) {
/* set graphic mode via IO method */
outb_p(0x88, 0x3d4);
outb_p(0x06, 0x3d5);
}
- programModeRegisters(parm, &pll);
+ program_mode_registers(parm, &pll);
return 0;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] [Outreachy kernel] staging: sm750fb: avoid camelcase
2019-03-21 5:51 [PATCH] [Outreachy kernel] staging: sm750fb: avoid camelcase Payal Kshirsagar
@ 2019-03-21 7:18 ` Greg KH
2019-03-21 7:28 ` Payal Kshirsagar
0 siblings, 1 reply; 3+ messages in thread
From: Greg KH @ 2019-03-21 7:18 UTC (permalink / raw)
To: Payal Kshirsagar; +Cc: outreachy-kernel
On Thu, Mar 21, 2019 at 11:21:15AM +0530, Payal Kshirsagar wrote:
> Eliminate camelcase to meet the style.
Meet what style?
>
> Signed-off-by: Payal Kshirsagar <payal.s.kshirsagar.98@gmail.com>
> ---
> drivers/staging/sm750fb/ddk750_mode.c | 94 +++++++++++++++++------------------
> 1 file changed, 47 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c
> index 4dac691..5dfa87d 100644
> --- a/drivers/staging/sm750fb/ddk750_mode.c
> +++ b/drivers/staging/sm750fb/ddk750_mode.c
> @@ -13,13 +13,13 @@
> * HW only supports 7 predefined pixel clocks, and clock select is
> * in bit 29:27 of Display Control register.
> */
> -static unsigned long displayControlAdjust_SM750LE(struct mode_parameter *pModeParam,
> - unsigned long dispControl)
> +static unsigned long display_control_adjust_SM750LE(struct mode_parameter *p_mode_param,
> + unsigned long disp_control)
Try doing only one type of fix per patch.
One to fix up structure fields, and then another one for function names.
Putting them all together makes it very hard to review. This should be
a patch series for this type of fix.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] [Outreachy kernel] staging: sm750fb: avoid camelcase
2019-03-21 7:18 ` Greg KH
@ 2019-03-21 7:28 ` Payal Kshirsagar
0 siblings, 0 replies; 3+ messages in thread
From: Payal Kshirsagar @ 2019-03-21 7:28 UTC (permalink / raw)
To: Greg KH; +Cc: outreachy-kernel
[-- Attachment #1: Type: text/plain, Size: 1526 bytes --]
On Thu, 21 Mar 2019 at 12:49, Greg KH <gregkh@linuxfoundation.org> wrote:
> On Thu, Mar 21, 2019 at 11:21:15AM +0530, Payal Kshirsagar wrote:
> > Eliminate camelcase to meet the style.
>
> Meet what style?
>
> okay, I will mention it.
> >
> > Signed-off-by: Payal Kshirsagar <payal.s.kshirsagar.98@gmail.com>
> > ---
> > drivers/staging/sm750fb/ddk750_mode.c | 94
> +++++++++++++++++------------------
> > 1 file changed, 47 insertions(+), 47 deletions(-)
> >
> > diff --git a/drivers/staging/sm750fb/ddk750_mode.c
> b/drivers/staging/sm750fb/ddk750_mode.c
> > index 4dac691..5dfa87d 100644
> > --- a/drivers/staging/sm750fb/ddk750_mode.c
> > +++ b/drivers/staging/sm750fb/ddk750_mode.c
> > @@ -13,13 +13,13 @@
> > * HW only supports 7 predefined pixel clocks, and clock select is
> > * in bit 29:27 of Display Control register.
> > */
> > -static unsigned long displayControlAdjust_SM750LE(struct mode_parameter
> *pModeParam,
> > - unsigned long
> dispControl)
> > +static unsigned long display_control_adjust_SM750LE(struct
> mode_parameter *p_mode_param,
> > + unsigned long
> disp_control)
>
> Try doing only one type of fix per patch.
>
> One to fix up structure fields, and then another one for function names.
> Putting them all together makes it very hard to review. This should be
> a patch series for this type of fix.
>
> okay, i will make a patch series for the same.
thanking payal.
thanks,
>
> greg k-h
>
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2019-03-21 5:51 [PATCH] [Outreachy kernel] staging: sm750fb: avoid camelcase Payal Kshirsagar
2019-03-21 7:18 ` Greg KH
2019-03-21 7:28 ` Payal Kshirsagar
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