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Received: from [31.161.229.66] (helo=worktop.programming.kicks-ass.net) by merlin.infradead.org with esmtpsa (Exim 4.90_1 #2 (Red Hat Linux)) id 1h7NMw-0003US-JA; Fri, 22 Mar 2019 16:50:14 +0000 Received: by worktop.programming.kicks-ass.net (Postfix, from userid 1000) id 695B9984EE8; Fri, 22 Mar 2019 17:49:27 +0100 (CET) Date: Fri, 22 Mar 2019 17:49:27 +0100 From: Peter Zijlstra To: Julien Thierry Subject: Re: [PATCH v2 0/9] arm_pmu: Use NMI for perf interrupt Message-ID: <20190322164927.GH7905@worktop.programming.kicks-ass.net> References: <1553271844-49003-1-git-send-email-julien.thierry@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1553271844-49003-1-git-send-email-julien.thierry@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, alexander.shishkin@linux.intel.com, will.deacon@arm.com, acme@kernel.org, mingo@redhat.com, namhyung@kernel.org, jolsa@redhat.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Mar 22, 2019 at 04:23:55PM +0000, Julien Thierry wrote: > Hi, > > On arm64, perf reports that counter overflow very often (too often) > happen in function that potentially enabled interrutps: > > $ perf record -a -- sleep 60; perf report -F overhead,symbol > [...] > # Overhead Symbol > # ........ .......................................... > # > 6.58% [k] _raw_spin_unlock_irq > 6.10% [k] _raw_spin_unlock_irqrestore > 5.52% [k] ___bpf_prog_run > 4.37% [k] el0_svc_common > 2.58% [k] arch_cpu_idle > 2.39% [k] kmem_cache_alloc > 2.06% [k] __seccomp_filter > [...] > > The root issue is, if an overflow happens while executing with > interrupts disabled, the perf event will only be handled when interrupts > are reenabled (i.e. when the PMU interrupt is taken). The result being > the event being reported at the interrupt enabling location rather than > where the overflow actually happened. > > Now that we have support for pseudo-NMI on arm64 with GICv3, we can use > it to improve the profiling done using the PMU interrupt. > > With these changes, on the same machine, we get: > # Overhead Symbol > # ........ .................................. > # > 7.06% [k] ___bpf_prog_run > 4.08% [k] __update_load_avg_se > 4.02% [k] ktime_get_ts64 > 3.77% [k] __ll_sc_arch_atomic_add_return > 3.71% [k] file_ra_state_init > 3.62% [k] __ll_sc_arch_atomic64_sub > 3.53% [k] __ll_sc___cmpxchg_case_acq_32 > [...] > > _raw_spin_unlock_irq/irqrestore don't event appear anymore in the > perf trace. Very nice; I've little useful to say about the patches themselves, they appear ok, but this is not code I know well. But it is good to see perf becoming more useful on arm64. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel