From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [v2 0/2] Fixed GC MAX register programming for gamma luts Date: Fri, 29 Mar 2019 20:32:38 +0200 Message-ID: <20190329183238.GG3888@intel.com> References: <1553869756-4546-1-git-send-email-uma.shankar@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id D0B5588FE1 for ; Fri, 29 Mar 2019 18:32:41 +0000 (UTC) Content-Disposition: inline In-Reply-To: <1553869756-4546-1-git-send-email-uma.shankar@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Uma Shankar Cc: intel-gfx@lists.freedesktop.org, ville.syrjala@intel.com, maarten.lankhorst@intel.com List-Id: intel-gfx@lists.freedesktop.org T24gRnJpLCBNYXIgMjksIDIwMTkgYXQgMDc6NTk6MTRQTSArMDUzMCwgVW1hIFNoYW5rYXIgd3Jv dGU6Cj4gUmVnaXN0ZXIgb2Zmc2V0cyB1c2VkIHRvIHByb2dyYW0gR0MgbWF4IHdlcmUgbm90IGNv cnJlY3QuIFRoaXMgc2VyaWVzCj4gZml4ZXMgdGhlIHNhbWUsIGFsc28gbGltaXRzIHRoZSB2YWx1 ZXMgdG8gYWNjdXJhdGVseSBjbGFtcCBhdCAxLjAuCj4gQWxzbyBhZGRlZCBzdXBwb3J0IHRvIHBy b2dyYW0gRVhUMiBHQyBNYXggbmVlZGVkIGZvciB2YWx1ZXMgZnJvbSAzLjAKPiB0byA3LjAuIExp bWl0aW5nIGl0IGFnYWluIHRvIDEuMCBkdWUgdG8gQUJJIGxpbWl0YXRpb25zLgo+IAo+IHYyOiBB ZGRyZXNzZWQgVmlsbGUncyByZXZpZXcgY29tbWVudHMuCj4gCj4gVW1hIFNoYW5rYXIgKDIpOgo+ ICAgZHJtL2k5MTU6IEZpeCBHQ01BWCBjb2xvciByZWdpc3RlciBwcm9ncmFtbWluZwo+ICAgZHJt L2k5MTU6IFByb2dyYW0gRVhUMiBHQyBNQVggcmVnaXN0ZXJzCgpCb3RoIHB1c2hlZCB0byBkaW5x LiBUaGFua3MuCgotLSAKVmlsbGUgU3lyasOkbMOkCkludGVsCl9fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwt Z2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9t YWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeA==