From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07A98C4360F for ; Thu, 4 Apr 2019 10:10:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8064620855 for ; Thu, 4 Apr 2019 10:09:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="NGf747wJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727053AbfDDKJ7 (ORCPT ); Thu, 4 Apr 2019 06:09:59 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:49096 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726790AbfDDKJ6 (ORCPT ); Thu, 4 Apr 2019 06:09:58 -0400 Received: from pendragon.ideasonboard.com (dfj612yhrgyx302h3jwwy-3.rev.dnainternet.fi [IPv6:2001:14ba:21f5:5b00:ce28:277f:58d7:3ca4]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 7D6F754B; Thu, 4 Apr 2019 12:09:53 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1554372593; bh=BK8FIPIlulsiM8lQf2bW8xr1qlOyLcK5fFIceNpGtL4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=NGf747wJ9XrMgdIWDPFD8H3eb1TuxhYxzT9ZTzh2v4G9UcR4u+EYDqWNTMgDzFLsc BgbWAA1CMuHZRfhLucX/Pn/0TRKNpwgsIv1KdD7tv9GHb6nqT2+23O5DoPOw7+CuAc aXak9Z3HNDHN0Tvj6ELFB5Ri9b5q6aGQHYpJdmGI= Date: Thu, 4 Apr 2019 13:09:42 +0300 From: Laurent Pinchart To: VenkataRajesh.Kalakodima@in.bosch.com Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, Tsutomu Muroya , Steve Longerbeam , Koji Matsuoka Subject: Re: [PATCH 1/8] drm: Add DU CMM support functions Message-ID: <20190404100942.GD5800@pendragon.ideasonboard.com> References: <1554297284-14009-1-git-send-email-VenkataRajesh.Kalakodima@in.bosch.com> <1554297284-14009-2-git-send-email-VenkataRajesh.Kalakodima@in.bosch.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1554297284-14009-2-git-send-email-VenkataRajesh.Kalakodima@in.bosch.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Hi Kalakodima, Thank you for the patch. On Wed, Apr 03, 2019 at 06:44:37PM +0530, VenkataRajesh.Kalakodima@in.bosch.com wrote: > From: kalakodima venkata rajesh > > This is the out-of-tree patch for DU CMM driver support from > Yocto release v3.4.0. > > Link: https://github.com/renesas-rcar/du_cmm/commit/2d8ea2b667ad4616aa639c54ecc11f7c4b58959d.patch > > Following is from the patch description: > > du_cmm: Release for Yocto v3.4.0 > > This patch made the following correspondence. > > - Corresponds to kernel v 4.14. > - Double buffer only is supported. > - Fix CLU / LUT update timing. > - Add CMM Channel occupation mode. > - Fix Close process. > > Signed-off-by: Koji Matsuoka > Signed-off-by: Tsutomu Muroya > Signed-off-by: Steve Longerbeam > > - Removal of rcar specific ioctals > - Resolved checkpatch errors > - Resolved merge conflicts according to latest version > - Included CMM drivers and included files from base patch > - Removed rcar_du_drm.h include file What we're interested in from a mainline point of view is a commit message that explains what the patch does and why, not a changelog compared to an out-of-tree BSP. Please reword the commit messages in this series accordingly. You can briefly mention where the code came from in the first place, but that's secondary. > Signed-off-by: kalakodima venkata rajesh > --- > drivers/gpu/drm/rcar-du/Makefile | 2 + > drivers/gpu/drm/rcar-du/rcar_du_cmm.c | 1200 +++++++++++++++++++++++++++++++ > drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 24 + > drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 16 + > drivers/gpu/drm/rcar-du/rcar_du_drv.c | 43 +- > drivers/gpu/drm/rcar-du/rcar_du_drv.h | 16 +- > drivers/gpu/drm/rcar-du/rcar_du_group.c | 5 + > drivers/gpu/drm/rcar-du/rcar_du_regs.h | 92 +++ > include/drm/drm_ioctl.h | 7 + > 9 files changed, 1398 insertions(+), 7 deletions(-) > create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_cmm.c > > diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile > index 2a3b8d7..595e719 100644 > --- a/drivers/gpu/drm/rcar-du/Makefile > +++ b/drivers/gpu/drm/rcar-du/Makefile > @@ -6,12 +6,14 @@ rcar-du-drm-y := rcar_du_crtc.o \ > rcar_du_kms.o \ > rcar_du_plane.o > > +rcar-du-drm-y += rcar_du_cmm.o > rcar-du-drm-$(CONFIG_DRM_RCAR_LVDS) += rcar_du_of.o \ > rcar_du_of_lvds_r8a7790.dtb.o \ > rcar_du_of_lvds_r8a7791.dtb.o \ > rcar_du_of_lvds_r8a7793.dtb.o \ > rcar_du_of_lvds_r8a7795.dtb.o \ > rcar_du_of_lvds_r8a7796.dtb.o > + > rcar-du-drm-$(CONFIG_DRM_RCAR_VSP) += rcar_du_vsp.o > > obj-$(CONFIG_DRM_RCAR_DU) += rcar-du-drm.o > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_cmm.c b/drivers/gpu/drm/rcar-du/rcar_du_cmm.c > new file mode 100644 > index 0000000..ac613a6e > --- /dev/null > +++ b/drivers/gpu/drm/rcar-du/rcar_du_cmm.c > @@ -0,0 +1,1200 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/*************************************************************************/ /* > + * DU CMM > + * > + * Copyright (C) 2018 Renesas Electronics Corporation > + * > + * License Dual MIT/GPLv2 The DU driver is licensed under the terms of the GPL. Adding files with a dual license will make license compliance more complex. Please use an SPDX license header, remove all the boilerplate text below, and use the GPL only. > + * > + * The contents of this file are subject to the MIT license as set out below. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a copy > + * of this software and associated documentation files (the "Software"), to deal > + * in the Software without restriction, including without limitation the rights > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell > + * copies of the Software, and to permit persons to whom the Software is > + * furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * Alternatively, the contents of this file may be used under the terms of > + * the GNU General Public License Version 2 ("GPL") in which case the provisions > + * of GPL are applicable instead of those above. > + * > + * If you wish to allow use of your version of this file only under the terms of > + * GPL, and not to allow others to use your version of this file under the terms > + * of the MIT license, indicate your decision by deleting the provisions above > + * and replace them with the notice and other provisions required by GPL as set > + * out in the file called "GPL-COPYING" included in this distribution. If you do > + * not delete the provisions above, a recipient may use your version of this > + * file under the terms of either the MIT license or GPL. > + * > + * This License is also included in this distribution in the file called > + * "MIT-COPYING". > + * > + * EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS > + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING > + * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A > + * PARTICULAR PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS > + * OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR > + * IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. > + * > + * > + * GPLv2: > + * If you wish to use this file under the terms of GPL, following terms are > + * effective. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; version 2 of the License. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ /*************************************************************************/ > +#include > +#include > + > +#include > +#include > + > +#include drmP.h is deprecated, please include the DRM headers you need directly. > +#include > +#include > +#include > +#include > + > +#include "rcar_du_crtc.h" > +#include "rcar_du_drv.h" > +#include "rcar_du_kms.h" > +#include "rcar_du_plane.h" > +#include "rcar_du_regs.h" > +#include Please sort headers alphabetically, with the linux/ headers first, then drm/, then the local headers. > + > +/* #define DEBUG_PROCE_TIME 1 */ Please remove all commented-out code. > + > +#define CMM_LUT_NUM 256 > +#define CMM_CLU_NUM (17 * 17 * 17) > +#define CMM_HGO_NUM 64 > +/* rcar_du_drm.h Include */ > +#define LUT_DOUBLE_BUFFER_AUTO 0 > +#define LUT_DOUBLE_BUFFER_A 1 > +#define LUT_DOUBLE_BUFFER_B 2 > +/* DRM_RCAR_DU_CMM_WAIT_EVENT: DU-CMM done event */ > +#define CMM_EVENT_CLU_DONE BIT(0) > +#define CMM_EVENT_HGO_DONE BIT(1) > +#define CMM_EVENT_LUT_DONE BIT(2) > + > +#define CLU_DOUBLE_BUFFER_AUTO 0 > +#define CLU_DOUBLE_BUFFER_A 1 > +#define CLU_DOUBLE_BUFFER_B 2 > +enum { > + QUE_STAT_PENDING, > + QUE_STAT_ACTIVE, > + QUE_STAT_DONE, > +}; > + > +static const struct soc_device_attribute rcar_du_cmm_r8a7795_es1[] = { > + { .soc_id = "r8a7795", .revision = "ES1.*" }, > + { /* sentinel */ } > +}; > + > +struct rcar_du_cmm; > +struct rcar_du_cmm_file_priv; > + > +struct rcar_du_cmm_pending_event { > + struct list_head link; > + struct list_head fpriv_link; > + unsigned int event; > + unsigned int stat; > + unsigned long callback_data; > + struct drm_gem_object *gem_obj; > + struct rcar_du_cmm *du_cmm; > + struct rcar_du_cmm_file_priv *fpriv; > +}; > + > +struct cmm_module_t { > + struct list_head list; > + union { > + struct { > + struct rcar_du_cmm_pending_event *p; > + int buf_mode; > + bool one_side; > + }; > + int reset; > + }; > +}; > + > +struct cmm_reg_save { > +#ifdef CONFIG_PM_SLEEP > + wait_queue_head_t wait; > + > + u32 *lut_table; > + u32 *clu_table; > +#endif /* CONFIG_PM_SLEEP */ > + > + u32 cm2_ctl0; /* CM2_CTL0 */ > + u32 hgo_offset; /* CMM_HGO_OFFSET */ > + u32 hgo_size; /* CMM_HGO_SIZE */ > + u32 hgo_mode; /* CMM_HGO_MODE */ > +}; > + > +struct rcar_du_cmm { > + struct rcar_du_crtc *rcrtc; > + > + /* CMM base address */ > + void __iomem *cmm_base; > + struct clk *clock; > + > + struct cmm_module_t lut; > + struct cmm_module_t clu; > + struct cmm_module_t hgo; > + > + struct mutex lock; /* lock for register setting */ > + struct workqueue_struct *workqueue; > + struct work_struct work; > + > + struct cmm_reg_save reg_save; Please don't blindly save and restore registers. The device should be reconfigured at resume time in an ordered maner, similar to what is done at runtime. Restoring registers blindly usually leads to disasters as the order of the register writes matter. > + bool active; > + bool dbuf; > + bool clu_dbuf; > + bool init; > + bool direct; > + bool vsync; > + bool authority; > + pid_t pid; I don't know what this is for, but a pid_t field here is most probably a sign that something is wrong. > + bool soc_support; > +}; > + > +struct rcar_du_cmm_file_priv { > + wait_queue_head_t event_wait; > + struct list_head list; > + struct list_head active_list; > + struct list_head *done_list; > +}; > + > +static DEFINE_MUTEX(cmm_event_lock); > +static DEFINE_SPINLOCK(cmm_direct_lock); No global variables please. > + > +static inline void event_prev_cancel_locked(struct cmm_module_t *module); And no forward declarations for functions when possible. > +static inline u32 cmm_index(struct rcar_du_cmm *_cmm) > +{ > + struct rcar_du_device *rcdu = _cmm->rcrtc->group->dev; > + > + if (rcar_du_has(rcdu, RCAR_DU_FEATURE_R8A77965_REGS)) { > + if ((_cmm)->rcrtc->index == 3) > + return 2; > + } > + return (_cmm)->rcrtc->index; CRTCs now have a hardware and a software index mechanism that should be used instead of this hack. I'll stop reviewing the implementation in details for now as I think there are major issues in the series that will require large refactoring, so I'll start with that, and review the code in details for the next version. > +} > + > +#define cmm_done_list(_cmm, _fpriv) \ > + (&((_fpriv)->done_list[cmm_index(_cmm)])) > + > +static inline u32 rcar_du_cmm_read(struct rcar_du_cmm *du_cmm, u32 reg) > +{ > + return ioread32(du_cmm->cmm_base + reg); > +} > + > +static inline void rcar_du_cmm_write(struct rcar_du_cmm *du_cmm, > + u32 reg, u32 data) > +{ > + iowrite32(data, du_cmm->cmm_base + reg); > +} > + > +/* create default CLU table data */ > +static inline u32 index_to_clu_data(int index) > +{ > + int r, g, b; > + > + r = index % 17; > + index /= 17; > + g = index % 17; > + index /= 17; > + b = index % 17; > + > + r = (r << 20); > + if (r > (255 << 16)) > + r = (255 << 16); > + g = (g << 12); > + if (g > (255 << 8)) > + g = (255 << 8); > + b = (b << 4); > + if (b > (255 << 0)) > + b = (255 << 0); > + > + return r | g | b; > +} > + > +#ifdef DEBUG_PROCE_TIME > +static long long diff_timevals(struct timeval *start, struct timeval *end) > +{ > + return (end->tv_sec * 1000000LL + end->tv_usec) - > + (start->tv_sec * 1000000LL + start->tv_usec); > +} > +#endif > + > +static void du_cmm_clk(struct rcar_du_cmm *du_cmm, bool on) > +{ > + if (on) > + clk_prepare_enable(du_cmm->clock); > + else > + clk_disable_unprepare(du_cmm->clock); > +} > + > +int rcar_du_cmm_start_stop(struct rcar_du_crtc *rcrtc, bool on) > +{ > + struct rcar_du_cmm *du_cmm = rcrtc->cmm_handle; > + int i; > + u32 table_data; > + const struct drm_display_mode *mode; > + int w, h, x, y; > + > + if (!du_cmm) > + return -EINVAL; > + > + mutex_lock(&du_cmm->lock); > + > + if (!on) { > + du_cmm->active = false; > + > + rcar_du_cmm_write(du_cmm, CMM_LUT_CTRL, 0x00000000); > + rcar_du_cmm_write(du_cmm, CMM_CLU_CTRL, 0x00000000); > + > + du_cmm_clk(du_cmm, false); > + > + goto end; > + } > + > + du_cmm_clk(du_cmm, true); > + > + if (du_cmm->init) > + goto init_done; > + > + du_cmm->init = true; > + > + mode = &du_cmm->rcrtc->crtc.mode; > + > + x = (du_cmm->reg_save.hgo_offset >> 16) & 0xFFFF; > + y = (du_cmm->reg_save.hgo_offset >> 0) & 0xFFFF; > + w = (du_cmm->reg_save.hgo_size >> 16) & 0xFFFF; > + h = (du_cmm->reg_save.hgo_size >> 0) & 0xFFFF; > + if ((mode->hdisplay < (w + x)) || w == 0) { > + x = 0; > + w = mode->hdisplay; > + } > + if ((mode->vdisplay < (h + y)) || h == 0) { > + y = 0; > + h = mode->vdisplay; > + } > + du_cmm->reg_save.hgo_offset = (x << 16) | y; > + du_cmm->reg_save.hgo_size = (w << 16) | h; > + > + if (mode->flags & DRM_MODE_FLAG_PVSYNC) > + du_cmm->reg_save.cm2_ctl0 |= CMM_CTL0_VPOL; > + else > + du_cmm->reg_save.cm2_ctl0 &= ~CMM_CTL0_VPOL; > + > + rcar_du_cmm_write(du_cmm, CM2_CTL0, du_cmm->reg_save.cm2_ctl0); > + rcar_du_cmm_write(du_cmm, CMM_HGO_OFFSET, du_cmm->reg_save.hgo_offset); > + rcar_du_cmm_write(du_cmm, CMM_HGO_SIZE, du_cmm->reg_save.hgo_size); > + rcar_du_cmm_write(du_cmm, CMM_HGO_MODE, du_cmm->reg_save.hgo_mode); > + rcar_du_cmm_write(du_cmm, CMM_HGO_LB_TH, 0); > + rcar_du_cmm_write(du_cmm, CMM_HGO_LB0_H, 0); > + rcar_du_cmm_write(du_cmm, CMM_HGO_LB0_V, 0); > + rcar_du_cmm_write(du_cmm, CMM_HGO_LB1_H, 0); > + rcar_du_cmm_write(du_cmm, CMM_HGO_LB1_V, 0); > + rcar_du_cmm_write(du_cmm, CMM_HGO_LB2_H, 0); > + rcar_du_cmm_write(du_cmm, CMM_HGO_LB2_V, 0); > + rcar_du_cmm_write(du_cmm, CMM_HGO_LB3_H, 0); > + rcar_du_cmm_write(du_cmm, CMM_HGO_LB3_V, 0); > + > + /* init color table */ > + for (i = 0; i < CMM_LUT_NUM; i++) { > + #ifdef CONFIG_PM_SLEEP > + table_data = du_cmm->reg_save.lut_table[i]; > + #else > + table_data = ((i << 16) | (i << 8) | (i << 0)); > + #endif /* CONFIG_PM_SLEEP */ > + rcar_du_cmm_write(du_cmm, CMM_LUT_TBLA(i), table_data); > + > + if (du_cmm->dbuf) > + rcar_du_cmm_write(du_cmm, CMM_LUT_TBLB(i), > + table_data); > + } > + > + rcar_du_cmm_write(du_cmm, CMM_CLU_CTRL, > + CMM_CLU_CTRL_AAI | CMM_CLU_CTRL_MVS); > + > + rcar_du_cmm_write(du_cmm, CMM_CLU_ADDR, 0); > + if (du_cmm->clu_dbuf) > + rcar_du_cmm_write(du_cmm, CMM_CLU_ADDR2, 0); > + > + for (i = 0; i < CMM_CLU_NUM; i++) { > + #ifdef CONFIG_PM_SLEEP > + table_data = du_cmm->reg_save.clu_table[i]; > + #else > + table_data = index_to_clu_data(i); > + #endif /* CONFIG_PM_SLEEP */ > + rcar_du_cmm_write(du_cmm, CMM_CLU_DATA, table_data); > + > + if (du_cmm->dbuf) > + rcar_du_cmm_write(du_cmm, CMM_CLU_DATA2, > + table_data); > + } > + > +init_done: > + /* enable color table */ > + rcar_du_cmm_write(du_cmm, CMM_LUT_CTRL, CMM_LUT_CTRL_EN); > + rcar_du_cmm_write(du_cmm, CMM_CLU_CTRL, CMM_CLU_CTRL_AAI | > + CMM_CLU_CTRL_MVS | CMM_CLU_CTRL_EN); > + > + du_cmm->active = true; > +end: > + mutex_unlock(&du_cmm->lock); > + > + return 0; > +} > + > +#define gem_to_vaddr(gem_obj) \ > + (container_of((gem_obj), struct drm_gem_cma_object, base)->vaddr) > + > +static inline void cmm_vblank_put(struct rcar_du_cmm_pending_event *p) > +{ > + if (p->du_cmm) > + drm_crtc_vblank_put(&p->du_cmm->rcrtc->crtc); > +} > + > +static inline void > +cmm_gem_object_unreference(struct rcar_du_cmm_pending_event *p) > +{ > + if (p->gem_obj) > + drm_gem_object_unreference_unlocked(p->gem_obj); > +} > + > +static inline void _event_done_locked(struct rcar_du_cmm_pending_event *p) > +{ > + cmm_gem_object_unreference(p); > + > + if (p->fpriv) { > + p->stat = QUE_STAT_DONE; > + list_del(&p->link); /* delete from p->fpriv->active_list */ > + list_add_tail(&p->link, cmm_done_list(p->du_cmm, p->fpriv)); > + wake_up_interruptible(&p->fpriv->event_wait); > + } else { > + /* link deleted by rcar_du_cmm_postclose */ > + kfree(p); > + } > +} > + > +/* cancel from active_list (case of LUT/CLU double buffer mode) */ > +static inline void event_prev_cancel_locked(struct cmm_module_t *module) > +{ > + struct rcar_du_cmm_pending_event *p = module->p; > + > + if (!p) > + return; > + > + module->p = NULL; > + > + _event_done_locked(p); > +} > + > +static inline void event_done(struct rcar_du_cmm_pending_event *p) > +{ > + /* vblank is put */ > + > + mutex_lock(&cmm_event_lock); > + > + _event_done_locked(p); > + > + mutex_unlock(&cmm_event_lock); > +} > + > +static inline void lc_event_done(struct cmm_module_t *module, > + struct rcar_du_cmm_pending_event *p, > + bool done) > +{ > + /* vblank is put */ > + > + mutex_lock(&cmm_event_lock); > + > + if (!done && list_empty(&module->list)) > + module->p = p; > + else > + _event_done_locked(p); > + > + mutex_unlock(&cmm_event_lock); > +} > + > +static inline struct rcar_du_cmm_pending_event * > +event_pop_locked(struct cmm_module_t *module) > +{ > + struct rcar_du_cmm_pending_event *p = > + list_first_entry(&module->list, > + struct rcar_du_cmm_pending_event, > + link); > + > + p->stat = QUE_STAT_ACTIVE; > + list_del(&p->link); /* delete from du_cmm->[lut|clu|hgo].list */ > + list_add_tail(&p->link, &p->fpriv->active_list); > + cmm_vblank_put(p); > + > + return p; > +} > + > +struct rcar_du_cmm_work_stat { > + union { > + struct { > + struct rcar_du_cmm_pending_event *p; > + bool done; > + bool table_copy; > + }; > + struct { > + struct rcar_du_cmm_pending_event *p2; > + bool reset; > + }; > + }; > +}; > + > +static inline void one_side(struct rcar_du_cmm *du_cmm, > + struct cmm_module_t *module, > + bool on) > +{ > + if (on && !module->one_side) { > + module->one_side = true; > + drm_crtc_vblank_get(&du_cmm->rcrtc->crtc); > + } else if (!on && module->one_side) { > + module->one_side = false; > + drm_crtc_vblank_put(&du_cmm->rcrtc->crtc); > + } > +} > + > +/* pop LUT que */ > +static int lut_pop_locked(struct rcar_du_cmm *du_cmm, > + struct rcar_du_cmm_work_stat *stat) > +{ > + bool is_one_side = false; > + > + stat->done = true; > + stat->table_copy = false; > + > + if (!list_empty(&du_cmm->lut.list)) { > + stat->p = event_pop_locked(&du_cmm->lut); > + > + /* prev lut table */ > + event_prev_cancel_locked(&du_cmm->lut); > + > + if (du_cmm->lut.buf_mode == LUT_DOUBLE_BUFFER_AUTO) { > + is_one_side = true; > + if (list_empty(&du_cmm->lut.list)) > + stat->done = false; > + } > + > + } else if (du_cmm->lut.p) { > + /* prev lut table */ > + stat->p = du_cmm->lut.p; > + du_cmm->lut.p = NULL; > + } else { > + stat->done = false; > + stat->p = NULL; > + stat->table_copy = du_cmm->lut.one_side; > + } > + > + one_side(du_cmm, &du_cmm->lut, is_one_side); > + > + return 0; > +} > + > +static int lut_table_copy(struct rcar_du_cmm *du_cmm) > +{ > + int i; > + u32 src, dst; > + > + if (rcar_du_cmm_read(du_cmm, CM2_CTL1) & CMM_CTL1_BFS) { > + dst = CMM_LUT_TBLA(0); > + src = CMM_LUT_TBLB(0); > + } else { > + dst = CMM_LUT_TBLB(0); > + src = CMM_LUT_TBLA(0); > + } > + > + for (i = 0; i < CMM_LUT_NUM; i++) { > + rcar_du_cmm_write(du_cmm, dst, rcar_du_cmm_read(du_cmm, src)); > + dst += 4; > + src += 4; > + } > + > + return 0; > +} > + > +/* set 1D look up table */ > +static int lut_set(struct rcar_du_cmm *du_cmm, > + struct rcar_du_cmm_work_stat *stat) > +{ > + int i; > + u32 lut_base; > + u32 *lut_buf; > + > + if (!stat->p) { > + if (stat->table_copy) > + lut_table_copy(du_cmm); > + return 0; /* skip */ > + } > + > + /* set LUT */ > + switch (du_cmm->lut.buf_mode) { > + case LUT_DOUBLE_BUFFER_A: > + lut_base = CMM_LUT_TBLA(0); > + break; > + > + case LUT_DOUBLE_BUFFER_AUTO: > + if (rcar_du_cmm_read(du_cmm, CM2_CTL1) & CMM_CTL1_BFS) { > + lut_base = CMM_LUT_TBLA(0); > + break; > + } > + lut_base = CMM_LUT_TBLB(0); > + break; > + case LUT_DOUBLE_BUFFER_B: > + lut_base = CMM_LUT_TBLB(0); > + break; > + > + default: > + return -EINVAL; > + } > + > + lut_buf = gem_to_vaddr(stat->p->gem_obj); > + for (i = 0; i < CMM_LUT_NUM; i++) > + rcar_du_cmm_write(du_cmm, lut_base + i * 4, lut_buf[i]); > + > + lc_event_done(&du_cmm->lut, stat->p, stat->done); > + > + return 0; > +} > + > +/* pop CLU que */ > +static int clu_pop_locked(struct rcar_du_cmm *du_cmm, > + struct rcar_du_cmm_work_stat *stat) > +{ > + bool is_one_side = false; > + > + stat->done = true; > + stat->table_copy = false; > + > + if (!list_empty(&du_cmm->clu.list)) { > + stat->p = event_pop_locked(&du_cmm->clu); > + > + /* prev clu table */ > + event_prev_cancel_locked(&du_cmm->clu); > + > + if (du_cmm->clu.buf_mode == CLU_DOUBLE_BUFFER_AUTO) { > + is_one_side = true; > + if (list_empty(&du_cmm->clu.list)) > + stat->done = false; > + } > + > + } else if (du_cmm->clu.p) { > + /* prev clu table */ > + stat->p = du_cmm->clu.p; > + du_cmm->clu.p = NULL; > + } else { > + stat->done = false; > + stat->p = NULL; > + stat->table_copy = du_cmm->clu.one_side; > + } > + > + one_side(du_cmm, &du_cmm->clu, is_one_side); > + > + return 0; > +} > + > +static int clu_table_copy(struct rcar_du_cmm *du_cmm) > +{ > + int i, j, k; > + u32 src_addr, src_data, dst_addr, dst_data; > + > + if (rcar_du_cmm_read(du_cmm, CM2_CTL1) & CMM_CTL1_BFS) { > + dst_addr = CMM_CLU_ADDR; > + dst_data = CMM_CLU_DATA; > + src_addr = CMM_CLU_ADDR2; > + src_data = CMM_CLU_DATA2; > + } else { > + dst_addr = CMM_CLU_ADDR2; > + dst_data = CMM_CLU_DATA2; > + src_addr = CMM_CLU_ADDR; > + src_data = CMM_CLU_DATA; > + } > + > + rcar_du_cmm_write(du_cmm, dst_addr, 0); > + for (i = 0; i < 17; i++) { > + for (j = 0; j < 17; j++) { > + for (k = 0; k < 17; k++) { > + rcar_du_cmm_write(du_cmm, src_addr, > + (k << 16) | (j << 8) | > + (i << 0)); > + rcar_du_cmm_write(du_cmm, dst_data, > + rcar_du_cmm_read(du_cmm, > + src_data)); > + } > + } > + } > + > + return 0; > +} > + > +/* set 3D look up table */ > +static int clu_set(struct rcar_du_cmm *du_cmm, > + struct rcar_du_cmm_work_stat *stat) > +{ > + int i; > + u32 addr_reg, data_reg; > + u32 *clu_buf; > + > + if (!stat->p) { > + if (stat->table_copy) > + clu_table_copy(du_cmm); > + return 0; /* skip */ > + } > + > + /* set CLU */ > + switch (du_cmm->clu.buf_mode) { > + case CLU_DOUBLE_BUFFER_A: > + addr_reg = CMM_CLU_ADDR; > + data_reg = CMM_CLU_DATA; > + break; > + > + case CLU_DOUBLE_BUFFER_AUTO: > + if (rcar_du_cmm_read(du_cmm, CM2_CTL1) & CMM_CTL1_BFS) { > + addr_reg = CMM_CLU_ADDR; > + data_reg = CMM_CLU_DATA; > + break; > + } > + addr_reg = CMM_CLU_ADDR2; > + data_reg = CMM_CLU_DATA2; > + break; > + case CLU_DOUBLE_BUFFER_B: > + addr_reg = CMM_CLU_ADDR2; > + data_reg = CMM_CLU_DATA2; > + break; > + > + default: > + return -EINVAL; > + } > + > + clu_buf = gem_to_vaddr(stat->p->gem_obj); > + rcar_du_cmm_write(du_cmm, addr_reg, 0); > + for (i = 0; i < CMM_CLU_NUM; i++) > + rcar_du_cmm_write(du_cmm, data_reg, clu_buf[i]); > + > + lc_event_done(&du_cmm->clu, stat->p, stat->done); > + > + return 0; > +} > + > +/* pop HGO que */ > +static int hgo_pop_locked(struct rcar_du_cmm *du_cmm, > + struct rcar_du_cmm_work_stat *stat) > +{ > + struct rcar_du_cmm_pending_event *_p = NULL; > + > + if (!list_empty(&du_cmm->hgo.list)) > + _p = event_pop_locked(&du_cmm->hgo); > + > + if (du_cmm->hgo.reset) { > + drm_crtc_vblank_put(&du_cmm->rcrtc->crtc); > + du_cmm->hgo.reset = 0; > + stat->reset = true; > + } else { > + stat->reset = false; > + } > + > + stat->p2 = _p; > + > + return 0; > +} > + > +/* get histogram */ > +static int hgo_get(struct rcar_du_cmm *du_cmm, > + struct rcar_du_cmm_work_stat *stat) > +{ > + int i, j; > + const u32 histo_offset[3] = { > + CMM_HGO_R_HISTO(0), > + CMM_HGO_G_HISTO(0), > + CMM_HGO_B_HISTO(0), > + }; > + void *vaddr; > + > + if (!stat->p2) { > + if (stat->reset) > + goto hgo_reset; > + > + return 0; /* skip */ > + } > + > + vaddr = gem_to_vaddr(stat->p2->gem_obj); > + for (i = 0; i < 3; i++) { > + u32 *hgo_buf = vaddr + CMM_HGO_NUM * 4 * i; > + > + for (j = 0; j < CMM_HGO_NUM; j++) > + hgo_buf[j] = rcar_du_cmm_read(du_cmm, > + histo_offset[i] + j * 4); > + } > + > + event_done(stat->p2); > + > +hgo_reset: > + rcar_du_cmm_write(du_cmm, CMM_HGO_REGRST, CMM_HGO_REGRST_RCLEA); > + > + return 0; > +} > + > +static bool du_cmm_vsync_get(struct rcar_du_cmm *du_cmm) > +{ > + unsigned long flags; > + bool vsync; > + > + spin_lock_irqsave(&cmm_direct_lock, flags); > + vsync = du_cmm->vsync; > + du_cmm->vsync = false; > + spin_unlock_irqrestore(&cmm_direct_lock, flags); > + > + return vsync; > +} > + > +static void du_cmm_vsync_set(struct rcar_du_cmm *du_cmm, bool vsync) > +{ > + unsigned long flags; > + > + spin_lock_irqsave(&cmm_direct_lock, flags); > + du_cmm->vsync = vsync; > + spin_unlock_irqrestore(&cmm_direct_lock, flags); > +} > + > +static void du_cmm_work(struct work_struct *work) > +{ > + struct rcar_du_cmm *du_cmm = > + container_of(work, struct rcar_du_cmm, work); > + struct rcar_du_cmm_work_stat s_lut; > + struct rcar_du_cmm_work_stat s_clu; > + struct rcar_du_cmm_work_stat s_hgo; > +#ifdef DEBUG_PROCE_TIME > + struct timeval start_time, end_time; > + unsigned long lut_time, clu_time, hgo_time; > +#endif > + bool vsync_status = false; > + > + memset(&s_lut, 0, sizeof(struct rcar_du_cmm_work_stat)); > + memset(&s_clu, 0, sizeof(struct rcar_du_cmm_work_stat)); > + memset(&s_hgo, 0, sizeof(struct rcar_du_cmm_work_stat)); > + > + vsync_status = du_cmm_vsync_get(du_cmm); > + > + mutex_lock(&cmm_event_lock); > + > + lut_pop_locked(du_cmm, &s_lut); > + clu_pop_locked(du_cmm, &s_clu); > + if (vsync_status) > + hgo_pop_locked(du_cmm, &s_hgo); > + > + mutex_unlock(&cmm_event_lock); > + > + /* set LUT */ > +#ifdef DEBUG_PROCE_TIME > + do_gettimeofday(&start_time); > +#endif > + lut_set(du_cmm, &s_lut); > +#ifdef DEBUG_PROCE_TIME > + do_gettimeofday(&end_time); > + lut_time = (long)diff_timevals(&start_time, &end_time); > +#endif > + > + /* set CLU */ > +#ifdef DEBUG_PROCE_TIME > + do_gettimeofday(&start_time); > +#endif > + clu_set(du_cmm, &s_clu); > +#ifdef DEBUG_PROCE_TIME > + do_gettimeofday(&end_time); > + clu_time = (long)diff_timevals(&start_time, &end_time); > +#endif > + > + /* get HGO */ > +#ifdef DEBUG_PROCE_TIME > + do_gettimeofday(&start_time); > +#endif > + if (vsync_status) > + hgo_get(du_cmm, &s_hgo); > +#ifdef DEBUG_PROCE_TIME > + do_gettimeofday(&end_time); > + hgo_time = (long)diff_timevals(&start_time, &end_time); > +#endif > + > +#ifdef CONFIG_PM_SLEEP > + wake_up_interruptible(&du_cmm->reg_save.wait); > +#endif /* CONFIG_PM_SLEEP */ > + > +#ifdef DEBUG_PROCE_TIME > + { > + struct rcar_du_device *rcdu = du_cmm->rcrtc->group->dev; > + > + if (s_lut.p) > + dev_info(rcdu->dev, "LUT %ld usec.\n", lut_time); > + if (s_clu.p) > + dev_info(rcdu->dev, "LUT %ld usec.\n", clu_time); > + if (s_hgo.p2) > + dev_info(rcdu->dev, "HGO %ld usec.\n", hgo_time); > + } > +#endif > +} > + > +static int du_cmm_que_empty(struct rcar_du_cmm *du_cmm) > +{ > + if (list_empty(&du_cmm->lut.list) && !du_cmm->lut.p && > + !du_cmm->lut.one_side && > + list_empty(&du_cmm->clu.list) && !du_cmm->clu.p && > + !du_cmm->clu.one_side && > + list_empty(&du_cmm->hgo.list) && !du_cmm->hgo.reset) > + return 1; > + > + return 0; > +} > + > +void rcar_du_cmm_kick(struct rcar_du_crtc *rcrtc) > +{ > + struct rcar_du_cmm *du_cmm = rcrtc->cmm_handle; > + > + if (!du_cmm) > + return; > + > + if (!du_cmm->active) > + return; > + > + if (!du_cmm_que_empty(du_cmm)) { > + du_cmm_vsync_set(du_cmm, true); > + queue_work(du_cmm->workqueue, &du_cmm->work); > + } > +} > + > +#ifdef CONFIG_PM_SLEEP > +int rcar_du_cmm_pm_suspend(struct rcar_du_crtc *rcrtc) > +{ > + struct rcar_du_cmm *du_cmm = rcrtc->cmm_handle; > + struct rcar_du_device *rcdu = rcrtc->group->dev; > + int i, j, k, index; > + int ret; > + > + if (!du_cmm) > + return 0; > + > + ret = wait_event_timeout(du_cmm->reg_save.wait, > + du_cmm_que_empty(du_cmm), > + msecs_to_jiffies(500)); > + if (ret == 0) > + dev_err(rcdu->dev, "rcar-du cmm suspend : timeout\n"); > + > + if (!du_cmm->init) > + return 0; > + > + du_cmm->init = false; > + > + if (!du_cmm->active) > + du_cmm_clk(du_cmm, true); > + > + /* table save */ > + for (i = 0; i < CMM_LUT_NUM; i++) { > + du_cmm->reg_save.lut_table[i] = > + rcar_du_cmm_read(du_cmm, CMM_LUT_TBLA(i)); > + } > + > + index = 0; > + for (i = 0; i < 17; i++) { > + for (j = 0; j < 17; j++) { > + for (k = 0; k < 17; k++) { > + rcar_du_cmm_write(du_cmm, CMM_CLU_ADDR, > + (k << 16) | (j << 8) | > + (i << 0)); > + du_cmm->reg_save.clu_table[index++] = > + rcar_du_cmm_read(du_cmm, CMM_CLU_DATA); > + } > + } > + } > + > + if (!du_cmm->active) > + du_cmm_clk(du_cmm, false); > + > + return 0; > +} > + > +int rcar_du_cmm_pm_resume(struct rcar_du_crtc *rcrtc) > +{ > + /* none */ > + return 0; > +} > +#endif /* CONFIG_PM_SLEEP */ > + > +int rcar_du_cmm_driver_open(struct drm_device *dev, struct drm_file *file_priv) > +{ > + struct rcar_du_device *rcdu = dev->dev_private; > + struct rcar_du_cmm_file_priv *fpriv; > + int i; > + > + if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) > + return 0; > + > + file_priv->driver_priv = NULL; > + > + fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL); > + if (unlikely(!fpriv)) > + return -ENOMEM; > + > + fpriv->done_list = kcalloc(rcdu->info->num_crtcs, > + sizeof(*fpriv->done_list), > + GFP_KERNEL); > + if (unlikely(!fpriv->done_list)) { > + kfree(fpriv); > + return -ENOMEM; > + } > + > + init_waitqueue_head(&fpriv->event_wait); > + INIT_LIST_HEAD(&fpriv->list); > + INIT_LIST_HEAD(&fpriv->active_list); > + for (i = 0; i < rcdu->info->num_crtcs; i++) > + INIT_LIST_HEAD(&fpriv->done_list[i]); > + > + file_priv->driver_priv = fpriv; > + > + return 0; > +} > + > +void rcar_du_cmm_postclose(struct drm_device *dev, struct drm_file *file_priv) > +{ > + struct rcar_du_device *rcdu = dev->dev_private; > + struct rcar_du_cmm_file_priv *fpriv = file_priv->driver_priv; > + struct rcar_du_cmm_pending_event *p, *pt; > + struct rcar_du_crtc *rcrtc; > + struct rcar_du_cmm *du_cmm; > + int i, crtcs_cnt, ret; > + u32 table_data; > + > + if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) > + return; > + > + mutex_lock(&cmm_event_lock); > + > + /* Unlink file priv events */ > + list_for_each_entry_safe(p, pt, &fpriv->list, fpriv_link) { > + list_del(&p->fpriv_link); > + list_del(&p->link); > + switch (p->stat) { > + case QUE_STAT_PENDING: > + cmm_vblank_put(p); > + cmm_gem_object_unreference(p); > + kfree(p); > + break; > + case QUE_STAT_DONE: > + kfree(p); > + break; > + case QUE_STAT_ACTIVE: > + p->fpriv = NULL; > + break; > + } > + } > + > + mutex_unlock(&cmm_event_lock); > + > + kfree(fpriv->done_list); > + kfree(fpriv); > + file_priv->driver_priv = NULL; > + > + for (crtcs_cnt = 0; crtcs_cnt < rcdu->num_crtcs; crtcs_cnt++) { > + rcrtc = &rcdu->crtcs[crtcs_cnt]; > + du_cmm = rcrtc->cmm_handle; > + if (du_cmm->authority && du_cmm->pid == task_pid_nr(current)) { > + du_cmm->authority = false; > + du_cmm->pid = 0; > + ret = wait_event_timeout(du_cmm->reg_save.wait, > + du_cmm_que_empty(du_cmm), > + msecs_to_jiffies(500)); > + if (ret == 0) > + dev_err(rcdu->dev, "rcar-du cmm close : timeout\n"); > + > + for (i = 0; i < CMM_LUT_NUM; i++) > + du_cmm->reg_save.lut_table[i] = (i << 16) | > + (i << 8) | > + (i << 0); > + > + for (i = 0; i < CMM_CLU_NUM; i++) { > + du_cmm->reg_save.clu_table[i] = > + index_to_clu_data(i); > + } > + > + for (i = 0; i < CMM_LUT_NUM; i++) { > +#ifdef CONFIG_PM_SLEEP > + table_data = du_cmm->reg_save.lut_table[i]; > +#else > + table_data = ((i << 16) | (i << 8) | (i << 0)); > +#endif /* CONFIG_PM_SLEEP */ > + rcar_du_cmm_write(du_cmm, CMM_LUT_TBLA(i), > + table_data); > + if (du_cmm->dbuf) { > + rcar_du_cmm_write(du_cmm, > + CMM_LUT_TBLB(i), > + table_data); > + } > + } > + > + for (i = 0; i < CMM_CLU_NUM; i++) { > +#ifdef CONFIG_PM_SLEEP > + table_data = du_cmm->reg_save.clu_table[i]; > +#else > + table_data = index_to_clu_data(i); > +#endif /* CONFIG_PM_SLEEP */ > + rcar_du_cmm_write(du_cmm, CMM_CLU_DATA, > + table_data); > + > + if (du_cmm->dbuf) { > + rcar_du_cmm_write(du_cmm, CMM_CLU_DATA2, > + table_data); > + } > + } > + } > + } > +} > + > +int rcar_du_cmm_init(struct rcar_du_crtc *rcrtc) > +{ > + struct rcar_du_cmm *du_cmm; > + int ret; > + int i; > + struct rcar_du_device *rcdu = rcrtc->group->dev; > + char name[64]; > + struct resource *mem; > + > + if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) > + return 0; > + > + du_cmm = devm_kzalloc(rcdu->dev, sizeof(*du_cmm), GFP_KERNEL); > + if (!du_cmm) { > + ret = -ENOMEM; > + goto error_alloc; > + } > + > + /* DU-CMM mapping */ > + sprintf(name, "cmm.%u", rcrtc->index); > + mem = platform_get_resource_byname(to_platform_device(rcdu->dev), > + IORESOURCE_MEM, name); > + if (!mem) { > + dev_err(rcdu->dev, "rcar-du cmm init : failed to get memory resource\n"); > + ret = -EINVAL; > + goto error_mapping_cmm; > + } > + du_cmm->cmm_base = devm_ioremap_nocache(rcdu->dev, mem->start, > + resource_size(mem)); > + if (!du_cmm->cmm_base) { > + dev_err(rcdu->dev, "rcar-du cmm init : failed to map iomem\n"); > + ret = -EINVAL; > + goto error_mapping_cmm; > + } > + du_cmm->clock = devm_clk_get(rcdu->dev, name); > + if (IS_ERR(du_cmm->clock)) { > + dev_err(rcdu->dev, "failed to get clock\n"); > + ret = PTR_ERR(du_cmm->clock); > + goto error_clock_cmm; > + } > + > + du_cmm->rcrtc = rcrtc; > + > + du_cmm->reg_save.cm2_ctl0 = 0; > + du_cmm->reg_save.hgo_offset = 0; > + du_cmm->reg_save.hgo_size = 0; > + du_cmm->reg_save.hgo_mode = 0; > + > + du_cmm->dbuf = rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM_LUT_DBUF); > + if (du_cmm->dbuf) { > + du_cmm->lut.buf_mode = LUT_DOUBLE_BUFFER_AUTO; > + du_cmm->reg_save.cm2_ctl0 |= CMM_CTL0_DBUF; > + } else { > + dev_err(rcdu->dev, "single buffer is not supported.\n"); > + du_cmm->dbuf = true; > + du_cmm->lut.buf_mode = LUT_DOUBLE_BUFFER_AUTO; > + du_cmm->reg_save.cm2_ctl0 |= CMM_CTL0_DBUF; > + } > + > + du_cmm->clu_dbuf = rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM_CLU_DBUF); > + if (du_cmm->clu_dbuf) { > + du_cmm->clu.buf_mode = CLU_DOUBLE_BUFFER_AUTO; > + du_cmm->reg_save.cm2_ctl0 |= CMM_CTL0_CLUDB; > + } else { > + dev_err(rcdu->dev, "single buffer is not supported.\n"); > + du_cmm->clu_dbuf = true; > + du_cmm->clu.buf_mode = CLU_DOUBLE_BUFFER_AUTO; > + du_cmm->reg_save.cm2_ctl0 |= CMM_CTL0_CLUDB; > + } > + > +#ifdef CONFIG_PM_SLEEP > + du_cmm->reg_save.lut_table = > + devm_kzalloc(rcdu->dev, CMM_LUT_NUM * 4, GFP_KERNEL); > + if (!du_cmm->reg_save.lut_table) { > + ret = -ENOMEM; > + goto error_lut_reg_save_buf; > + } > + for (i = 0; i < CMM_LUT_NUM; i++) > + du_cmm->reg_save.lut_table[i] = (i << 16) | (i << 8) | (i << 0); > + > + du_cmm->reg_save.clu_table = > + devm_kzalloc(rcdu->dev, CMM_CLU_NUM * 4, GFP_KERNEL); > + if (!du_cmm->reg_save.clu_table) { > + ret = -ENOMEM; > + goto error_clu_reg_save_buf; > + } > + for (i = 0; i < CMM_CLU_NUM; i++) > + du_cmm->reg_save.clu_table[i] = index_to_clu_data(i); > + > + init_waitqueue_head(&du_cmm->reg_save.wait); > +#endif /* CONFIG_PM_SLEEP */ > + if (soc_device_match(rcar_du_cmm_r8a7795_es1)) > + du_cmm->soc_support = false; > + else > + du_cmm->soc_support = true; > + > + du_cmm->active = false; > + du_cmm->init = false; > + du_cmm->direct = true; > + > + mutex_init(&du_cmm->lock); > + INIT_LIST_HEAD(&du_cmm->lut.list); > + du_cmm->lut.p = NULL; > + du_cmm->lut.one_side = false; > + INIT_LIST_HEAD(&du_cmm->clu.list); > + du_cmm->clu.p = NULL; > + du_cmm->clu.one_side = false; > + INIT_LIST_HEAD(&du_cmm->hgo.list); > + du_cmm->hgo.reset = 0; > + > + sprintf(name, "du-cmm%d", rcrtc->index); > + du_cmm->workqueue = create_singlethread_workqueue(name); > + INIT_WORK(&du_cmm->work, du_cmm_work); > + > + rcrtc->cmm_handle = du_cmm; > + > + dev_info(rcdu->dev, "DU%d use CMM(%s buffer)\n", > + rcrtc->index, du_cmm->dbuf ? "Double" : "Single"); > + > + return 0; > + > +#ifdef CONFIG_PM_SLEEP > +error_clu_reg_save_buf: > +error_lut_reg_save_buf: > +#endif /* CONFIG_PM_SLEEP */ > +error_clock_cmm: > + devm_iounmap(rcdu->dev, du_cmm->cmm_base); > +error_mapping_cmm: > + devm_kfree(rcdu->dev, du_cmm); > +error_alloc: > + return ret; > +} > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > index 15dc9ca..864fb94 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > @@ -296,6 +296,19 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) > rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start - 19); > rcar_du_crtc_write(rcrtc, HDER, mode->htotal - mode->hsync_start + > mode->hdisplay - 19); > + if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_CMM)) { > + rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - > + mode->hsync_start - 19 - 25); > + rcar_du_crtc_write(rcrtc, HDER, mode->htotal - > + mode->hsync_start + > + mode->hdisplay - 19 - 25); > + } else { > + rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - > + mode->hsync_start - 19); > + rcar_du_crtc_write(rcrtc, HDER, mode->htotal - > + mode->hsync_start + > + mode->hdisplay - 19); > + } > rcar_du_crtc_write(rcrtc, HSWR, mode->hsync_end - > mode->hsync_start - 1); > rcar_du_crtc_write(rcrtc, HCR, mode->htotal - 1); > @@ -530,6 +543,9 @@ static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc) > DSYSR_TVM_MASTER); > > rcar_du_group_start_stop(rcrtc->group, true); > + > + if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_CMM)) > + rcar_du_cmm_start_stop(rcrtc, true); > } > > static void rcar_du_crtc_disable_planes(struct rcar_du_crtc *rcrtc) > @@ -565,6 +581,9 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc) > { > struct drm_crtc *crtc = &rcrtc->crtc; > > + if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_CMM)) > + rcar_du_cmm_start_stop(rcrtc, false); > + > /* > * Disable all planes and wait for the change to take effect. This is > * required as the plane enable registers are updated on vblank, and no > @@ -899,6 +918,9 @@ static irqreturn_t rcar_du_crtc_irq(int irq, void *arg) > rcar_du_crtc_finish_page_flip(rcrtc); > } > > + if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_CMM)) > + rcar_du_cmm_kick(rcrtc); The fact that the SoC has a CMM doesn't mean it should be used unconditionally. When the CMM features are not needed by userspace the CMM should be disabled. > + > ret = IRQ_HANDLED; > } > > @@ -999,5 +1021,7 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex, > return ret; > } > > + rcar_du_cmm_init(rcrtc); > + > return 0; > } > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h > index 7680cb2..74e0a22 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h > +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h > @@ -67,6 +67,10 @@ struct rcar_du_crtc { > struct rcar_du_group *group; > struct rcar_du_vsp *vsp; > unsigned int vsp_pipe; > + int lvds_ch; I think you need to figure out all the places where you pulled in BSP code completely unrelated to the series :-) > + > + void *cmm_handle; > + > }; > > #define to_rcar_crtc(c) container_of(c, struct rcar_du_crtc, crtc) > @@ -104,4 +108,16 @@ void rcar_du_crtc_route_output(struct drm_crtc *crtc, > enum rcar_du_output output); > void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc); > > +/* DU-CMM functions */ > +int rcar_du_cmm_init(struct rcar_du_crtc *rcrtc); > +int rcar_du_cmm_driver_open(struct drm_device *dev, struct drm_file *file_priv); > +void rcar_du_cmm_postclose(struct drm_device *dev, struct drm_file *file_priv); > +int rcar_du_cmm_start_stop(struct rcar_du_crtc *rcrtc, bool on); > +void rcar_du_cmm_kick(struct rcar_du_crtc *rcrtc); > + > +#ifdef CONFIG_PM_SLEEP > +int rcar_du_cmm_pm_suspend(struct rcar_du_crtc *rcrtc); > +int rcar_du_cmm_pm_resume(struct rcar_du_crtc *rcrtc); > +#endif /* CONFIG_PM_SLEEP */ > + > #endif /* __RCAR_DU_CRTC_H__ */ > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c > index 02aee6c..838b7c9 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c > @@ -26,8 +26,8 @@ > #include > #include > #include > - > #include "rcar_du_drv.h" > +#include "rcar_du_encoder.h" > #include "rcar_du_kms.h" > #include "rcar_du_of.h" > #include "rcar_du_regs.h" > @@ -128,7 +128,9 @@ static const struct rcar_du_device_info rcar_du_r8a7790_info = { > static const struct rcar_du_device_info rcar_du_r8a7791_info = { > .gen = 2, > .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK > - | RCAR_DU_FEATURE_EXT_CTRL_REGS, > + | RCAR_DU_FEATURE_EXT_CTRL_REGS > + | RCAR_DU_FEATURE_CMM, > + .num_crtcs = 2, > .channels_mask = BIT(1) | BIT(0), > .routes = { > /* > @@ -190,7 +192,10 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = { > .gen = 3, > .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK > | RCAR_DU_FEATURE_EXT_CTRL_REGS > - | RCAR_DU_FEATURE_VSP1_SOURCE, > + | RCAR_DU_FEATURE_VSP1_SOURCE > + | RCAR_DU_FEATURE_CMM | RCAR_DU_FEATURE_CMM_LUT_DBUF > + | RCAR_DU_FEATURE_CMM_CLU_DBUF, > + .num_crtcs = 4, > .channels_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0), > .routes = { > /* > @@ -222,7 +227,10 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = { > .gen = 3, > .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK > | RCAR_DU_FEATURE_EXT_CTRL_REGS > - | RCAR_DU_FEATURE_VSP1_SOURCE, > + | RCAR_DU_FEATURE_VSP1_SOURCE > + | RCAR_DU_FEATURE_CMM | RCAR_DU_FEATURE_CMM_LUT_DBUF > + | RCAR_DU_FEATURE_CMM_CLU_DBUF, > + .num_crtcs = 3, > .channels_mask = BIT(2) | BIT(1) | BIT(0), > .routes = { > /* > @@ -250,7 +258,11 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = { > .gen = 3, > .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK > | RCAR_DU_FEATURE_EXT_CTRL_REGS > - | RCAR_DU_FEATURE_VSP1_SOURCE, > + | RCAR_DU_FEATURE_VSP1_SOURCE > + | RCAR_DU_FEATURE_R8A77965_REGS > + | RCAR_DU_FEATURE_CMM | RCAR_DU_FEATURE_CMM_LUT_DBUF > + | RCAR_DU_FEATURE_CMM_CLU_DBUF, > + .num_crtcs = 3, > .channels_mask = BIT(3) | BIT(1) | BIT(0), > .routes = { > /* > @@ -328,6 +340,8 @@ DEFINE_DRM_GEM_CMA_FOPS(rcar_du_fops); > static struct drm_driver rcar_du_driver = { > .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME > | DRIVER_ATOMIC, > + .open = rcar_du_cmm_driver_open, > + .postclose = rcar_du_cmm_postclose, > .lastclose = rcar_du_lastclose, > .gem_free_object_unlocked = drm_gem_cma_free_object, > .gem_vm_ops = &drm_gem_cma_vm_ops, > @@ -358,6 +372,12 @@ static int rcar_du_pm_suspend(struct device *dev) > { > struct rcar_du_device *rcdu = dev_get_drvdata(dev); > struct drm_atomic_state *state; > + int i; > + > + if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) { > + for (i = 0; i < rcdu->num_crtcs; ++i) > + rcar_du_cmm_pm_suspend(&rcdu->crtcs[i]); > + } > > drm_kms_helper_poll_disable(rcdu->ddev); > drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, true); > @@ -377,7 +397,20 @@ static int rcar_du_pm_suspend(struct device *dev) > static int rcar_du_pm_resume(struct device *dev) > { > struct rcar_du_device *rcdu = dev_get_drvdata(dev); > +#if IS_ENABLED(CONFIG_DRM_RCAR_DW_HDMI) > + struct drm_encoder *encoder; > + int i; > + > + if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) { > + for (i = 0; (i < rcdu->num_crtcs); ++i) > + rcar_du_cmm_pm_resume(&rcdu->crtcs[i]); > + } > > + list_for_each_entry(encoder, &rcdu->ddev->mode_config.encoder_list, > + head) { > + to_rcar_encoder(encoder); > + } > +#endif > drm_atomic_helper_resume(rcdu->ddev, rcdu->suspend_state); > drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, false); > drm_kms_helper_poll_enable(rcdu->ddev); > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h > index b3a25e8..f2afe36 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h > +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h > @@ -30,8 +30,19 @@ struct rcar_du_device; > #define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK (1 << 0) /* Per-CRTC IRQ and clock */ > #define RCAR_DU_FEATURE_EXT_CTRL_REGS (1 << 1) /* Has extended control registers */ > #define RCAR_DU_FEATURE_VSP1_SOURCE (1 << 2) /* Has inputs from VSP1 */ > - > -#define RCAR_DU_QUIRK_ALIGN_128B (1 << 0) /* Align pitches to 128 bytes */ > +/* Use R8A77965 registers */ > +#define RCAR_DU_FEATURE_R8A77965_REGS BIT(3) > + > +/* Has DEF7R register & CMM */ > +#define RCAR_DU_FEATURE_CMM BIT(10) > +/* Has CMM LUT Double buffer */ > +#define RCAR_DU_FEATURE_CMM_LUT_DBUF BIT(11) > +/* Has CMM CLU Double buffer */ > +#define RCAR_DU_FEATURE_CMM_CLU_DBUF BIT(12) > +/* Align pitches to 128 bytes */ > +#define RCAR_DU_QUIRK_ALIGN_128B BIT(0) > +/* LVDS lanes 1 and 3 inverted */ > +#define RCAR_DU_QUIRK_LVDS_LANES BIT(1) The last define is not used here, and clearly unrelated to this patch series. I think the series needs major cleanup. > > /* > * struct rcar_du_output_routing - Output routing specification > @@ -61,6 +72,7 @@ struct rcar_du_device_info { > unsigned int features; > unsigned int quirks; > unsigned int channels_mask; > + unsigned int num_crtcs; There's already a way in the driver to count CRTCs, no need to duplicate this in the rcar_du_device_info structure. > struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX]; > unsigned int num_lvds; > unsigned int dpll_ch; > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c > index d539cb2..83a2836 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c > @@ -130,6 +130,11 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp) > if (rcdu->info->gen >= 3) > rcar_du_group_write(rgrp, DEFR10, DEFR10_CODE | DEFR10_DEFE10); > > + if (rcar_du_has(rgrp->dev, RCAR_DU_FEATURE_CMM)) { > + rcar_du_group_write(rgrp, DEF7R, DEF7R_CODE | > + DEF7R_CMME1 | DEF7R_CMME0); > + } > + > /* > * Use DS1PR and DS2PR to configure planes priorities and connects the > * superposition 0 to DU0 pins. DU1 pins will be configured dynamically. > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h > index 9dfd220..b20e783 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h > +++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h > @@ -200,6 +200,11 @@ > #define DEFR6_MLOS1 (1 << 2) > #define DEFR6_DEFAULT (DEFR6_CODE | DEFR6_TCNE1) > > +#define DEF7R 0x000ec > +#define DEF7R_CODE (0x7779 << 16) > +#define DEF7R_CMME1 BIT(6) > +#define DEF7R_CMME0 BIT(4) > + > /* ----------------------------------------------------------------------------- > * R8A7790-only Control Registers > */ > @@ -552,4 +557,91 @@ > #define GCBCR 0x11098 > #define BCBCR 0x1109c > > +/* ----------------------------------------------------------------------------- > + * DU Color Management Module Registers > + */ > + > +#define CMM_LUT_CTRL 0x0000 > +#define CMM_LUT_CTRL_EN BIT(0) > + > +#define CMM_CLU_CTRL 0x0100 > +#define CMM_CLU_CTRL_EN BIT(0) > +#define CMM_CLU_CTRL_MVS BIT(24) > +#define CMM_CLU_CTRL_AAI BIT(28) > + > +#define CMM_CTL0 0x0180 > +#define CM2_CTL0 CMM_CTL0 Why do you need an alias here (and for CM2_CTL1 below) ? > +#define CMM_CTL0_CLUDB BIT(24) > +#define CMM_CTL0_HISTS BIT(20) > +#define CMM_CTL0_TM1_MASK (3 << 16) > +#define CMM_CTL0_TM1_BT601_YC240 (0 << 16) > +#define CMM_CTL0_TM1_BT601_YC255 BIT(16) > +#define CMM_CTL0_TM1_BT709_RG255 (2 << 16) > +#define CMM_CTL0_TM1_BT709_RG235 (3 << 16) > +#define CMM_CTL0_TM0_MASK (3 << 12) > +#define CMM_CTL0_TM0_BT601_YC240 (0 << 12) > +#define CMM_CTL0_TM0_BT601_YC255 BIT(12) > +#define CMM_CTL0_TM0_BT709_RG255 (2 << 12) > +#define CMM_CTL0_TM0_BT709_RG235 (3 << 12) > +#define CMM_CTL0_TM_BT601_YC240 (CMM_CTL0_TM1_BT601_YC240 |\ > + CMM_CTL0_TM0_BT601_YC240) > +#define CMM_CTL0_TM_BT601_YC255 (CMM_CTL0_TM1_BT601_YC255 |\ > + CMM_CTL0_TM0_BT601_YC255) > +#define CMM_CTL0_TM_BT709_RG255 (CMM_CTL0_TM1_BT709_RG255 |\ > + CMM_CTL0_TM0_BT709_RG255) > +#define CMM_CTL0_TM_BT709_RG235 (CMM_CTL0_TM1_BT709_RG235 |\ > + CMM_CTL0_TM0_BT709_RG235) > +#define CMM_CTL0_YC BIT(8) > +#define CMM_CTL0_VPOL BIT(4) > +#define CMM_CTL0_DBUF BIT(0) > + > +#define CMM_CTL1 0x0184 > +#define CM2_CTL1 CMM_CTL1 > +#define CMM_CTL1_BFS BIT(0) > + > +#define CMM_CTL2 0x0188 > +#define CMM_HGO_OFFSET 0x0200 > +#define CMM_HGO_SIZE 0x0204 > +#define CMM_HGO_MODE 0x0208 > +#define CMM_HGO_MODE_MASK (0xFF) No need for parentheses. Hex constants in the DU code base use lowercase. > +#define CMM_HGO_MODE_MAXRGB BIT(7) > +#define CMM_HGO_MODE_OFSB_R BIT(6) > +#define CMM_HGO_MODE_OFSB_G BIT(5) > +#define CMM_HGO_MODE_OFSB_B BIT(4) > +#define CMM_HGO_MODE_HRATIO_NO_SKIPP (0 << 2) > +#define CMM_HGO_MODE_HRATIO_HALF_SKIPP BIT(2) > +#define CMM_HGO_MODE_HRATIO_QUARTER_SKIPP (2 << 2) > +#define CMM_HGO_MODE_VRATIO_NO_SKIPP (0 << 0) > +#define CMM_HGO_MODE_VRATIO_HALF_SKIPP BIT(0) > +#define CMM_HGO_MODE_VRATIO_QUARTER_SKIPP (2 << 0) > +#define CMM_HGO_LB_TH 0x020C > +#define CMM_HGO_LB0_H 0x0210 > +#define CMM_HGO_LB0_V 0x0214 > +#define CMM_HGO_LB1_H 0x0218 > +#define CMM_HGO_LB1_V 0x021C > +#define CMM_HGO_LB2_H 0x0220 > +#define CMM_HGO_LB2_V 0x0224 > +#define CMM_HGO_LB3_H 0x0228 > +#define CMM_HGO_LB3_V 0x022C > +#define CMM_HGO_R_HISTO(n) (0x0230 + ((n) * 4)) > +#define CMM_HGO_R_MAXMIN 0x0330 > +#define CMM_HGO_R_SUM 0x0334 > +#define CMM_HGO_R_LB_DET 0x0338 > +#define CMM_HGO_G_HISTO(n) (0x0340 + ((n) * 4)) > +#define CMM_HGO_G_MAXMIN 0x0440 > +#define CMM_HGO_G_SUM 0x0444 > +#define CMM_HGO_G_LB_DET 0x0448 > +#define CMM_HGO_B_HISTO(n) (0x0450 + ((n) * 4)) > +#define CMM_HGO_B_MAXMIN 0x0550 > +#define CMM_HGO_B_SUM 0x0554 > +#define CMM_HGO_B_LB_DET 0x0558 > +#define CMM_HGO_REGRST 0x05FC > +#define CMM_HGO_REGRST_RCLEA BIT(0) > +#define CMM_LUT_TBLA(n) (0x0600 + ((n) * 4)) > +#define CMM_CLU_ADDR 0x0A00 > +#define CMM_CLU_DATA 0x0A04 > +#define CMM_LUT_TBLB(n) (0x0B00 + ((n) * 4)) > +#define CMM_CLU_ADDR2 0x0F00 > +#define CMM_CLU_DATA2 0x0F04 The CMM is a separate IP core, I think it would be best supported in a separate platform_driver like the LVDS encoder, with the registers split to a separate header. > + > #endif /* __RCAR_DU_REGS_H__ */ > diff --git a/include/drm/drm_ioctl.h b/include/drm/drm_ioctl.h > index fafb6f5..add4280 100644 > --- a/include/drm/drm_ioctl.h > +++ b/include/drm/drm_ioctl.h > @@ -109,6 +109,13 @@ enum drm_ioctl_flags { > */ > DRM_ROOT_ONLY = BIT(2), > /** > + * @DRM_CONTROL_ALLOW: > + * > + * Deprecated, do not use. Control nodes are in the process of getting > + * removed. > + */ Do not use means do not use :-) As commented on the cover letter, changes to the DRM core and DRM API are fine, but need to be split to patches of their own, with corresponding documentation and a clear explanation of what they do and why they're needed. > + DRM_CONTROL_ALLOW = BIT(3), > + /** > * @DRM_UNLOCKED: > * > * Whether &drm_ioctl_desc.func should be called with the DRM BKL held -- Regards, Laurent Pinchart From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laurent Pinchart Subject: Re: [PATCH 1/8] drm: Add DU CMM support functions Date: Thu, 4 Apr 2019 13:09:42 +0300 Message-ID: <20190404100942.GD5800@pendragon.ideasonboard.com> References: <1554297284-14009-1-git-send-email-VenkataRajesh.Kalakodima@in.bosch.com> <1554297284-14009-2-git-send-email-VenkataRajesh.Kalakodima@in.bosch.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <1554297284-14009-2-git-send-email-VenkataRajesh.Kalakodima@in.bosch.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: VenkataRajesh.Kalakodima@in.bosch.com Cc: Tsutomu Muroya , devicetree@vger.kernel.org, Steve Longerbeam , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Koji Matsuoka , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org List-Id: devicetree@vger.kernel.org SGkgS2FsYWtvZGltYSwKClRoYW5rIHlvdSBmb3IgdGhlIHBhdGNoLgoKT24gV2VkLCBBcHIgMDMs IDIwMTkgYXQgMDY6NDQ6MzdQTSArMDUzMCwgVmVua2F0YVJhamVzaC5LYWxha29kaW1hQGluLmJv c2NoLmNvbSB3cm90ZToKPiBGcm9tOiBrYWxha29kaW1hIHZlbmthdGEgcmFqZXNoIDx2ZW5rYXRh cmFqZXNoLmthbGFrb2RpbWFAaW4uYm9zY2guY29tPgo+IAo+IFRoaXMgaXMgdGhlIG91dC1vZi10 cmVlIHBhdGNoIGZvciBEVSBDTU0gZHJpdmVyIHN1cHBvcnQgZnJvbQo+IFlvY3RvIHJlbGVhc2Ug djMuNC4wLgo+IAo+IExpbms6IGh0dHBzOi8vZ2l0aHViLmNvbS9yZW5lc2FzLXJjYXIvZHVfY21t L2NvbW1pdC8yZDhlYTJiNjY3YWQ0NjE2YWE2MzljNTRlY2MxMWY3YzRiNTg5NTlkLnBhdGNoCj4g Cj4gRm9sbG93aW5nIGlzIGZyb20gdGhlIHBhdGNoIGRlc2NyaXB0aW9uOgo+IAo+ICAgICBkdV9j bW06IFJlbGVhc2UgZm9yIFlvY3RvIHYzLjQuMAo+IAo+ICAgICBUaGlzIHBhdGNoIG1hZGUgdGhl IGZvbGxvd2luZyBjb3JyZXNwb25kZW5jZS4KPiAKPiAgICAgICAtIENvcnJlc3BvbmRzIHRvIGtl cm5lbCB2IDQuMTQuCj4gICAgICAgLSBEb3VibGUgYnVmZmVyIG9ubHkgaXMgc3VwcG9ydGVkLgo+ ICAgICAgIC0gRml4IENMVSAvIExVVCB1cGRhdGUgdGltaW5nLgo+ICAgICAgIC0gQWRkIENNTSBD aGFubmVsIG9jY3VwYXRpb24gbW9kZS4KPiAgICAgICAtIEZpeCBDbG9zZSBwcm9jZXNzLgo+IAo+ IFNpZ25lZC1vZmYtYnk6IEtvamkgTWF0c3Vva2EgPGtvamkubWF0c3Vva2EueG1AcmVuZXNhcy5j b20+Cj4gU2lnbmVkLW9mZi1ieTogVHN1dG9tdSBNdXJveWEgPG11cm95YUBrc2suY28uanA+Cj4g U2lnbmVkLW9mZi1ieTogU3RldmUgTG9uZ2VyYmVhbSA8c3RldmVfbG9uZ2VyYmVhbUBtZW50b3Iu Y29tPgo+IAo+ICAgICAgIC0gUmVtb3ZhbCBvZiByY2FyIHNwZWNpZmljIGlvY3RhbHMKPiAgICAg ICAtIFJlc29sdmVkIGNoZWNrcGF0Y2ggZXJyb3JzCj4gICAgICAgLSBSZXNvbHZlZCBtZXJnZSBj b25mbGljdHMgYWNjb3JkaW5nIHRvIGxhdGVzdCB2ZXJzaW9uCj4gICAgICAgLSBJbmNsdWRlZCBD TU0gZHJpdmVycyBhbmQgaW5jbHVkZWQgZmlsZXMgZnJvbSBiYXNlIHBhdGNoCj4gICAgICAgLSBS ZW1vdmVkIHJjYXJfZHVfZHJtLmggaW5jbHVkZSBmaWxlCgpXaGF0IHdlJ3JlIGludGVyZXN0ZWQg aW4gZnJvbSBhIG1haW5saW5lIHBvaW50IG9mIHZpZXcgaXMgYSBjb21taXQKbWVzc2FnZSB0aGF0 IGV4cGxhaW5zIHdoYXQgdGhlIHBhdGNoIGRvZXMgYW5kIHdoeSwgbm90IGEgY2hhbmdlbG9nCmNv bXBhcmVkIHRvIGFuIG91dC1vZi10cmVlIEJTUC4gUGxlYXNlIHJld29yZCB0aGUgY29tbWl0IG1l c3NhZ2VzIGluCnRoaXMgc2VyaWVzIGFjY29yZGluZ2x5LiBZb3UgY2FuIGJyaWVmbHkgbWVudGlv biB3aGVyZSB0aGUgY29kZSBjYW1lCmZyb20gaW4gdGhlIGZpcnN0IHBsYWNlLCBidXQgdGhhdCdz IHNlY29uZGFyeS4KCj4gU2lnbmVkLW9mZi1ieToga2FsYWtvZGltYSB2ZW5rYXRhIHJhamVzaCA8 dmVua2F0YXJhamVzaC5rYWxha29kaW1hQGluLmJvc2NoLmNvbT4KPiAtLS0KPiAgZHJpdmVycy9n cHUvZHJtL3JjYXItZHUvTWFrZWZpbGUgICAgICAgIHwgICAgMiArCj4gIGRyaXZlcnMvZ3B1L2Ry bS9yY2FyLWR1L3JjYXJfZHVfY21tLmMgICB8IDEyMDAgKysrKysrKysrKysrKysrKysrKysrKysr KysrKysrKwo+ICBkcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X2NydGMuYyAgfCAgIDI0 ICsKPiAgZHJpdmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kdV9jcnRjLmggIHwgICAxNiArCj4g IGRyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfZHJ2LmMgICB8ICAgNDMgKy0KPiAgZHJp dmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kdV9kcnYuaCAgIHwgICAxNiArLQo+ICBkcml2ZXJz L2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X2dyb3VwLmMgfCAgICA1ICsKPiAgZHJpdmVycy9ncHUv ZHJtL3JjYXItZHUvcmNhcl9kdV9yZWdzLmggIHwgICA5MiArKysKPiAgaW5jbHVkZS9kcm0vZHJt X2lvY3RsLmggICAgICAgICAgICAgICAgIHwgICAgNyArCj4gIDkgZmlsZXMgY2hhbmdlZCwgMTM5 OCBpbnNlcnRpb25zKCspLCA3IGRlbGV0aW9ucygtKQo+ICBjcmVhdGUgbW9kZSAxMDA2NDQgZHJp dmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kdV9jbW0uYwo+IAo+IGRpZmYgLS1naXQgYS9kcml2 ZXJzL2dwdS9kcm0vcmNhci1kdS9NYWtlZmlsZSBiL2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L01h a2VmaWxlCj4gaW5kZXggMmEzYjhkNy4uNTk1ZTcxOSAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dw dS9kcm0vcmNhci1kdS9NYWtlZmlsZQo+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L01h a2VmaWxlCj4gQEAgLTYsMTIgKzYsMTQgQEAgcmNhci1kdS1kcm0teSA6PSByY2FyX2R1X2NydGMu byBcCj4gIAkJIHJjYXJfZHVfa21zLm8gXAo+ICAJCSByY2FyX2R1X3BsYW5lLm8KPiAgCj4gK3Jj YXItZHUtZHJtLXkgKz0gcmNhcl9kdV9jbW0ubwo+ICByY2FyLWR1LWRybS0kKENPTkZJR19EUk1f UkNBUl9MVkRTKQkrPSByY2FyX2R1X29mLm8gXAo+ICAJCQkJCSAgIHJjYXJfZHVfb2ZfbHZkc19y OGE3NzkwLmR0Yi5vIFwKPiAgCQkJCQkgICByY2FyX2R1X29mX2x2ZHNfcjhhNzc5MS5kdGIubyBc Cj4gIAkJCQkJICAgcmNhcl9kdV9vZl9sdmRzX3I4YTc3OTMuZHRiLm8gXAo+ICAJCQkJCSAgIHJj YXJfZHVfb2ZfbHZkc19yOGE3Nzk1LmR0Yi5vIFwKPiAgCQkJCQkgICByY2FyX2R1X29mX2x2ZHNf cjhhNzc5Ni5kdGIubwo+ICsKPiAgcmNhci1kdS1kcm0tJChDT05GSUdfRFJNX1JDQVJfVlNQKQkr PSByY2FyX2R1X3ZzcC5vCj4gIAo+ICBvYmotJChDT05GSUdfRFJNX1JDQVJfRFUpCQkrPSByY2Fy LWR1LWRybS5vCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVf Y21tLmMgYi9kcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X2NtbS5jCj4gbmV3IGZpbGUg bW9kZSAxMDA2NDQKPiBpbmRleCAwMDAwMDAwLi5hYzYxM2E2ZQo+IC0tLSAvZGV2L251bGwKPiAr KysgYi9kcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X2NtbS5jCj4gQEAgLTAsMCArMSwx MjAwIEBACj4gKy8vIFNQRFgtTGljZW5zZS1JZGVudGlmaWVyOiBHUEwtMi4wKwo+ICsvKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKi8gLyoKPiArICogRFUgQ01NCj4gKyAqCj4gKyAqIENvcHlyaWdodCAoQykgMjAx OCBSZW5lc2FzIEVsZWN0cm9uaWNzIENvcnBvcmF0aW9uCj4gKyAqCj4gKyAqIExpY2Vuc2UgICAg ICAgIER1YWwgTUlUL0dQTHYyCgpUaGUgRFUgZHJpdmVyIGlzIGxpY2Vuc2VkIHVuZGVyIHRoZSB0 ZXJtcyBvZiB0aGUgR1BMLiBBZGRpbmcgZmlsZXMgd2l0aAphIGR1YWwgbGljZW5zZSB3aWxsIG1h a2UgbGljZW5zZSBjb21wbGlhbmNlIG1vcmUgY29tcGxleC4gUGxlYXNlIHVzZSBhbgpTUERYIGxp Y2Vuc2UgaGVhZGVyLCByZW1vdmUgYWxsIHRoZSBib2lsZXJwbGF0ZSB0ZXh0IGJlbG93LCBhbmQg dXNlIHRoZQpHUEwgb25seS4KCj4gKyAqCj4gKyAqIFRoZSBjb250ZW50cyBvZiB0aGlzIGZpbGUg YXJlIHN1YmplY3QgdG8gdGhlIE1JVCBsaWNlbnNlIGFzIHNldCBvdXQgYmVsb3cuCj4gKyAqCj4g KyAqIFBlcm1pc3Npb24gaXMgaGVyZWJ5IGdyYW50ZWQsIGZyZWUgb2YgY2hhcmdlLCB0byBhbnkg cGVyc29uIG9idGFpbmluZyBhIGNvcHkKPiArICogb2YgdGhpcyBzb2Z0d2FyZSBhbmQgYXNzb2Np YXRlZCBkb2N1bWVudGF0aW9uIGZpbGVzICh0aGUgIlNvZnR3YXJlIiksIHRvIGRlYWwKPiArICog aW4gdGhlIFNvZnR3YXJlIHdpdGhvdXQgcmVzdHJpY3Rpb24sIGluY2x1ZGluZyB3aXRob3V0IGxp bWl0YXRpb24gdGhlIHJpZ2h0cwo+ICsgKiB0byB1c2UsIGNvcHksIG1vZGlmeSwgbWVyZ2UsIHB1 Ymxpc2gsIGRpc3RyaWJ1dGUsIHN1YmxpY2Vuc2UsIGFuZC9vciBzZWxsCj4gKyAqIGNvcGllcyBv ZiB0aGUgU29mdHdhcmUsIGFuZCB0byBwZXJtaXQgcGVyc29ucyB0byB3aG9tIHRoZSBTb2Z0d2Fy ZSBpcwo+ICsgKiBmdXJuaXNoZWQgdG8gZG8gc28sIHN1YmplY3QgdG8gdGhlIGZvbGxvd2luZyBj b25kaXRpb25zOgo+ICsgKgo+ICsgKiBUaGUgYWJvdmUgY29weXJpZ2h0IG5vdGljZSBhbmQgdGhp cyBwZXJtaXNzaW9uIG5vdGljZSBzaGFsbCBiZSBpbmNsdWRlZCBpbgo+ICsgKiBhbGwgY29waWVz IG9yIHN1YnN0YW50aWFsIHBvcnRpb25zIG9mIHRoZSBTb2Z0d2FyZS4KPiArICoKPiArICogQWx0 ZXJuYXRpdmVseSwgdGhlIGNvbnRlbnRzIG9mIHRoaXMgZmlsZSBtYXkgYmUgdXNlZCB1bmRlciB0 aGUgdGVybXMgb2YKPiArICogdGhlIEdOVSBHZW5lcmFsIFB1YmxpYyBMaWNlbnNlIFZlcnNpb24g MiAoIkdQTCIpIGluIHdoaWNoIGNhc2UgdGhlIHByb3Zpc2lvbnMKPiArICogb2YgR1BMIGFyZSBh cHBsaWNhYmxlIGluc3RlYWQgb2YgdGhvc2UgYWJvdmUuCj4gKyAqCj4gKyAqIElmIHlvdSB3aXNo IHRvIGFsbG93IHVzZSBvZiB5b3VyIHZlcnNpb24gb2YgdGhpcyBmaWxlIG9ubHkgdW5kZXIgdGhl IHRlcm1zIG9mCj4gKyAqIEdQTCwgYW5kIG5vdCB0byBhbGxvdyBvdGhlcnMgdG8gdXNlIHlvdXIg dmVyc2lvbiBvZiB0aGlzIGZpbGUgdW5kZXIgdGhlIHRlcm1zCj4gKyAqIG9mIHRoZSBNSVQgbGlj ZW5zZSwgaW5kaWNhdGUgeW91ciBkZWNpc2lvbiBieSBkZWxldGluZyB0aGUgcHJvdmlzaW9ucyBh Ym92ZQo+ICsgKiBhbmQgcmVwbGFjZSB0aGVtIHdpdGggdGhlIG5vdGljZSBhbmQgb3RoZXIgcHJv dmlzaW9ucyByZXF1aXJlZCBieSBHUEwgYXMgc2V0Cj4gKyAqIG91dCBpbiB0aGUgZmlsZSBjYWxs ZWQgIkdQTC1DT1BZSU5HIiBpbmNsdWRlZCBpbiB0aGlzIGRpc3RyaWJ1dGlvbi4gSWYgeW91IGRv Cj4gKyAqIG5vdCBkZWxldGUgdGhlIHByb3Zpc2lvbnMgYWJvdmUsIGEgcmVjaXBpZW50IG1heSB1 c2UgeW91ciB2ZXJzaW9uIG9mIHRoaXMKPiArICogZmlsZSB1bmRlciB0aGUgdGVybXMgb2YgZWl0 aGVyIHRoZSBNSVQgbGljZW5zZSBvciBHUEwuCj4gKyAqCj4gKyAqIFRoaXMgTGljZW5zZSBpcyBh bHNvIGluY2x1ZGVkIGluIHRoaXMgZGlzdHJpYnV0aW9uIGluIHRoZSBmaWxlIGNhbGxlZAo+ICsg KiAiTUlULUNPUFlJTkciLgo+ICsgKgo+ICsgKiBFWENFUFQgQVMgT1RIRVJXSVNFIFNUQVRFRCBJ TiBBIE5FR09USUFURUQgQUdSRUVNRU5UOiAoQSkgVEhFIFNPRlRXQVJFIElTCj4gKyAqIFBST1ZJ REVEICJBUyBJUyIsIFdJVEhPVVQgV0FSUkFOVFkgT0YgQU5ZIEtJTkQsIEVYUFJFU1MgT1IgSU1Q TElFRCwgSU5DTFVESU5HCj4gKyAqIEJVVCBOT1QgTElNSVRFRCBUTyBUSEUgV0FSUkFOVElFUyBP RiBNRVJDSEFOVEFCSUxJVFksIEZJVE5FU1MgRk9SIEEKPiArICogUEFSVElDVUxBUiBQVVJQT1NF IEFORCBOT05JTkZSSU5HRU1FTlQ7IEFORCAoQikgSU4gTk8gRVZFTlQgU0hBTEwgVEhFIEFVVEhP UlMKPiArICogT1IgQ09QWVJJR0hUIEhPTERFUlMgQkUgTElBQkxFIEZPUiBBTlkgQ0xBSU0sIERB TUFHRVMgT1IgT1RIRVIgTElBQklMSVRZLAo+ICsgKiBXSEVUSEVSIElOIEFOIEFDVElPTiBPRiBD T05UUkFDVCwgVE9SVCBPUiBPVEhFUldJU0UsIEFSSVNJTkcgRlJPTSwgT1VUIE9GIE9SCj4gKyAq IElOIENPTk5FQ1RJT04gV0lUSCBUSEUgU09GVFdBUkUgT1IgVEhFIFVTRSBPUiBPVEhFUiBERUFM SU5HUyBJTiBUSEUgU09GVFdBUkUuCj4gKyAqCj4gKyAqCj4gKyAqIEdQTHYyOgo+ICsgKiBJZiB5 b3Ugd2lzaCB0byB1c2UgdGhpcyBmaWxlIHVuZGVyIHRoZSB0ZXJtcyBvZiBHUEwsIGZvbGxvd2lu ZyB0ZXJtcyBhcmUKPiArICogZWZmZWN0aXZlLgo+ICsgKgo+ICsgKiBUaGlzIHByb2dyYW0gaXMg ZnJlZSBzb2Z0d2FyZTsgeW91IGNhbiByZWRpc3RyaWJ1dGUgaXQgYW5kL29yIG1vZGlmeQo+ICsg KiBpdCB1bmRlciB0aGUgdGVybXMgb2YgdGhlIEdOVSBHZW5lcmFsIFB1YmxpYyBMaWNlbnNlIGFz IHB1Ymxpc2hlZCBieQo+ICsgKiB0aGUgRnJlZSBTb2Z0d2FyZSBGb3VuZGF0aW9uOyB2ZXJzaW9u IDIgb2YgdGhlIExpY2Vuc2UuCj4gKyAqCj4gKyAqIFRoaXMgcHJvZ3JhbSBpcyBkaXN0cmlidXRl ZCBpbiB0aGUgaG9wZSB0aGF0IGl0IHdpbGwgYmUgdXNlZnVsLAo+ICsgKiBidXQgV0lUSE9VVCBB TlkgV0FSUkFOVFk7IHdpdGhvdXQgZXZlbiB0aGUgaW1wbGllZCB3YXJyYW50eSBvZgo+ICsgKiBN RVJDSEFOVEFCSUxJVFkgb3IgRklUTkVTUyBGT1IgQSBQQVJUSUNVTEFSIFBVUlBPU0UuICBTZWUg dGhlCj4gKyAqIEdOVSBHZW5lcmFsIFB1YmxpYyBMaWNlbnNlIGZvciBtb3JlIGRldGFpbHMuCj4g KyAqLyAvKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKi8KPiArI2luY2x1ZGUgPGxpbnV4L3N5c2NhbGxzLmg+Cj4g KyNpbmNsdWRlIDxsaW51eC93b3JrcXVldWUuaD4KPiArCj4gKyNpbmNsdWRlIDxsaW51eC9yZXNl dC5oPgo+ICsjaW5jbHVkZSA8bGludXgvc3lzX3NvYy5oPgo+ICsKPiArI2luY2x1ZGUgPGRybS9k cm1QLmg+Cgpkcm1QLmggaXMgZGVwcmVjYXRlZCwgcGxlYXNlIGluY2x1ZGUgdGhlIERSTSBoZWFk ZXJzIHlvdSBuZWVkIGRpcmVjdGx5LgoKPiArI2luY2x1ZGUgPGRybS9kcm1fY3J0Yy5oPgo+ICsj aW5jbHVkZSA8ZHJtL2RybV9jcnRjX2hlbHBlci5oPgo+ICsjaW5jbHVkZSA8ZHJtL2RybV9mYl9j bWFfaGVscGVyLmg+Cj4gKyNpbmNsdWRlIDxkcm0vZHJtX2dlbV9jbWFfaGVscGVyLmg+Cj4gKwo+ ICsjaW5jbHVkZSAicmNhcl9kdV9jcnRjLmgiCj4gKyNpbmNsdWRlICJyY2FyX2R1X2Rydi5oIgo+ ICsjaW5jbHVkZSAicmNhcl9kdV9rbXMuaCIKPiArI2luY2x1ZGUgInJjYXJfZHVfcGxhbmUuaCIK PiArI2luY2x1ZGUgInJjYXJfZHVfcmVncy5oIgo+ICsjaW5jbHVkZSA8bGludXgvY2xrLmg+CgpQ bGVhc2Ugc29ydCBoZWFkZXJzIGFscGhhYmV0aWNhbGx5LCB3aXRoIHRoZSBsaW51eC8gaGVhZGVy cyBmaXJzdCwgdGhlbgpkcm0vLCB0aGVuIHRoZSBsb2NhbCBoZWFkZXJzLgoKPiArCj4gKy8qICNk ZWZpbmUgREVCVUdfUFJPQ0VfVElNRSAxICovCgpQbGVhc2UgcmVtb3ZlIGFsbCBjb21tZW50ZWQt b3V0IGNvZGUuCgo+ICsKPiArI2RlZmluZSBDTU1fTFVUX05VTSAyNTYKPiArI2RlZmluZSBDTU1f Q0xVX05VTSAoMTcgKiAxNyAqIDE3KQo+ICsjZGVmaW5lIENNTV9IR09fTlVNIDY0Cj4gKy8qIHJj YXJfZHVfZHJtLmggSW5jbHVkZSAqLwo+ICsjZGVmaW5lIExVVF9ET1VCTEVfQlVGRkVSX0FVVE8J CTAKPiArI2RlZmluZSBMVVRfRE9VQkxFX0JVRkZFUl9BCQkxCj4gKyNkZWZpbmUgTFVUX0RPVUJM RV9CVUZGRVJfQgkJMgo+ICsvKiBEUk1fUkNBUl9EVV9DTU1fV0FJVF9FVkVOVDogRFUtQ01NIGRv bmUgZXZlbnQgKi8KPiArI2RlZmluZSBDTU1fRVZFTlRfQ0xVX0RPTkUJCUJJVCgwKQo+ICsjZGVm aW5lIENNTV9FVkVOVF9IR09fRE9ORQkJQklUKDEpCj4gKyNkZWZpbmUgQ01NX0VWRU5UX0xVVF9E T05FCQlCSVQoMikKPiArCj4gKyNkZWZpbmUgQ0xVX0RPVUJMRV9CVUZGRVJfQVVUTwkJMAo+ICsj ZGVmaW5lIENMVV9ET1VCTEVfQlVGRkVSX0EJCTEKPiArI2RlZmluZSBDTFVfRE9VQkxFX0JVRkZF Ul9CCQkyCj4gK2VudW0gewo+ICsJUVVFX1NUQVRfUEVORElORywKPiArCVFVRV9TVEFUX0FDVElW RSwKPiArCVFVRV9TVEFUX0RPTkUsCj4gK307Cj4gKwo+ICtzdGF0aWMgY29uc3Qgc3RydWN0IHNv Y19kZXZpY2VfYXR0cmlidXRlIHJjYXJfZHVfY21tX3I4YTc3OTVfZXMxW10gPSB7Cj4gKwl7IC5z b2NfaWQgPSAicjhhNzc5NSIsIC5yZXZpc2lvbiA9ICJFUzEuKiIgfSwKPiArCXsgLyogc2VudGlu ZWwgKi8gfQo+ICt9Owo+ICsKPiArc3RydWN0IHJjYXJfZHVfY21tOwo+ICtzdHJ1Y3QgcmNhcl9k dV9jbW1fZmlsZV9wcml2Owo+ICsKPiArc3RydWN0IHJjYXJfZHVfY21tX3BlbmRpbmdfZXZlbnQg ewo+ICsJc3RydWN0IGxpc3RfaGVhZCBsaW5rOwo+ICsJc3RydWN0IGxpc3RfaGVhZCAgZnByaXZf bGluazsKPiArCXVuc2lnbmVkIGludCBldmVudDsKPiArCXVuc2lnbmVkIGludCBzdGF0Owo+ICsJ dW5zaWduZWQgbG9uZyBjYWxsYmFja19kYXRhOwo+ICsJc3RydWN0IGRybV9nZW1fb2JqZWN0ICpn ZW1fb2JqOwo+ICsJc3RydWN0IHJjYXJfZHVfY21tICpkdV9jbW07Cj4gKwlzdHJ1Y3QgcmNhcl9k dV9jbW1fZmlsZV9wcml2ICpmcHJpdjsKPiArfTsKPiArCj4gK3N0cnVjdCBjbW1fbW9kdWxlX3Qg ewo+ICsJc3RydWN0IGxpc3RfaGVhZCBsaXN0Owo+ICsJdW5pb24gewo+ICsJCXN0cnVjdCB7Cj4g KwkJCXN0cnVjdCByY2FyX2R1X2NtbV9wZW5kaW5nX2V2ZW50ICpwOwo+ICsJCQlpbnQgYnVmX21v ZGU7Cj4gKwkJCWJvb2wgb25lX3NpZGU7Cj4gKwkJfTsKPiArCQlpbnQgcmVzZXQ7Cj4gKwl9Owo+ ICt9Owo+ICsKPiArc3RydWN0IGNtbV9yZWdfc2F2ZSB7Cj4gKyNpZmRlZiBDT05GSUdfUE1fU0xF RVAKPiArCXdhaXRfcXVldWVfaGVhZF90IHdhaXQ7Cj4gKwo+ICsJdTMyICpsdXRfdGFibGU7Cj4g Kwl1MzIgKmNsdV90YWJsZTsKPiArI2VuZGlmIC8qIENPTkZJR19QTV9TTEVFUCAqLwo+ICsKPiAr CXUzMiBjbTJfY3RsMDsJLyogQ00yX0NUTDAgKi8KPiArCXUzMiBoZ29fb2Zmc2V0OwkvKiBDTU1f SEdPX09GRlNFVCAqLwo+ICsJdTMyIGhnb19zaXplOwkvKiBDTU1fSEdPX1NJWkUgKi8KPiArCXUz MiBoZ29fbW9kZTsJLyogQ01NX0hHT19NT0RFICovCj4gK307Cj4gKwo+ICtzdHJ1Y3QgcmNhcl9k dV9jbW0gewo+ICsJc3RydWN0IHJjYXJfZHVfY3J0YyAqcmNydGM7Cj4gKwo+ICsJLyogQ01NIGJh c2UgYWRkcmVzcyAqLwo+ICsJdm9pZCBfX2lvbWVtICpjbW1fYmFzZTsKPiArCXN0cnVjdCBjbGsg KmNsb2NrOwo+ICsKPiArCXN0cnVjdCBjbW1fbW9kdWxlX3QgbHV0Owo+ICsJc3RydWN0IGNtbV9t b2R1bGVfdCBjbHU7Cj4gKwlzdHJ1Y3QgY21tX21vZHVsZV90IGhnbzsKPiArCj4gKwlzdHJ1Y3Qg bXV0ZXggbG9jazsJLyogbG9jayBmb3IgcmVnaXN0ZXIgc2V0dGluZyAqLwo+ICsJc3RydWN0IHdv cmtxdWV1ZV9zdHJ1Y3QgKndvcmtxdWV1ZTsKPiArCXN0cnVjdCB3b3JrX3N0cnVjdCB3b3JrOwo+ ICsKPiArCXN0cnVjdCBjbW1fcmVnX3NhdmUgcmVnX3NhdmU7CgpQbGVhc2UgZG9uJ3QgYmxpbmRs eSBzYXZlIGFuZCByZXN0b3JlIHJlZ2lzdGVycy4gVGhlIGRldmljZSBzaG91bGQgYmUKcmVjb25m aWd1cmVkIGF0IHJlc3VtZSB0aW1lIGluIGFuIG9yZGVyZWQgbWFuZXIsIHNpbWlsYXIgdG8gd2hh dCBpcyBkb25lCmF0IHJ1bnRpbWUuIFJlc3RvcmluZyByZWdpc3RlcnMgYmxpbmRseSB1c3VhbGx5 IGxlYWRzIHRvIGRpc2FzdGVycyBhcwp0aGUgb3JkZXIgb2YgdGhlIHJlZ2lzdGVyIHdyaXRlcyBt YXR0ZXIuCgo+ICsJYm9vbCBhY3RpdmU7Cj4gKwlib29sIGRidWY7Cj4gKwlib29sIGNsdV9kYnVm Owo+ICsJYm9vbCBpbml0Owo+ICsJYm9vbCBkaXJlY3Q7Cj4gKwlib29sIHZzeW5jOwo+ICsJYm9v bCBhdXRob3JpdHk7Cj4gKwlwaWRfdCBwaWQ7CgpJIGRvbid0IGtub3cgd2hhdCB0aGlzIGlzIGZv ciwgYnV0IGEgcGlkX3QgZmllbGQgaGVyZSBpcyBtb3N0IHByb2JhYmx5IGEKc2lnbiB0aGF0IHNv bWV0aGluZyBpcyB3cm9uZy4KCj4gKwlib29sIHNvY19zdXBwb3J0Owo+ICt9Owo+ICsKPiArc3Ry dWN0IHJjYXJfZHVfY21tX2ZpbGVfcHJpdiB7Cj4gKwl3YWl0X3F1ZXVlX2hlYWRfdCBldmVudF93 YWl0Owo+ICsJc3RydWN0IGxpc3RfaGVhZCBsaXN0Owo+ICsJc3RydWN0IGxpc3RfaGVhZCBhY3Rp dmVfbGlzdDsKPiArCXN0cnVjdCBsaXN0X2hlYWQgKmRvbmVfbGlzdDsKPiArfTsKPiArCj4gK3N0 YXRpYyBERUZJTkVfTVVURVgoY21tX2V2ZW50X2xvY2spOwo+ICtzdGF0aWMgREVGSU5FX1NQSU5M T0NLKGNtbV9kaXJlY3RfbG9jayk7CgpObyBnbG9iYWwgdmFyaWFibGVzIHBsZWFzZS4KCj4gKwo+ ICtzdGF0aWMgaW5saW5lIHZvaWQgZXZlbnRfcHJldl9jYW5jZWxfbG9ja2VkKHN0cnVjdCBjbW1f bW9kdWxlX3QgKm1vZHVsZSk7CgpBbmQgbm8gZm9yd2FyZCBkZWNsYXJhdGlvbnMgZm9yIGZ1bmN0 aW9ucyB3aGVuIHBvc3NpYmxlLgoKPiArc3RhdGljIGlubGluZSB1MzIgY21tX2luZGV4KHN0cnVj dCByY2FyX2R1X2NtbSAqX2NtbSkKPiArewo+ICsJc3RydWN0IHJjYXJfZHVfZGV2aWNlICpyY2R1 ID0gX2NtbS0+cmNydGMtPmdyb3VwLT5kZXY7Cj4gKwo+ICsJaWYgKHJjYXJfZHVfaGFzKHJjZHUs IFJDQVJfRFVfRkVBVFVSRV9SOEE3Nzk2NV9SRUdTKSkgewo+ICsJCWlmICgoX2NtbSktPnJjcnRj LT5pbmRleCA9PSAzKQo+ICsJCQlyZXR1cm4gMjsKPiArCX0KPiArCXJldHVybiAoX2NtbSktPnJj cnRjLT5pbmRleDsKCkNSVENzIG5vdyBoYXZlIGEgaGFyZHdhcmUgYW5kIGEgc29mdHdhcmUgaW5k ZXggbWVjaGFuaXNtIHRoYXQgc2hvdWxkIGJlCnVzZWQgaW5zdGVhZCBvZiB0aGlzIGhhY2suCgpJ J2xsIHN0b3AgcmV2aWV3aW5nIHRoZSBpbXBsZW1lbnRhdGlvbiBpbiBkZXRhaWxzIGZvciBub3cg YXMgSSB0aGluawp0aGVyZSBhcmUgbWFqb3IgaXNzdWVzIGluIHRoZSBzZXJpZXMgdGhhdCB3aWxs IHJlcXVpcmUgbGFyZ2UKcmVmYWN0b3JpbmcsIHNvIEknbGwgc3RhcnQgd2l0aCB0aGF0LCBhbmQg cmV2aWV3IHRoZSBjb2RlIGluIGRldGFpbHMgZm9yCnRoZSBuZXh0IHZlcnNpb24uCgo+ICt9Cj4g Kwo+ICsjZGVmaW5lIGNtbV9kb25lX2xpc3QoX2NtbSwgX2Zwcml2KSBcCj4gKwkoJigoX2Zwcml2 KS0+ZG9uZV9saXN0W2NtbV9pbmRleChfY21tKV0pKQo+ICsKPiArc3RhdGljIGlubGluZSB1MzIg cmNhcl9kdV9jbW1fcmVhZChzdHJ1Y3QgcmNhcl9kdV9jbW0gKmR1X2NtbSwgdTMyIHJlZykKPiAr ewo+ICsJcmV0dXJuIGlvcmVhZDMyKGR1X2NtbS0+Y21tX2Jhc2UgKyByZWcpOwo+ICt9Cj4gKwo+ ICtzdGF0aWMgaW5saW5lIHZvaWQgcmNhcl9kdV9jbW1fd3JpdGUoc3RydWN0IHJjYXJfZHVfY21t ICpkdV9jbW0sCj4gKwkJCQkgICAgIHUzMiByZWcsIHUzMiBkYXRhKQo+ICt7Cj4gKwlpb3dyaXRl MzIoZGF0YSwgZHVfY21tLT5jbW1fYmFzZSArIHJlZyk7Cj4gK30KPiArCj4gKy8qIGNyZWF0ZSBk ZWZhdWx0IENMVSB0YWJsZSBkYXRhICovCj4gK3N0YXRpYyBpbmxpbmUgdTMyIGluZGV4X3RvX2Ns dV9kYXRhKGludCBpbmRleCkKPiArewo+ICsJaW50IHIsIGcsIGI7Cj4gKwo+ICsJciA9IGluZGV4 ICUgMTc7Cj4gKwlpbmRleCAvPSAxNzsKPiArCWcgPSBpbmRleCAlIDE3Owo+ICsJaW5kZXggLz0g MTc7Cj4gKwliID0gaW5kZXggJSAxNzsKPiArCj4gKwlyID0gKHIgPDwgMjApOwo+ICsJaWYgKHIg PiAoMjU1IDw8IDE2KSkKPiArCQlyID0gKDI1NSA8PCAxNik7Cj4gKwlnID0gKGcgPDwgMTIpOwo+ ICsJaWYgKGcgPiAoMjU1IDw8IDgpKQo+ICsJCWcgPSAoMjU1IDw8IDgpOwo+ICsJYiA9IChiIDw8 IDQpOwo+ICsJaWYgKGIgPiAoMjU1IDw8IDApKQo+ICsJCWIgPSAoMjU1IDw8IDApOwo+ICsKPiAr CXJldHVybiByIHwgZyB8IGI7Cj4gK30KPiArCj4gKyNpZmRlZiBERUJVR19QUk9DRV9USU1FCj4g K3N0YXRpYyBsb25nIGxvbmcgZGlmZl90aW1ldmFscyhzdHJ1Y3QgdGltZXZhbCAqc3RhcnQsIHN0 cnVjdCB0aW1ldmFsICplbmQpCj4gK3sKPiArCXJldHVybiAoZW5kLT50dl9zZWMgKiAxMDAwMDAw TEwgKyBlbmQtPnR2X3VzZWMpIC0KPiArCQkoc3RhcnQtPnR2X3NlYyAqIDEwMDAwMDBMTCArIHN0 YXJ0LT50dl91c2VjKTsKPiArfQo+ICsjZW5kaWYKPiArCj4gK3N0YXRpYyB2b2lkIGR1X2NtbV9j bGsoc3RydWN0IHJjYXJfZHVfY21tICpkdV9jbW0sIGJvb2wgb24pCj4gK3sKPiArCWlmIChvbikK PiArCQljbGtfcHJlcGFyZV9lbmFibGUoZHVfY21tLT5jbG9jayk7Cj4gKwllbHNlCj4gKwkJY2xr X2Rpc2FibGVfdW5wcmVwYXJlKGR1X2NtbS0+Y2xvY2spOwo+ICt9Cj4gKwo+ICtpbnQgcmNhcl9k dV9jbW1fc3RhcnRfc3RvcChzdHJ1Y3QgcmNhcl9kdV9jcnRjICpyY3J0YywgYm9vbCBvbikKPiAr ewo+ICsJc3RydWN0IHJjYXJfZHVfY21tICpkdV9jbW0gPSByY3J0Yy0+Y21tX2hhbmRsZTsKPiAr CWludCBpOwo+ICsJdTMyIHRhYmxlX2RhdGE7Cj4gKwljb25zdCBzdHJ1Y3QgZHJtX2Rpc3BsYXlf bW9kZSAqbW9kZTsKPiArCWludCB3LCBoLCB4LCB5Owo+ICsKPiArCWlmICghZHVfY21tKQo+ICsJ CXJldHVybiAtRUlOVkFMOwo+ICsKPiArCW11dGV4X2xvY2soJmR1X2NtbS0+bG9jayk7Cj4gKwo+ ICsJaWYgKCFvbikgewo+ICsJCWR1X2NtbS0+YWN0aXZlID0gZmFsc2U7Cj4gKwo+ICsJCXJjYXJf ZHVfY21tX3dyaXRlKGR1X2NtbSwgQ01NX0xVVF9DVFJMLCAweDAwMDAwMDAwKTsKPiArCQlyY2Fy X2R1X2NtbV93cml0ZShkdV9jbW0sIENNTV9DTFVfQ1RSTCwgMHgwMDAwMDAwMCk7Cj4gKwo+ICsJ CWR1X2NtbV9jbGsoZHVfY21tLCBmYWxzZSk7Cj4gKwo+ICsJCWdvdG8gZW5kOwo+ICsJfQo+ICsK PiArCWR1X2NtbV9jbGsoZHVfY21tLCB0cnVlKTsKPiArCj4gKwlpZiAoZHVfY21tLT5pbml0KQo+ ICsJCWdvdG8gaW5pdF9kb25lOwo+ICsKPiArCWR1X2NtbS0+aW5pdCA9IHRydWU7Cj4gKwo+ICsJ bW9kZSA9ICZkdV9jbW0tPnJjcnRjLT5jcnRjLm1vZGU7Cj4gKwo+ICsJeCA9IChkdV9jbW0tPnJl Z19zYXZlLmhnb19vZmZzZXQgPj4gMTYpICYgMHhGRkZGOwo+ICsJeSA9IChkdV9jbW0tPnJlZ19z YXZlLmhnb19vZmZzZXQgPj4gMCkgICYgMHhGRkZGOwo+ICsJdyA9IChkdV9jbW0tPnJlZ19zYXZl Lmhnb19zaXplID4+IDE2KSAmIDB4RkZGRjsKPiArCWggPSAoZHVfY21tLT5yZWdfc2F2ZS5oZ29f c2l6ZSA+PiAwKSAgJiAweEZGRkY7Cj4gKwlpZiAoKG1vZGUtPmhkaXNwbGF5IDwgKHcgKyB4KSkg fHwgdyA9PSAwKSB7Cj4gKwkJeCA9IDA7Cj4gKwkJdyA9IG1vZGUtPmhkaXNwbGF5Owo+ICsJfQo+ ICsJaWYgKChtb2RlLT52ZGlzcGxheSA8IChoICsgeSkpIHx8IGggPT0gMCkgewo+ICsJCXkgPSAw Owo+ICsJCWggPSBtb2RlLT52ZGlzcGxheTsKPiArCX0KPiArCWR1X2NtbS0+cmVnX3NhdmUuaGdv X29mZnNldCA9ICh4IDw8IDE2KSB8IHk7Cj4gKwlkdV9jbW0tPnJlZ19zYXZlLmhnb19zaXplID0g KHcgPDwgMTYpIHwgaDsKPiArCj4gKwlpZiAobW9kZS0+ZmxhZ3MgJiBEUk1fTU9ERV9GTEFHX1BW U1lOQykKPiArCQlkdV9jbW0tPnJlZ19zYXZlLmNtMl9jdGwwIHw9IENNTV9DVEwwX1ZQT0w7Cj4g KwllbHNlCj4gKwkJZHVfY21tLT5yZWdfc2F2ZS5jbTJfY3RsMCAmPSB+Q01NX0NUTDBfVlBPTDsK PiArCj4gKwlyY2FyX2R1X2NtbV93cml0ZShkdV9jbW0sIENNMl9DVEwwLCBkdV9jbW0tPnJlZ19z YXZlLmNtMl9jdGwwKTsKPiArCXJjYXJfZHVfY21tX3dyaXRlKGR1X2NtbSwgQ01NX0hHT19PRkZT RVQsIGR1X2NtbS0+cmVnX3NhdmUuaGdvX29mZnNldCk7Cj4gKwlyY2FyX2R1X2NtbV93cml0ZShk dV9jbW0sIENNTV9IR09fU0laRSwgZHVfY21tLT5yZWdfc2F2ZS5oZ29fc2l6ZSk7Cj4gKwlyY2Fy X2R1X2NtbV93cml0ZShkdV9jbW0sIENNTV9IR09fTU9ERSwgZHVfY21tLT5yZWdfc2F2ZS5oZ29f bW9kZSk7Cj4gKwlyY2FyX2R1X2NtbV93cml0ZShkdV9jbW0sIENNTV9IR09fTEJfVEgsIDApOwo+ ICsJcmNhcl9kdV9jbW1fd3JpdGUoZHVfY21tLCBDTU1fSEdPX0xCMF9ILCAwKTsKPiArCXJjYXJf ZHVfY21tX3dyaXRlKGR1X2NtbSwgQ01NX0hHT19MQjBfViwgMCk7Cj4gKwlyY2FyX2R1X2NtbV93 cml0ZShkdV9jbW0sIENNTV9IR09fTEIxX0gsIDApOwo+ICsJcmNhcl9kdV9jbW1fd3JpdGUoZHVf Y21tLCBDTU1fSEdPX0xCMV9WLCAwKTsKPiArCXJjYXJfZHVfY21tX3dyaXRlKGR1X2NtbSwgQ01N X0hHT19MQjJfSCwgMCk7Cj4gKwlyY2FyX2R1X2NtbV93cml0ZShkdV9jbW0sIENNTV9IR09fTEIy X1YsIDApOwo+ICsJcmNhcl9kdV9jbW1fd3JpdGUoZHVfY21tLCBDTU1fSEdPX0xCM19ILCAwKTsK PiArCXJjYXJfZHVfY21tX3dyaXRlKGR1X2NtbSwgQ01NX0hHT19MQjNfViwgMCk7Cj4gKwo+ICsJ LyogaW5pdCBjb2xvciB0YWJsZSAqLwo+ICsJZm9yIChpID0gMDsgaSA8IENNTV9MVVRfTlVNOyBp KyspIHsKPiArCSNpZmRlZiBDT05GSUdfUE1fU0xFRVAKPiArCQl0YWJsZV9kYXRhID0gZHVfY21t LT5yZWdfc2F2ZS5sdXRfdGFibGVbaV07Cj4gKwkjZWxzZQo+ICsJCXRhYmxlX2RhdGEgPSAoKGkg PDwgMTYpIHwgKGkgPDwgOCkgfCAoaSA8PCAwKSk7Cj4gKwkjZW5kaWYgLyogQ09ORklHX1BNX1NM RUVQICovCj4gKwkJcmNhcl9kdV9jbW1fd3JpdGUoZHVfY21tLCBDTU1fTFVUX1RCTEEoaSksIHRh YmxlX2RhdGEpOwo+ICsKPiArCQlpZiAoZHVfY21tLT5kYnVmKQo+ICsJCQlyY2FyX2R1X2NtbV93 cml0ZShkdV9jbW0sIENNTV9MVVRfVEJMQihpKSwKPiArCQkJCQkgIHRhYmxlX2RhdGEpOwo+ICsJ fQo+ICsKPiArCXJjYXJfZHVfY21tX3dyaXRlKGR1X2NtbSwgQ01NX0NMVV9DVFJMLAo+ICsJCQkg IENNTV9DTFVfQ1RSTF9BQUkgfCBDTU1fQ0xVX0NUUkxfTVZTKTsKPiArCj4gKwlyY2FyX2R1X2Nt bV93cml0ZShkdV9jbW0sIENNTV9DTFVfQUREUiwgMCk7Cj4gKwlpZiAoZHVfY21tLT5jbHVfZGJ1 ZikKPiArCQlyY2FyX2R1X2NtbV93cml0ZShkdV9jbW0sIENNTV9DTFVfQUREUjIsIDApOwo+ICsK PiArCWZvciAoaSA9IDA7IGkgPCBDTU1fQ0xVX05VTTsgaSsrKSB7Cj4gKwkjaWZkZWYgQ09ORklH X1BNX1NMRUVQCj4gKwkJdGFibGVfZGF0YSA9IGR1X2NtbS0+cmVnX3NhdmUuY2x1X3RhYmxlW2ld Owo+ICsJI2Vsc2UKPiArCQl0YWJsZV9kYXRhID0gaW5kZXhfdG9fY2x1X2RhdGEoaSk7Cj4gKwkj ZW5kaWYgLyogQ09ORklHX1BNX1NMRUVQICovCj4gKwkJcmNhcl9kdV9jbW1fd3JpdGUoZHVfY21t LCBDTU1fQ0xVX0RBVEEsIHRhYmxlX2RhdGEpOwo+ICsKPiArCQlpZiAoZHVfY21tLT5kYnVmKQo+ ICsJCQlyY2FyX2R1X2NtbV93cml0ZShkdV9jbW0sIENNTV9DTFVfREFUQTIsCj4gKwkJCQkJICB0 YWJsZV9kYXRhKTsKPiArCX0KPiArCj4gK2luaXRfZG9uZToKPiArCS8qIGVuYWJsZSBjb2xvciB0 YWJsZSAqLwo+ICsJcmNhcl9kdV9jbW1fd3JpdGUoZHVfY21tLCBDTU1fTFVUX0NUUkwsIENNTV9M VVRfQ1RSTF9FTik7Cj4gKwlyY2FyX2R1X2NtbV93cml0ZShkdV9jbW0sIENNTV9DTFVfQ1RSTCwg Q01NX0NMVV9DVFJMX0FBSSB8Cj4gKwkJCSAgQ01NX0NMVV9DVFJMX01WUyB8IENNTV9DTFVfQ1RS TF9FTik7Cj4gKwo+ICsJZHVfY21tLT5hY3RpdmUgPSB0cnVlOwo+ICtlbmQ6Cj4gKwltdXRleF91 bmxvY2soJmR1X2NtbS0+bG9jayk7Cj4gKwo+ICsJcmV0dXJuIDA7Cj4gK30KPiArCj4gKyNkZWZp bmUgZ2VtX3RvX3ZhZGRyKGdlbV9vYmopIFwKPiArCShjb250YWluZXJfb2YoKGdlbV9vYmopLCBz dHJ1Y3QgZHJtX2dlbV9jbWFfb2JqZWN0LCBiYXNlKS0+dmFkZHIpCj4gKwo+ICtzdGF0aWMgaW5s aW5lIHZvaWQgY21tX3ZibGFua19wdXQoc3RydWN0IHJjYXJfZHVfY21tX3BlbmRpbmdfZXZlbnQg KnApCj4gK3sKPiArCWlmIChwLT5kdV9jbW0pCj4gKwkJZHJtX2NydGNfdmJsYW5rX3B1dCgmcC0+ ZHVfY21tLT5yY3J0Yy0+Y3J0Yyk7Cj4gK30KPiArCj4gK3N0YXRpYyBpbmxpbmUgdm9pZAo+ICtj bW1fZ2VtX29iamVjdF91bnJlZmVyZW5jZShzdHJ1Y3QgcmNhcl9kdV9jbW1fcGVuZGluZ19ldmVu dCAqcCkKPiArewo+ICsJaWYgKHAtPmdlbV9vYmopCj4gKwkJZHJtX2dlbV9vYmplY3RfdW5yZWZl cmVuY2VfdW5sb2NrZWQocC0+Z2VtX29iaik7Cj4gK30KPiArCj4gK3N0YXRpYyBpbmxpbmUgdm9p ZCBfZXZlbnRfZG9uZV9sb2NrZWQoc3RydWN0IHJjYXJfZHVfY21tX3BlbmRpbmdfZXZlbnQgKnAp Cj4gK3sKPiArCWNtbV9nZW1fb2JqZWN0X3VucmVmZXJlbmNlKHApOwo+ICsKPiArCWlmIChwLT5m cHJpdikgewo+ICsJCXAtPnN0YXQgPSBRVUVfU1RBVF9ET05FOwo+ICsJCWxpc3RfZGVsKCZwLT5s aW5rKTsgLyogZGVsZXRlIGZyb20gcC0+ZnByaXYtPmFjdGl2ZV9saXN0ICovCj4gKwkJbGlzdF9h ZGRfdGFpbCgmcC0+bGluaywgY21tX2RvbmVfbGlzdChwLT5kdV9jbW0sIHAtPmZwcml2KSk7Cj4g KwkJd2FrZV91cF9pbnRlcnJ1cHRpYmxlKCZwLT5mcHJpdi0+ZXZlbnRfd2FpdCk7Cj4gKwl9IGVs c2Ugewo+ICsJCS8qIGxpbmsgZGVsZXRlZCBieSByY2FyX2R1X2NtbV9wb3N0Y2xvc2UgKi8KPiAr CQlrZnJlZShwKTsKPiArCX0KPiArfQo+ICsKPiArLyogY2FuY2VsIGZyb20gYWN0aXZlX2xpc3Qg KGNhc2Ugb2YgTFVUL0NMVSBkb3VibGUgYnVmZmVyIG1vZGUpICovCj4gK3N0YXRpYyBpbmxpbmUg dm9pZCBldmVudF9wcmV2X2NhbmNlbF9sb2NrZWQoc3RydWN0IGNtbV9tb2R1bGVfdCAqbW9kdWxl KQo+ICt7Cj4gKwlzdHJ1Y3QgcmNhcl9kdV9jbW1fcGVuZGluZ19ldmVudCAqcCA9IG1vZHVsZS0+ cDsKPiArCj4gKwlpZiAoIXApCj4gKwkJcmV0dXJuOwo+ICsKPiArCW1vZHVsZS0+cCA9IE5VTEw7 Cj4gKwo+ICsJX2V2ZW50X2RvbmVfbG9ja2VkKHApOwo+ICt9Cj4gKwo+ICtzdGF0aWMgaW5saW5l IHZvaWQgZXZlbnRfZG9uZShzdHJ1Y3QgcmNhcl9kdV9jbW1fcGVuZGluZ19ldmVudCAqcCkKPiAr ewo+ICsJLyogdmJsYW5rIGlzIHB1dCAqLwo+ICsKPiArCW11dGV4X2xvY2soJmNtbV9ldmVudF9s b2NrKTsKPiArCj4gKwlfZXZlbnRfZG9uZV9sb2NrZWQocCk7Cj4gKwo+ICsJbXV0ZXhfdW5sb2Nr KCZjbW1fZXZlbnRfbG9jayk7Cj4gK30KPiArCj4gK3N0YXRpYyBpbmxpbmUgdm9pZCBsY19ldmVu dF9kb25lKHN0cnVjdCBjbW1fbW9kdWxlX3QgKm1vZHVsZSwKPiArCQkJCSBzdHJ1Y3QgcmNhcl9k dV9jbW1fcGVuZGluZ19ldmVudCAqcCwKPiArCQkJCSBib29sIGRvbmUpCj4gK3sKPiArCS8qIHZi bGFuayBpcyBwdXQgKi8KPiArCj4gKwltdXRleF9sb2NrKCZjbW1fZXZlbnRfbG9jayk7Cj4gKwo+ ICsJaWYgKCFkb25lICYmIGxpc3RfZW1wdHkoJm1vZHVsZS0+bGlzdCkpCj4gKwkJbW9kdWxlLT5w ID0gcDsKPiArCWVsc2UKPiArCQlfZXZlbnRfZG9uZV9sb2NrZWQocCk7Cj4gKwo+ICsJbXV0ZXhf dW5sb2NrKCZjbW1fZXZlbnRfbG9jayk7Cj4gK30KPiArCj4gK3N0YXRpYyBpbmxpbmUgc3RydWN0 IHJjYXJfZHVfY21tX3BlbmRpbmdfZXZlbnQgKgo+ICtldmVudF9wb3BfbG9ja2VkKHN0cnVjdCBj bW1fbW9kdWxlX3QgKm1vZHVsZSkKPiArewo+ICsJc3RydWN0IHJjYXJfZHVfY21tX3BlbmRpbmdf ZXZlbnQgKnAgPQo+ICsJCWxpc3RfZmlyc3RfZW50cnkoJm1vZHVsZS0+bGlzdCwKPiArCQkJCSBz dHJ1Y3QgcmNhcl9kdV9jbW1fcGVuZGluZ19ldmVudCwKPiArCQkJCSBsaW5rKTsKPiArCj4gKwlw LT5zdGF0ID0gUVVFX1NUQVRfQUNUSVZFOwo+ICsJbGlzdF9kZWwoJnAtPmxpbmspOyAvKiBkZWxl dGUgZnJvbSBkdV9jbW0tPltsdXR8Y2x1fGhnb10ubGlzdCAqLwo+ICsJbGlzdF9hZGRfdGFpbCgm cC0+bGluaywgJnAtPmZwcml2LT5hY3RpdmVfbGlzdCk7Cj4gKwljbW1fdmJsYW5rX3B1dChwKTsK PiArCj4gKwlyZXR1cm4gcDsKPiArfQo+ICsKPiArc3RydWN0IHJjYXJfZHVfY21tX3dvcmtfc3Rh dCB7Cj4gKwl1bmlvbiB7Cj4gKwkJc3RydWN0IHsKPiArCQkJc3RydWN0IHJjYXJfZHVfY21tX3Bl bmRpbmdfZXZlbnQgKnA7Cj4gKwkJCWJvb2wgZG9uZTsKPiArCQkJYm9vbCB0YWJsZV9jb3B5Owo+ ICsJCX07Cj4gKwkJc3RydWN0IHsKPiArCQkJc3RydWN0IHJjYXJfZHVfY21tX3BlbmRpbmdfZXZl bnQgKnAyOwo+ICsJCQlib29sIHJlc2V0Owo+ICsJCX07Cj4gKwl9Owo+ICt9Owo+ICsKPiArc3Rh dGljIGlubGluZSB2b2lkIG9uZV9zaWRlKHN0cnVjdCByY2FyX2R1X2NtbSAqZHVfY21tLAo+ICsJ CQkgICAgc3RydWN0IGNtbV9tb2R1bGVfdCAqbW9kdWxlLAo+ICsJCQkgICAgYm9vbCBvbikKPiAr ewo+ICsJaWYgKG9uICYmICFtb2R1bGUtPm9uZV9zaWRlKSB7Cj4gKwkJbW9kdWxlLT5vbmVfc2lk ZSA9IHRydWU7Cj4gKwkJZHJtX2NydGNfdmJsYW5rX2dldCgmZHVfY21tLT5yY3J0Yy0+Y3J0Yyk7 Cj4gKwl9IGVsc2UgaWYgKCFvbiAmJiBtb2R1bGUtPm9uZV9zaWRlKSB7Cj4gKwkJbW9kdWxlLT5v bmVfc2lkZSA9IGZhbHNlOwo+ICsJCWRybV9jcnRjX3ZibGFua19wdXQoJmR1X2NtbS0+cmNydGMt PmNydGMpOwo+ICsJfQo+ICt9Cj4gKwo+ICsvKiBwb3AgTFVUIHF1ZSAqLwo+ICtzdGF0aWMgaW50 IGx1dF9wb3BfbG9ja2VkKHN0cnVjdCByY2FyX2R1X2NtbSAqZHVfY21tLAo+ICsJCQkgIHN0cnVj dCByY2FyX2R1X2NtbV93b3JrX3N0YXQgKnN0YXQpCj4gK3sKPiArCWJvb2wgaXNfb25lX3NpZGUg PSBmYWxzZTsKPiArCj4gKwlzdGF0LT5kb25lID0gdHJ1ZTsKPiArCXN0YXQtPnRhYmxlX2NvcHkg PSBmYWxzZTsKPiArCj4gKwlpZiAoIWxpc3RfZW1wdHkoJmR1X2NtbS0+bHV0Lmxpc3QpKSB7Cj4g KwkJc3RhdC0+cCA9IGV2ZW50X3BvcF9sb2NrZWQoJmR1X2NtbS0+bHV0KTsKPiArCj4gKwkJLyog cHJldiBsdXQgdGFibGUgKi8KPiArCQlldmVudF9wcmV2X2NhbmNlbF9sb2NrZWQoJmR1X2NtbS0+ bHV0KTsKPiArCj4gKwkJaWYgKGR1X2NtbS0+bHV0LmJ1Zl9tb2RlID09IExVVF9ET1VCTEVfQlVG RkVSX0FVVE8pIHsKPiArCQkJaXNfb25lX3NpZGUgPSB0cnVlOwo+ICsJCQlpZiAobGlzdF9lbXB0 eSgmZHVfY21tLT5sdXQubGlzdCkpCj4gKwkJCQlzdGF0LT5kb25lID0gZmFsc2U7Cj4gKwkJfQo+ ICsKPiArCX0gZWxzZSBpZiAoZHVfY21tLT5sdXQucCkgewo+ICsJCS8qIHByZXYgbHV0IHRhYmxl ICovCj4gKwkJc3RhdC0+cCA9IGR1X2NtbS0+bHV0LnA7Cj4gKwkJZHVfY21tLT5sdXQucCA9IE5V TEw7Cj4gKwl9IGVsc2Ugewo+ICsJCXN0YXQtPmRvbmUgPSBmYWxzZTsKPiArCQlzdGF0LT5wID0g TlVMTDsKPiArCQlzdGF0LT50YWJsZV9jb3B5ID0gZHVfY21tLT5sdXQub25lX3NpZGU7Cj4gKwl9 Cj4gKwo+ICsJb25lX3NpZGUoZHVfY21tLCAmZHVfY21tLT5sdXQsIGlzX29uZV9zaWRlKTsKPiAr Cj4gKwlyZXR1cm4gMDsKPiArfQo+ICsKPiArc3RhdGljIGludCBsdXRfdGFibGVfY29weShzdHJ1 Y3QgcmNhcl9kdV9jbW0gKmR1X2NtbSkKPiArewo+ICsJaW50IGk7Cj4gKwl1MzIgc3JjLCBkc3Q7 Cj4gKwo+ICsJaWYgKHJjYXJfZHVfY21tX3JlYWQoZHVfY21tLCBDTTJfQ1RMMSkgJiBDTU1fQ1RM MV9CRlMpIHsKPiArCQlkc3QgPSBDTU1fTFVUX1RCTEEoMCk7Cj4gKwkJc3JjID0gQ01NX0xVVF9U QkxCKDApOwo+ICsJfSBlbHNlIHsKPiArCQlkc3QgPSBDTU1fTFVUX1RCTEIoMCk7Cj4gKwkJc3Jj ID0gQ01NX0xVVF9UQkxBKDApOwo+ICsJfQo+ICsKPiArCWZvciAoaSA9IDA7IGkgPCBDTU1fTFVU X05VTTsgaSsrKSB7Cj4gKwkJcmNhcl9kdV9jbW1fd3JpdGUoZHVfY21tLCBkc3QsIHJjYXJfZHVf Y21tX3JlYWQoZHVfY21tLCBzcmMpKTsKPiArCQlkc3QgKz0gNDsKPiArCQlzcmMgKz0gNDsKPiAr CX0KPiArCj4gKwlyZXR1cm4gMDsKPiArfQo+ICsKPiArLyogc2V0IDFEIGxvb2sgdXAgdGFibGUg Ki8KPiArc3RhdGljIGludCBsdXRfc2V0KHN0cnVjdCByY2FyX2R1X2NtbSAqZHVfY21tLAo+ICsJ CSAgIHN0cnVjdCByY2FyX2R1X2NtbV93b3JrX3N0YXQgKnN0YXQpCj4gK3sKPiArCWludCBpOwo+ ICsJdTMyIGx1dF9iYXNlOwo+ICsJdTMyICpsdXRfYnVmOwo+ICsKPiArCWlmICghc3RhdC0+cCkg ewo+ICsJCWlmIChzdGF0LT50YWJsZV9jb3B5KQo+ICsJCQlsdXRfdGFibGVfY29weShkdV9jbW0p Owo+ICsJCXJldHVybiAwOyAvKiBza2lwICovCj4gKwl9Cj4gKwo+ICsJLyogc2V0IExVVCAqLwo+ ICsJc3dpdGNoIChkdV9jbW0tPmx1dC5idWZfbW9kZSkgewo+ICsJY2FzZSBMVVRfRE9VQkxFX0JV RkZFUl9BOgo+ICsJCWx1dF9iYXNlID0gQ01NX0xVVF9UQkxBKDApOwo+ICsJCWJyZWFrOwo+ICsK PiArCWNhc2UgTFVUX0RPVUJMRV9CVUZGRVJfQVVUTzoKPiArCQlpZiAocmNhcl9kdV9jbW1fcmVh ZChkdV9jbW0sIENNMl9DVEwxKSAmIENNTV9DVEwxX0JGUykgewo+ICsJCQlsdXRfYmFzZSA9IENN TV9MVVRfVEJMQSgwKTsKPiArCQkJYnJlYWs7Cj4gKwkJfQo+ICsJCWx1dF9iYXNlID0gQ01NX0xV VF9UQkxCKDApOwo+ICsJCWJyZWFrOwo+ICsJY2FzZSBMVVRfRE9VQkxFX0JVRkZFUl9COgo+ICsJ CWx1dF9iYXNlID0gQ01NX0xVVF9UQkxCKDApOwo+ICsJCWJyZWFrOwo+ICsKPiArCWRlZmF1bHQ6 Cj4gKwkJcmV0dXJuIC1FSU5WQUw7Cj4gKwl9Cj4gKwo+ICsJbHV0X2J1ZiA9IGdlbV90b192YWRk cihzdGF0LT5wLT5nZW1fb2JqKTsKPiArCWZvciAoaSA9IDA7IGkgPCBDTU1fTFVUX05VTTsgaSsr KQo+ICsJCXJjYXJfZHVfY21tX3dyaXRlKGR1X2NtbSwgbHV0X2Jhc2UgKyBpICogNCwgbHV0X2J1 ZltpXSk7Cj4gKwo+ICsJbGNfZXZlbnRfZG9uZSgmZHVfY21tLT5sdXQsIHN0YXQtPnAsIHN0YXQt PmRvbmUpOwo+ICsKPiArCXJldHVybiAwOwo+ICt9Cj4gKwo+ICsvKiBwb3AgQ0xVIHF1ZSAqLwo+ ICtzdGF0aWMgaW50IGNsdV9wb3BfbG9ja2VkKHN0cnVjdCByY2FyX2R1X2NtbSAqZHVfY21tLAo+ ICsJCQkgIHN0cnVjdCByY2FyX2R1X2NtbV93b3JrX3N0YXQgKnN0YXQpCj4gK3sKPiArCWJvb2wg aXNfb25lX3NpZGUgPSBmYWxzZTsKPiArCj4gKwlzdGF0LT5kb25lID0gdHJ1ZTsKPiArCXN0YXQt PnRhYmxlX2NvcHkgPSBmYWxzZTsKPiArCj4gKwlpZiAoIWxpc3RfZW1wdHkoJmR1X2NtbS0+Y2x1 Lmxpc3QpKSB7Cj4gKwkJc3RhdC0+cCA9IGV2ZW50X3BvcF9sb2NrZWQoJmR1X2NtbS0+Y2x1KTsK PiArCj4gKwkJLyogcHJldiBjbHUgdGFibGUgKi8KPiArCQlldmVudF9wcmV2X2NhbmNlbF9sb2Nr ZWQoJmR1X2NtbS0+Y2x1KTsKPiArCj4gKwkJaWYgKGR1X2NtbS0+Y2x1LmJ1Zl9tb2RlID09IENM VV9ET1VCTEVfQlVGRkVSX0FVVE8pIHsKPiArCQkJaXNfb25lX3NpZGUgPSB0cnVlOwo+ICsJCQlp ZiAobGlzdF9lbXB0eSgmZHVfY21tLT5jbHUubGlzdCkpCj4gKwkJCQlzdGF0LT5kb25lID0gZmFs c2U7Cj4gKwkJfQo+ICsKPiArCX0gZWxzZSBpZiAoZHVfY21tLT5jbHUucCkgewo+ICsJCS8qIHBy ZXYgY2x1IHRhYmxlICovCj4gKwkJc3RhdC0+cCA9IGR1X2NtbS0+Y2x1LnA7Cj4gKwkJZHVfY21t LT5jbHUucCA9IE5VTEw7Cj4gKwl9IGVsc2Ugewo+ICsJCXN0YXQtPmRvbmUgPSBmYWxzZTsKPiAr CQlzdGF0LT5wID0gTlVMTDsKPiArCQlzdGF0LT50YWJsZV9jb3B5ID0gZHVfY21tLT5jbHUub25l X3NpZGU7Cj4gKwl9Cj4gKwo+ICsJb25lX3NpZGUoZHVfY21tLCAmZHVfY21tLT5jbHUsIGlzX29u ZV9zaWRlKTsKPiArCj4gKwlyZXR1cm4gMDsKPiArfQo+ICsKPiArc3RhdGljIGludCBjbHVfdGFi bGVfY29weShzdHJ1Y3QgcmNhcl9kdV9jbW0gKmR1X2NtbSkKPiArewo+ICsJaW50IGksIGosIGs7 Cj4gKwl1MzIgc3JjX2FkZHIsIHNyY19kYXRhLCBkc3RfYWRkciwgZHN0X2RhdGE7Cj4gKwo+ICsJ aWYgKHJjYXJfZHVfY21tX3JlYWQoZHVfY21tLCBDTTJfQ1RMMSkgJiBDTU1fQ1RMMV9CRlMpIHsK PiArCQlkc3RfYWRkciA9IENNTV9DTFVfQUREUjsKPiArCQlkc3RfZGF0YSA9IENNTV9DTFVfREFU QTsKPiArCQlzcmNfYWRkciA9IENNTV9DTFVfQUREUjI7Cj4gKwkJc3JjX2RhdGEgPSBDTU1fQ0xV X0RBVEEyOwo+ICsJfSBlbHNlIHsKPiArCQlkc3RfYWRkciA9IENNTV9DTFVfQUREUjI7Cj4gKwkJ ZHN0X2RhdGEgPSBDTU1fQ0xVX0RBVEEyOwo+ICsJCXNyY19hZGRyID0gQ01NX0NMVV9BRERSOwo+ ICsJCXNyY19kYXRhID0gQ01NX0NMVV9EQVRBOwo+ICsJfQo+ICsKPiArCXJjYXJfZHVfY21tX3dy aXRlKGR1X2NtbSwgZHN0X2FkZHIsIDApOwo+ICsJZm9yIChpID0gMDsgaSA8IDE3OyBpKyspIHsK PiArCQlmb3IgKGogPSAwOyBqIDwgMTc7IGorKykgewo+ICsJCQlmb3IgKGsgPSAwOyBrIDwgMTc7 IGsrKykgewo+ICsJCQkJcmNhcl9kdV9jbW1fd3JpdGUoZHVfY21tLCBzcmNfYWRkciwKPiArCQkJ CQkJICAoayA8PCAxNikgfCAoaiA8PCA4KSB8Cj4gKwkJCQkJCSAgKGkgPDwgMCkpOwo+ICsJCQkJ cmNhcl9kdV9jbW1fd3JpdGUoZHVfY21tLCBkc3RfZGF0YSwKPiArCQkJCQkJICByY2FyX2R1X2Nt bV9yZWFkKGR1X2NtbSwKPiArCQkJCQkJCQkgICBzcmNfZGF0YSkpOwo+ICsJCQl9Cj4gKwkJfQo+ ICsJfQo+ICsKPiArCXJldHVybiAwOwo+ICt9Cj4gKwo+ICsvKiBzZXQgM0QgbG9vayB1cCB0YWJs ZSAqLwo+ICtzdGF0aWMgaW50IGNsdV9zZXQoc3RydWN0IHJjYXJfZHVfY21tICpkdV9jbW0sCj4g KwkJICAgc3RydWN0IHJjYXJfZHVfY21tX3dvcmtfc3RhdCAqc3RhdCkKPiArewo+ICsJaW50IGk7 Cj4gKwl1MzIgYWRkcl9yZWcsIGRhdGFfcmVnOwo+ICsJdTMyICpjbHVfYnVmOwo+ICsKPiArCWlm ICghc3RhdC0+cCkgewo+ICsJCWlmIChzdGF0LT50YWJsZV9jb3B5KQo+ICsJCQljbHVfdGFibGVf Y29weShkdV9jbW0pOwo+ICsJCXJldHVybiAwOyAvKiBza2lwICovCj4gKwl9Cj4gKwo+ICsJLyog c2V0IENMVSAqLwo+ICsJc3dpdGNoIChkdV9jbW0tPmNsdS5idWZfbW9kZSkgewo+ICsJY2FzZSBD TFVfRE9VQkxFX0JVRkZFUl9BOgo+ICsJCWFkZHJfcmVnID0gQ01NX0NMVV9BRERSOwo+ICsJCWRh dGFfcmVnID0gQ01NX0NMVV9EQVRBOwo+ICsJCWJyZWFrOwo+ICsKPiArCWNhc2UgQ0xVX0RPVUJM RV9CVUZGRVJfQVVUTzoKPiArCQlpZiAocmNhcl9kdV9jbW1fcmVhZChkdV9jbW0sIENNMl9DVEwx KSAmIENNTV9DVEwxX0JGUykgewo+ICsJCQlhZGRyX3JlZyA9IENNTV9DTFVfQUREUjsKPiArCQkJ ZGF0YV9yZWcgPSBDTU1fQ0xVX0RBVEE7Cj4gKwkJCWJyZWFrOwo+ICsJCX0KPiArCQlhZGRyX3Jl ZyA9IENNTV9DTFVfQUREUjI7Cj4gKwkJZGF0YV9yZWcgPSBDTU1fQ0xVX0RBVEEyOwo+ICsJCWJy ZWFrOwo+ICsJY2FzZSBDTFVfRE9VQkxFX0JVRkZFUl9COgo+ICsJCWFkZHJfcmVnID0gQ01NX0NM VV9BRERSMjsKPiArCQlkYXRhX3JlZyA9IENNTV9DTFVfREFUQTI7Cj4gKwkJYnJlYWs7Cj4gKwo+ ICsJZGVmYXVsdDoKPiArCQlyZXR1cm4gLUVJTlZBTDsKPiArCX0KPiArCj4gKwljbHVfYnVmID0g Z2VtX3RvX3ZhZGRyKHN0YXQtPnAtPmdlbV9vYmopOwo+ICsJcmNhcl9kdV9jbW1fd3JpdGUoZHVf Y21tLCBhZGRyX3JlZywgMCk7Cj4gKwlmb3IgKGkgPSAwOyBpIDwgQ01NX0NMVV9OVU07IGkrKykK PiArCQlyY2FyX2R1X2NtbV93cml0ZShkdV9jbW0sIGRhdGFfcmVnLCBjbHVfYnVmW2ldKTsKPiAr Cj4gKwlsY19ldmVudF9kb25lKCZkdV9jbW0tPmNsdSwgc3RhdC0+cCwgc3RhdC0+ZG9uZSk7Cj4g Kwo+ICsJcmV0dXJuIDA7Cj4gK30KPiArCj4gKy8qIHBvcCBIR08gcXVlICovCj4gK3N0YXRpYyBp bnQgaGdvX3BvcF9sb2NrZWQoc3RydWN0IHJjYXJfZHVfY21tICpkdV9jbW0sCj4gKwkJCSAgc3Ry dWN0IHJjYXJfZHVfY21tX3dvcmtfc3RhdCAqc3RhdCkKPiArewo+ICsJc3RydWN0IHJjYXJfZHVf Y21tX3BlbmRpbmdfZXZlbnQgKl9wID0gTlVMTDsKPiArCj4gKwlpZiAoIWxpc3RfZW1wdHkoJmR1 X2NtbS0+aGdvLmxpc3QpKQo+ICsJCV9wID0gZXZlbnRfcG9wX2xvY2tlZCgmZHVfY21tLT5oZ28p Owo+ICsKPiArCWlmIChkdV9jbW0tPmhnby5yZXNldCkgewo+ICsJCWRybV9jcnRjX3ZibGFua19w dXQoJmR1X2NtbS0+cmNydGMtPmNydGMpOwo+ICsJCWR1X2NtbS0+aGdvLnJlc2V0ID0gMDsKPiAr CQlzdGF0LT5yZXNldCA9IHRydWU7Cj4gKwl9IGVsc2Ugewo+ICsJCXN0YXQtPnJlc2V0ID0gZmFs c2U7Cj4gKwl9Cj4gKwo+ICsJc3RhdC0+cDIgPSBfcDsKPiArCj4gKwlyZXR1cm4gMDsKPiArfQo+ ICsKPiArLyogZ2V0IGhpc3RvZ3JhbSAqLwo+ICtzdGF0aWMgaW50IGhnb19nZXQoc3RydWN0IHJj YXJfZHVfY21tICpkdV9jbW0sCj4gKwkJICAgc3RydWN0IHJjYXJfZHVfY21tX3dvcmtfc3RhdCAq c3RhdCkKPiArewo+ICsJaW50IGksIGo7Cj4gKwljb25zdCB1MzIgaGlzdG9fb2Zmc2V0WzNdID0g ewo+ICsJCUNNTV9IR09fUl9ISVNUTygwKSwKPiArCQlDTU1fSEdPX0dfSElTVE8oMCksCj4gKwkJ Q01NX0hHT19CX0hJU1RPKDApLAo+ICsJfTsKPiArCXZvaWQgKnZhZGRyOwo+ICsKPiArCWlmICgh c3RhdC0+cDIpIHsKPiArCQlpZiAoc3RhdC0+cmVzZXQpCj4gKwkJCWdvdG8gaGdvX3Jlc2V0Owo+ ICsKPiArCQlyZXR1cm4gMDsgLyogc2tpcCAqLwo+ICsJfQo+ICsKPiArCXZhZGRyID0gZ2VtX3Rv X3ZhZGRyKHN0YXQtPnAyLT5nZW1fb2JqKTsKPiArCWZvciAoaSA9IDA7IGkgPCAzOyBpKyspIHsK PiArCQl1MzIgKmhnb19idWYgPSB2YWRkciArIENNTV9IR09fTlVNICogNCAqIGk7Cj4gKwo+ICsJ CWZvciAoaiA9IDA7IGogPCBDTU1fSEdPX05VTTsgaisrKQo+ICsJCQloZ29fYnVmW2pdID0gcmNh cl9kdV9jbW1fcmVhZChkdV9jbW0sCj4gKwkJCQkJCSAgICAgIGhpc3RvX29mZnNldFtpXSArIGog KiA0KTsKPiArCX0KPiArCj4gKwlldmVudF9kb25lKHN0YXQtPnAyKTsKPiArCj4gK2hnb19yZXNl dDoKPiArCXJjYXJfZHVfY21tX3dyaXRlKGR1X2NtbSwgQ01NX0hHT19SRUdSU1QsIENNTV9IR09f UkVHUlNUX1JDTEVBKTsKPiArCj4gKwlyZXR1cm4gMDsKPiArfQo+ICsKPiArc3RhdGljIGJvb2wg ZHVfY21tX3ZzeW5jX2dldChzdHJ1Y3QgcmNhcl9kdV9jbW0gKmR1X2NtbSkKPiArewo+ICsJdW5z aWduZWQgbG9uZyBmbGFnczsKPiArCWJvb2wgdnN5bmM7Cj4gKwo+ICsJc3Bpbl9sb2NrX2lycXNh dmUoJmNtbV9kaXJlY3RfbG9jaywgZmxhZ3MpOwo+ICsJdnN5bmMgPSBkdV9jbW0tPnZzeW5jOwo+ ICsJZHVfY21tLT52c3luYyA9IGZhbHNlOwo+ICsJc3Bpbl91bmxvY2tfaXJxcmVzdG9yZSgmY21t X2RpcmVjdF9sb2NrLCBmbGFncyk7Cj4gKwo+ICsJcmV0dXJuIHZzeW5jOwo+ICt9Cj4gKwo+ICtz dGF0aWMgdm9pZCBkdV9jbW1fdnN5bmNfc2V0KHN0cnVjdCByY2FyX2R1X2NtbSAqZHVfY21tLCBi b29sIHZzeW5jKQo+ICt7Cj4gKwl1bnNpZ25lZCBsb25nIGZsYWdzOwo+ICsKPiArCXNwaW5fbG9j a19pcnFzYXZlKCZjbW1fZGlyZWN0X2xvY2ssIGZsYWdzKTsKPiArCWR1X2NtbS0+dnN5bmMgPSB2 c3luYzsKPiArCXNwaW5fdW5sb2NrX2lycXJlc3RvcmUoJmNtbV9kaXJlY3RfbG9jaywgZmxhZ3Mp Owo+ICt9Cj4gKwo+ICtzdGF0aWMgdm9pZCBkdV9jbW1fd29yayhzdHJ1Y3Qgd29ya19zdHJ1Y3Qg KndvcmspCj4gK3sKPiArCXN0cnVjdCByY2FyX2R1X2NtbSAqZHVfY21tID0KPiArCQkJY29udGFp bmVyX29mKHdvcmssIHN0cnVjdCByY2FyX2R1X2NtbSwgd29yayk7Cj4gKwlzdHJ1Y3QgcmNhcl9k dV9jbW1fd29ya19zdGF0IHNfbHV0Owo+ICsJc3RydWN0IHJjYXJfZHVfY21tX3dvcmtfc3RhdCBz X2NsdTsKPiArCXN0cnVjdCByY2FyX2R1X2NtbV93b3JrX3N0YXQgc19oZ287Cj4gKyNpZmRlZiBE RUJVR19QUk9DRV9USU1FCj4gKwlzdHJ1Y3QgdGltZXZhbCBzdGFydF90aW1lLCBlbmRfdGltZTsK PiArCXVuc2lnbmVkIGxvbmcgbHV0X3RpbWUsIGNsdV90aW1lLCBoZ29fdGltZTsKPiArI2VuZGlm Cj4gKwlib29sIHZzeW5jX3N0YXR1cyA9IGZhbHNlOwo+ICsKPiArCW1lbXNldCgmc19sdXQsIDAs IHNpemVvZihzdHJ1Y3QgcmNhcl9kdV9jbW1fd29ya19zdGF0KSk7Cj4gKwltZW1zZXQoJnNfY2x1 LCAwLCBzaXplb2Yoc3RydWN0IHJjYXJfZHVfY21tX3dvcmtfc3RhdCkpOwo+ICsJbWVtc2V0KCZz X2hnbywgMCwgc2l6ZW9mKHN0cnVjdCByY2FyX2R1X2NtbV93b3JrX3N0YXQpKTsKPiArCj4gKwl2 c3luY19zdGF0dXMgPSBkdV9jbW1fdnN5bmNfZ2V0KGR1X2NtbSk7Cj4gKwo+ICsJbXV0ZXhfbG9j aygmY21tX2V2ZW50X2xvY2spOwo+ICsKPiArCWx1dF9wb3BfbG9ja2VkKGR1X2NtbSwgJnNfbHV0 KTsKPiArCWNsdV9wb3BfbG9ja2VkKGR1X2NtbSwgJnNfY2x1KTsKPiArCWlmICh2c3luY19zdGF0 dXMpCj4gKwkJaGdvX3BvcF9sb2NrZWQoZHVfY21tLCAmc19oZ28pOwo+ICsKPiArCW11dGV4X3Vu bG9jaygmY21tX2V2ZW50X2xvY2spOwo+ICsKPiArCS8qIHNldCBMVVQgKi8KPiArI2lmZGVmIERF QlVHX1BST0NFX1RJTUUKPiArCWRvX2dldHRpbWVvZmRheSgmc3RhcnRfdGltZSk7Cj4gKyNlbmRp Zgo+ICsJbHV0X3NldChkdV9jbW0sICZzX2x1dCk7Cj4gKyNpZmRlZiBERUJVR19QUk9DRV9USU1F Cj4gKwlkb19nZXR0aW1lb2ZkYXkoJmVuZF90aW1lKTsKPiArCWx1dF90aW1lID0gKGxvbmcpZGlm Zl90aW1ldmFscygmc3RhcnRfdGltZSwgJmVuZF90aW1lKTsKPiArI2VuZGlmCj4gKwo+ICsJLyog c2V0IENMVSAqLwo+ICsjaWZkZWYgREVCVUdfUFJPQ0VfVElNRQo+ICsJZG9fZ2V0dGltZW9mZGF5 KCZzdGFydF90aW1lKTsKPiArI2VuZGlmCj4gKwljbHVfc2V0KGR1X2NtbSwgJnNfY2x1KTsKPiAr I2lmZGVmIERFQlVHX1BST0NFX1RJTUUKPiArCWRvX2dldHRpbWVvZmRheSgmZW5kX3RpbWUpOwo+ ICsJY2x1X3RpbWUgPSAobG9uZylkaWZmX3RpbWV2YWxzKCZzdGFydF90aW1lLCAmZW5kX3RpbWUp Owo+ICsjZW5kaWYKPiArCj4gKwkvKiBnZXQgSEdPICovCj4gKyNpZmRlZiBERUJVR19QUk9DRV9U SU1FCj4gKwlkb19nZXR0aW1lb2ZkYXkoJnN0YXJ0X3RpbWUpOwo+ICsjZW5kaWYKPiArCWlmICh2 c3luY19zdGF0dXMpCj4gKwkJaGdvX2dldChkdV9jbW0sICZzX2hnbyk7Cj4gKyNpZmRlZiBERUJV R19QUk9DRV9USU1FCj4gKwlkb19nZXR0aW1lb2ZkYXkoJmVuZF90aW1lKTsKPiArCWhnb190aW1l ID0gKGxvbmcpZGlmZl90aW1ldmFscygmc3RhcnRfdGltZSwgJmVuZF90aW1lKTsKPiArI2VuZGlm Cj4gKwo+ICsjaWZkZWYgQ09ORklHX1BNX1NMRUVQCj4gKwl3YWtlX3VwX2ludGVycnVwdGlibGUo JmR1X2NtbS0+cmVnX3NhdmUud2FpdCk7Cj4gKyNlbmRpZiAvKiBDT05GSUdfUE1fU0xFRVAgKi8K PiArCj4gKyNpZmRlZiBERUJVR19QUk9DRV9USU1FCj4gKwl7Cj4gKwkJc3RydWN0IHJjYXJfZHVf ZGV2aWNlICpyY2R1ID0gZHVfY21tLT5yY3J0Yy0+Z3JvdXAtPmRldjsKPiArCj4gKwkJaWYgKHNf bHV0LnApCj4gKwkJCWRldl9pbmZvKHJjZHUtPmRldiwgIkxVVCAlbGQgdXNlYy5cbiIsIGx1dF90 aW1lKTsKPiArCQlpZiAoc19jbHUucCkKPiArCQkJZGV2X2luZm8ocmNkdS0+ZGV2LCAiTFVUICVs ZCB1c2VjLlxuIiwgY2x1X3RpbWUpOwo+ICsJCWlmIChzX2hnby5wMikKPiArCQkJZGV2X2luZm8o cmNkdS0+ZGV2LCAiSEdPICVsZCB1c2VjLlxuIiwgaGdvX3RpbWUpOwo+ICsJfQo+ICsjZW5kaWYK PiArfQo+ICsKPiArc3RhdGljIGludCBkdV9jbW1fcXVlX2VtcHR5KHN0cnVjdCByY2FyX2R1X2Nt bSAqZHVfY21tKQo+ICt7Cj4gKwlpZiAobGlzdF9lbXB0eSgmZHVfY21tLT5sdXQubGlzdCkgJiYg IWR1X2NtbS0+bHV0LnAgJiYKPiArCSAgICAhZHVfY21tLT5sdXQub25lX3NpZGUgJiYKPiArCSAg ICBsaXN0X2VtcHR5KCZkdV9jbW0tPmNsdS5saXN0KSAmJiAhZHVfY21tLT5jbHUucCAmJgo+ICsJ ICAgICFkdV9jbW0tPmNsdS5vbmVfc2lkZSAmJgo+ICsJICAgIGxpc3RfZW1wdHkoJmR1X2NtbS0+ aGdvLmxpc3QpICYmICFkdV9jbW0tPmhnby5yZXNldCkKPiArCQlyZXR1cm4gMTsKPiArCj4gKwly ZXR1cm4gMDsKPiArfQo+ICsKPiArdm9pZCByY2FyX2R1X2NtbV9raWNrKHN0cnVjdCByY2FyX2R1 X2NydGMgKnJjcnRjKQo+ICt7Cj4gKwlzdHJ1Y3QgcmNhcl9kdV9jbW0gKmR1X2NtbSA9IHJjcnRj LT5jbW1faGFuZGxlOwo+ICsKPiArCWlmICghZHVfY21tKQo+ICsJCXJldHVybjsKPiArCj4gKwlp ZiAoIWR1X2NtbS0+YWN0aXZlKQo+ICsJCXJldHVybjsKPiArCj4gKwlpZiAoIWR1X2NtbV9xdWVf ZW1wdHkoZHVfY21tKSkgewo+ICsJCWR1X2NtbV92c3luY19zZXQoZHVfY21tLCB0cnVlKTsKPiAr CQlxdWV1ZV93b3JrKGR1X2NtbS0+d29ya3F1ZXVlLCAmZHVfY21tLT53b3JrKTsKPiArCX0KPiAr fQo+ICsKPiArI2lmZGVmIENPTkZJR19QTV9TTEVFUAo+ICtpbnQgcmNhcl9kdV9jbW1fcG1fc3Vz cGVuZChzdHJ1Y3QgcmNhcl9kdV9jcnRjICpyY3J0YykKPiArewo+ICsJc3RydWN0IHJjYXJfZHVf Y21tICpkdV9jbW0gPSByY3J0Yy0+Y21tX2hhbmRsZTsKPiArCXN0cnVjdCByY2FyX2R1X2Rldmlj ZSAqcmNkdSA9IHJjcnRjLT5ncm91cC0+ZGV2Owo+ICsJaW50IGksIGosIGssIGluZGV4Owo+ICsJ aW50IHJldDsKPiArCj4gKwlpZiAoIWR1X2NtbSkKPiArCQlyZXR1cm4gMDsKPiArCj4gKwlyZXQg PSB3YWl0X2V2ZW50X3RpbWVvdXQoZHVfY21tLT5yZWdfc2F2ZS53YWl0LAo+ICsJCQkJIGR1X2Nt bV9xdWVfZW1wdHkoZHVfY21tKSwKPiArCQkJCSBtc2Vjc190b19qaWZmaWVzKDUwMCkpOwo+ICsJ aWYgKHJldCA9PSAwKQo+ICsJCWRldl9lcnIocmNkdS0+ZGV2LCAicmNhci1kdSBjbW0gc3VzcGVu ZCA6IHRpbWVvdXRcbiIpOwo+ICsKPiArCWlmICghZHVfY21tLT5pbml0KQo+ICsJCXJldHVybiAw Owo+ICsKPiArCWR1X2NtbS0+aW5pdCA9IGZhbHNlOwo+ICsKPiArCWlmICghZHVfY21tLT5hY3Rp dmUpCj4gKwkJZHVfY21tX2NsayhkdV9jbW0sIHRydWUpOwo+ICsKPiArCS8qIHRhYmxlIHNhdmUg Ki8KPiArCWZvciAoaSA9IDA7IGkgPCBDTU1fTFVUX05VTTsgaSsrKSB7Cj4gKwkJZHVfY21tLT5y ZWdfc2F2ZS5sdXRfdGFibGVbaV0gPQo+ICsJCQlyY2FyX2R1X2NtbV9yZWFkKGR1X2NtbSwgQ01N X0xVVF9UQkxBKGkpKTsKPiArCX0KPiArCj4gKwlpbmRleCA9IDA7Cj4gKwlmb3IgKGkgPSAwOyBp IDwgMTc7IGkrKykgewo+ICsJCWZvciAoaiA9IDA7IGogPCAxNzsgaisrKSB7Cj4gKwkJCWZvciAo ayA9IDA7IGsgPCAxNzsgaysrKSB7Cj4gKwkJCQlyY2FyX2R1X2NtbV93cml0ZShkdV9jbW0sIENN TV9DTFVfQUREUiwKPiArCQkJCQkJICAoayA8PCAxNikgfCAoaiA8PCA4KSB8Cj4gKwkJCQkJCSAg KGkgPDwgMCkpOwo+ICsJCQkJZHVfY21tLT5yZWdfc2F2ZS5jbHVfdGFibGVbaW5kZXgrK10gPQo+ ICsJCQkJCXJjYXJfZHVfY21tX3JlYWQoZHVfY21tLCBDTU1fQ0xVX0RBVEEpOwo+ICsJCQl9Cj4g KwkJfQo+ICsJfQo+ICsKPiArCWlmICghZHVfY21tLT5hY3RpdmUpCj4gKwkJZHVfY21tX2Nsayhk dV9jbW0sIGZhbHNlKTsKPiArCj4gKwlyZXR1cm4gMDsKPiArfQo+ICsKPiAraW50IHJjYXJfZHVf Y21tX3BtX3Jlc3VtZShzdHJ1Y3QgcmNhcl9kdV9jcnRjICpyY3J0YykKPiArewo+ICsJLyogbm9u ZSAqLwo+ICsJcmV0dXJuIDA7Cj4gK30KPiArI2VuZGlmIC8qIENPTkZJR19QTV9TTEVFUCAqLwo+ ICsKPiAraW50IHJjYXJfZHVfY21tX2RyaXZlcl9vcGVuKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYs IHN0cnVjdCBkcm1fZmlsZSAqZmlsZV9wcml2KQo+ICt7Cj4gKwlzdHJ1Y3QgcmNhcl9kdV9kZXZp Y2UgKnJjZHUgPSBkZXYtPmRldl9wcml2YXRlOwo+ICsJc3RydWN0IHJjYXJfZHVfY21tX2ZpbGVf cHJpdiAqZnByaXY7Cj4gKwlpbnQgaTsKPiArCj4gKwlpZiAoIXJjYXJfZHVfaGFzKHJjZHUsIFJD QVJfRFVfRkVBVFVSRV9DTU0pKQo+ICsJCXJldHVybiAwOwo+ICsKPiArCWZpbGVfcHJpdi0+ZHJp dmVyX3ByaXYgPSBOVUxMOwo+ICsKPiArCWZwcml2ID0ga3phbGxvYyhzaXplb2YoKmZwcml2KSwg R0ZQX0tFUk5FTCk7Cj4gKwlpZiAodW5saWtlbHkoIWZwcml2KSkKPiArCQlyZXR1cm4gLUVOT01F TTsKPiArCj4gKwlmcHJpdi0+ZG9uZV9saXN0ID0ga2NhbGxvYyhyY2R1LT5pbmZvLT5udW1fY3J0 Y3MsCj4gKwkJCQkgICBzaXplb2YoKmZwcml2LT5kb25lX2xpc3QpLAo+ICsJCQkJICAgR0ZQX0tF Uk5FTCk7Cj4gKwlpZiAodW5saWtlbHkoIWZwcml2LT5kb25lX2xpc3QpKSB7Cj4gKwkJa2ZyZWUo ZnByaXYpOwo+ICsJCXJldHVybiAtRU5PTUVNOwo+ICsJfQo+ICsKPiArCWluaXRfd2FpdHF1ZXVl X2hlYWQoJmZwcml2LT5ldmVudF93YWl0KTsKPiArCUlOSVRfTElTVF9IRUFEKCZmcHJpdi0+bGlz dCk7Cj4gKwlJTklUX0xJU1RfSEVBRCgmZnByaXYtPmFjdGl2ZV9saXN0KTsKPiArCWZvciAoaSA9 IDA7IGkgPCByY2R1LT5pbmZvLT5udW1fY3J0Y3M7IGkrKykKPiArCQlJTklUX0xJU1RfSEVBRCgm ZnByaXYtPmRvbmVfbGlzdFtpXSk7Cj4gKwo+ICsJZmlsZV9wcml2LT5kcml2ZXJfcHJpdiA9IGZw cml2Owo+ICsKPiArCXJldHVybiAwOwo+ICt9Cj4gKwo+ICt2b2lkIHJjYXJfZHVfY21tX3Bvc3Rj bG9zZShzdHJ1Y3QgZHJtX2RldmljZSAqZGV2LCBzdHJ1Y3QgZHJtX2ZpbGUgKmZpbGVfcHJpdikK PiArewo+ICsJc3RydWN0IHJjYXJfZHVfZGV2aWNlICpyY2R1ID0gZGV2LT5kZXZfcHJpdmF0ZTsK PiArCXN0cnVjdCByY2FyX2R1X2NtbV9maWxlX3ByaXYgKmZwcml2ID0gZmlsZV9wcml2LT5kcml2 ZXJfcHJpdjsKPiArCXN0cnVjdCByY2FyX2R1X2NtbV9wZW5kaW5nX2V2ZW50ICpwLCAqcHQ7Cj4g KwlzdHJ1Y3QgcmNhcl9kdV9jcnRjICpyY3J0YzsKPiArCXN0cnVjdCByY2FyX2R1X2NtbSAqZHVf Y21tOwo+ICsJaW50IGksIGNydGNzX2NudCwgcmV0Owo+ICsJdTMyIHRhYmxlX2RhdGE7Cj4gKwo+ ICsJaWYgKCFyY2FyX2R1X2hhcyhyY2R1LCBSQ0FSX0RVX0ZFQVRVUkVfQ01NKSkKPiArCQlyZXR1 cm47Cj4gKwo+ICsJbXV0ZXhfbG9jaygmY21tX2V2ZW50X2xvY2spOwo+ICsKPiArCS8qIFVubGlu ayBmaWxlIHByaXYgZXZlbnRzICovCj4gKwlsaXN0X2Zvcl9lYWNoX2VudHJ5X3NhZmUocCwgcHQs ICZmcHJpdi0+bGlzdCwgZnByaXZfbGluaykgewo+ICsJCWxpc3RfZGVsKCZwLT5mcHJpdl9saW5r KTsKPiArCQlsaXN0X2RlbCgmcC0+bGluayk7Cj4gKwkJc3dpdGNoIChwLT5zdGF0KSB7Cj4gKwkJ Y2FzZSBRVUVfU1RBVF9QRU5ESU5HOgo+ICsJCQljbW1fdmJsYW5rX3B1dChwKTsKPiArCQkJY21t X2dlbV9vYmplY3RfdW5yZWZlcmVuY2UocCk7Cj4gKwkJCWtmcmVlKHApOwo+ICsJCQlicmVhazsK PiArCQljYXNlIFFVRV9TVEFUX0RPTkU6Cj4gKwkJCWtmcmVlKHApOwo+ICsJCQlicmVhazsKPiAr CQljYXNlIFFVRV9TVEFUX0FDVElWRToKPiArCQkJcC0+ZnByaXYgPSBOVUxMOwo+ICsJCQlicmVh azsKPiArCQl9Cj4gKwl9Cj4gKwo+ICsJbXV0ZXhfdW5sb2NrKCZjbW1fZXZlbnRfbG9jayk7Cj4g Kwo+ICsJa2ZyZWUoZnByaXYtPmRvbmVfbGlzdCk7Cj4gKwlrZnJlZShmcHJpdik7Cj4gKwlmaWxl X3ByaXYtPmRyaXZlcl9wcml2ID0gTlVMTDsKPiArCj4gKwlmb3IgKGNydGNzX2NudCA9IDA7IGNy dGNzX2NudCA8IHJjZHUtPm51bV9jcnRjczsgY3J0Y3NfY250KyspIHsKPiArCQlyY3J0YyA9ICZy Y2R1LT5jcnRjc1tjcnRjc19jbnRdOwo+ICsJCWR1X2NtbSA9IHJjcnRjLT5jbW1faGFuZGxlOwo+ ICsJCWlmIChkdV9jbW0tPmF1dGhvcml0eSAmJiBkdV9jbW0tPnBpZCA9PSB0YXNrX3BpZF9ucihj dXJyZW50KSkgewo+ICsJCQlkdV9jbW0tPmF1dGhvcml0eSA9IGZhbHNlOwo+ICsJCQlkdV9jbW0t PnBpZCA9IDA7Cj4gKwkJCXJldCA9IHdhaXRfZXZlbnRfdGltZW91dChkdV9jbW0tPnJlZ19zYXZl LndhaXQsCj4gKwkJCQkJCSBkdV9jbW1fcXVlX2VtcHR5KGR1X2NtbSksCj4gKwkJCQkJCSBtc2Vj c190b19qaWZmaWVzKDUwMCkpOwo+ICsJCQlpZiAocmV0ID09IDApCj4gKwkJCQlkZXZfZXJyKHJj ZHUtPmRldiwgInJjYXItZHUgY21tIGNsb3NlIDogdGltZW91dFxuIik7Cj4gKwo+ICsJCQlmb3Ig KGkgPSAwOyBpIDwgQ01NX0xVVF9OVU07IGkrKykKPiArCQkJCWR1X2NtbS0+cmVnX3NhdmUubHV0 X3RhYmxlW2ldID0gKGkgPDwgMTYpIHwKPiArCQkJCQkJCQkoaSA8PCA4KSB8Cj4gKwkJCQkJCQkJ KGkgPDwgMCk7Cj4gKwo+ICsJCQlmb3IgKGkgPSAwOyBpIDwgQ01NX0NMVV9OVU07IGkrKykgewo+ ICsJCQkJZHVfY21tLT5yZWdfc2F2ZS5jbHVfdGFibGVbaV0gPQo+ICsJCQkJCQkJaW5kZXhfdG9f Y2x1X2RhdGEoaSk7Cj4gKwkJCX0KPiArCj4gKwkJCWZvciAoaSA9IDA7IGkgPCBDTU1fTFVUX05V TTsgaSsrKSB7Cj4gKyNpZmRlZiBDT05GSUdfUE1fU0xFRVAKPiArCQkJCXRhYmxlX2RhdGEgPSBk dV9jbW0tPnJlZ19zYXZlLmx1dF90YWJsZVtpXTsKPiArI2Vsc2UKPiArCQkJCXRhYmxlX2RhdGEg PSAoKGkgPDwgMTYpIHwgKGkgPDwgOCkgfCAoaSA8PCAwKSk7Cj4gKyNlbmRpZiAvKiBDT05GSUdf UE1fU0xFRVAgKi8KPiArCQkJCXJjYXJfZHVfY21tX3dyaXRlKGR1X2NtbSwgQ01NX0xVVF9UQkxB KGkpLAo+ICsJCQkJCQkgIHRhYmxlX2RhdGEpOwo+ICsJCQkJaWYgKGR1X2NtbS0+ZGJ1Zikgewo+ ICsJCQkJCXJjYXJfZHVfY21tX3dyaXRlKGR1X2NtbSwKPiArCQkJCQkJCSAgQ01NX0xVVF9UQkxC KGkpLAo+ICsJCQkJCQkJICB0YWJsZV9kYXRhKTsKPiArCQkJCX0KPiArCQkJfQo+ICsKPiArCQkJ Zm9yIChpID0gMDsgaSA8IENNTV9DTFVfTlVNOyBpKyspIHsKPiArI2lmZGVmIENPTkZJR19QTV9T TEVFUAo+ICsJCQkJdGFibGVfZGF0YSA9IGR1X2NtbS0+cmVnX3NhdmUuY2x1X3RhYmxlW2ldOwo+ ICsjZWxzZQo+ICsJCQkJdGFibGVfZGF0YSA9IGluZGV4X3RvX2NsdV9kYXRhKGkpOwo+ICsjZW5k aWYgLyogQ09ORklHX1BNX1NMRUVQICovCj4gKwkJCQlyY2FyX2R1X2NtbV93cml0ZShkdV9jbW0s IENNTV9DTFVfREFUQSwKPiArCQkJCQkJICB0YWJsZV9kYXRhKTsKPiArCj4gKwkJCQlpZiAoZHVf Y21tLT5kYnVmKSB7Cj4gKwkJCQkJcmNhcl9kdV9jbW1fd3JpdGUoZHVfY21tLCBDTU1fQ0xVX0RB VEEyLAo+ICsJCQkJCQkJICB0YWJsZV9kYXRhKTsKPiArCQkJCX0KPiArCQkJfQo+ICsJCX0KPiAr CX0KPiArfQo+ICsKPiAraW50IHJjYXJfZHVfY21tX2luaXQoc3RydWN0IHJjYXJfZHVfY3J0YyAq cmNydGMpCj4gK3sKPiArCXN0cnVjdCByY2FyX2R1X2NtbSAqZHVfY21tOwo+ICsJaW50IHJldDsK PiArCWludCBpOwo+ICsJc3RydWN0IHJjYXJfZHVfZGV2aWNlICpyY2R1ID0gcmNydGMtPmdyb3Vw LT5kZXY7Cj4gKwljaGFyIG5hbWVbNjRdOwo+ICsJc3RydWN0IHJlc291cmNlICptZW07Cj4gKwo+ ICsJaWYgKCFyY2FyX2R1X2hhcyhyY2R1LCBSQ0FSX0RVX0ZFQVRVUkVfQ01NKSkKPiArCQlyZXR1 cm4gMDsKPiArCj4gKwlkdV9jbW0gPSBkZXZtX2t6YWxsb2MocmNkdS0+ZGV2LCBzaXplb2YoKmR1 X2NtbSksIEdGUF9LRVJORUwpOwo+ICsJaWYgKCFkdV9jbW0pIHsKPiArCQlyZXQgPSAtRU5PTUVN Owo+ICsJCWdvdG8gZXJyb3JfYWxsb2M7Cj4gKwl9Cj4gKwo+ICsJLyogRFUtQ01NIG1hcHBpbmcg Ki8KPiArCXNwcmludGYobmFtZSwgImNtbS4ldSIsIHJjcnRjLT5pbmRleCk7Cj4gKwltZW0gPSBw bGF0Zm9ybV9nZXRfcmVzb3VyY2VfYnluYW1lKHRvX3BsYXRmb3JtX2RldmljZShyY2R1LT5kZXYp LAo+ICsJCQkJCSAgIElPUkVTT1VSQ0VfTUVNLCBuYW1lKTsKPiArCWlmICghbWVtKSB7Cj4gKwkJ ZGV2X2VycihyY2R1LT5kZXYsICJyY2FyLWR1IGNtbSBpbml0IDogZmFpbGVkIHRvIGdldCBtZW1v cnkgcmVzb3VyY2VcbiIpOwo+ICsJCXJldCA9IC1FSU5WQUw7Cj4gKwkJZ290byBlcnJvcl9tYXBw aW5nX2NtbTsKPiArCX0KPiArCWR1X2NtbS0+Y21tX2Jhc2UgPSBkZXZtX2lvcmVtYXBfbm9jYWNo ZShyY2R1LT5kZXYsIG1lbS0+c3RhcnQsCj4gKwkJCQkJCXJlc291cmNlX3NpemUobWVtKSk7Cj4g KwlpZiAoIWR1X2NtbS0+Y21tX2Jhc2UpIHsKPiArCQlkZXZfZXJyKHJjZHUtPmRldiwgInJjYXIt ZHUgY21tIGluaXQgOiBmYWlsZWQgdG8gbWFwIGlvbWVtXG4iKTsKPiArCQlyZXQgPSAtRUlOVkFM Owo+ICsJCWdvdG8gZXJyb3JfbWFwcGluZ19jbW07Cj4gKwl9Cj4gKwlkdV9jbW0tPmNsb2NrID0g ZGV2bV9jbGtfZ2V0KHJjZHUtPmRldiwgbmFtZSk7Cj4gKwlpZiAoSVNfRVJSKGR1X2NtbS0+Y2xv Y2spKSB7Cj4gKwkJZGV2X2VycihyY2R1LT5kZXYsICJmYWlsZWQgdG8gZ2V0IGNsb2NrXG4iKTsK PiArCQlyZXQgPSBQVFJfRVJSKGR1X2NtbS0+Y2xvY2spOwo+ICsJCWdvdG8gZXJyb3JfY2xvY2tf Y21tOwo+ICsJfQo+ICsKPiArCWR1X2NtbS0+cmNydGMgPSByY3J0YzsKPiArCj4gKwlkdV9jbW0t PnJlZ19zYXZlLmNtMl9jdGwwID0gMDsKPiArCWR1X2NtbS0+cmVnX3NhdmUuaGdvX29mZnNldCA9 IDA7Cj4gKwlkdV9jbW0tPnJlZ19zYXZlLmhnb19zaXplID0gMDsKPiArCWR1X2NtbS0+cmVnX3Nh dmUuaGdvX21vZGUgPSAwOwo+ICsKPiArCWR1X2NtbS0+ZGJ1ZiA9IHJjYXJfZHVfaGFzKHJjZHUs IFJDQVJfRFVfRkVBVFVSRV9DTU1fTFVUX0RCVUYpOwo+ICsJaWYgKGR1X2NtbS0+ZGJ1Zikgewo+ ICsJCWR1X2NtbS0+bHV0LmJ1Zl9tb2RlID0gTFVUX0RPVUJMRV9CVUZGRVJfQVVUTzsKPiArCQlk dV9jbW0tPnJlZ19zYXZlLmNtMl9jdGwwIHw9IENNTV9DVEwwX0RCVUY7Cj4gKwl9IGVsc2Ugewo+ ICsJCWRldl9lcnIocmNkdS0+ZGV2LCAic2luZ2xlIGJ1ZmZlciBpcyBub3Qgc3VwcG9ydGVkLlxu Iik7Cj4gKwkJZHVfY21tLT5kYnVmID0gdHJ1ZTsKPiArCQlkdV9jbW0tPmx1dC5idWZfbW9kZSA9 IExVVF9ET1VCTEVfQlVGRkVSX0FVVE87Cj4gKwkJZHVfY21tLT5yZWdfc2F2ZS5jbTJfY3RsMCB8 PSBDTU1fQ1RMMF9EQlVGOwo+ICsJfQo+ICsKPiArCWR1X2NtbS0+Y2x1X2RidWYgPSByY2FyX2R1 X2hhcyhyY2R1LCBSQ0FSX0RVX0ZFQVRVUkVfQ01NX0NMVV9EQlVGKTsKPiArCWlmIChkdV9jbW0t PmNsdV9kYnVmKSB7Cj4gKwkJZHVfY21tLT5jbHUuYnVmX21vZGUgPSBDTFVfRE9VQkxFX0JVRkZF Ul9BVVRPOwo+ICsJCWR1X2NtbS0+cmVnX3NhdmUuY20yX2N0bDAgfD0gQ01NX0NUTDBfQ0xVREI7 Cj4gKwl9IGVsc2Ugewo+ICsJCWRldl9lcnIocmNkdS0+ZGV2LCAic2luZ2xlIGJ1ZmZlciBpcyBu b3Qgc3VwcG9ydGVkLlxuIik7Cj4gKwkJZHVfY21tLT5jbHVfZGJ1ZiA9IHRydWU7Cj4gKwkJZHVf Y21tLT5jbHUuYnVmX21vZGUgPSBDTFVfRE9VQkxFX0JVRkZFUl9BVVRPOwo+ICsJCWR1X2NtbS0+ cmVnX3NhdmUuY20yX2N0bDAgfD0gQ01NX0NUTDBfQ0xVREI7Cj4gKwl9Cj4gKwo+ICsjaWZkZWYg Q09ORklHX1BNX1NMRUVQCj4gKwlkdV9jbW0tPnJlZ19zYXZlLmx1dF90YWJsZSA9Cj4gKwkJZGV2 bV9remFsbG9jKHJjZHUtPmRldiwgQ01NX0xVVF9OVU0gKiA0LCBHRlBfS0VSTkVMKTsKPiArCWlm ICghZHVfY21tLT5yZWdfc2F2ZS5sdXRfdGFibGUpIHsKPiArCQlyZXQgPSAtRU5PTUVNOwo+ICsJ CWdvdG8gZXJyb3JfbHV0X3JlZ19zYXZlX2J1ZjsKPiArCX0KPiArCWZvciAoaSA9IDA7IGkgPCBD TU1fTFVUX05VTTsgaSsrKQo+ICsJCWR1X2NtbS0+cmVnX3NhdmUubHV0X3RhYmxlW2ldID0gKGkg PDwgMTYpIHwgKGkgPDwgOCkgfCAoaSA8PCAwKTsKPiArCj4gKwlkdV9jbW0tPnJlZ19zYXZlLmNs dV90YWJsZSA9Cj4gKwkJZGV2bV9remFsbG9jKHJjZHUtPmRldiwgQ01NX0NMVV9OVU0gKiA0LCBH RlBfS0VSTkVMKTsKPiArCWlmICghZHVfY21tLT5yZWdfc2F2ZS5jbHVfdGFibGUpIHsKPiArCQly ZXQgPSAtRU5PTUVNOwo+ICsJCWdvdG8gZXJyb3JfY2x1X3JlZ19zYXZlX2J1ZjsKPiArCX0KPiAr CWZvciAoaSA9IDA7IGkgPCBDTU1fQ0xVX05VTTsgaSsrKQo+ICsJCWR1X2NtbS0+cmVnX3NhdmUu Y2x1X3RhYmxlW2ldID0gaW5kZXhfdG9fY2x1X2RhdGEoaSk7Cj4gKwo+ICsJaW5pdF93YWl0cXVl dWVfaGVhZCgmZHVfY21tLT5yZWdfc2F2ZS53YWl0KTsKPiArI2VuZGlmIC8qIENPTkZJR19QTV9T TEVFUCAqLwo+ICsJaWYgKHNvY19kZXZpY2VfbWF0Y2gocmNhcl9kdV9jbW1fcjhhNzc5NV9lczEp KQo+ICsJCWR1X2NtbS0+c29jX3N1cHBvcnQgPSBmYWxzZTsKPiArCWVsc2UKPiArCQlkdV9jbW0t PnNvY19zdXBwb3J0ID0gdHJ1ZTsKPiArCj4gKwlkdV9jbW0tPmFjdGl2ZSA9IGZhbHNlOwo+ICsJ ZHVfY21tLT5pbml0ID0gZmFsc2U7Cj4gKwlkdV9jbW0tPmRpcmVjdCA9IHRydWU7Cj4gKwo+ICsJ bXV0ZXhfaW5pdCgmZHVfY21tLT5sb2NrKTsKPiArCUlOSVRfTElTVF9IRUFEKCZkdV9jbW0tPmx1 dC5saXN0KTsKPiArCWR1X2NtbS0+bHV0LnAgPSBOVUxMOwo+ICsJZHVfY21tLT5sdXQub25lX3Np ZGUgPSBmYWxzZTsKPiArCUlOSVRfTElTVF9IRUFEKCZkdV9jbW0tPmNsdS5saXN0KTsKPiArCWR1 X2NtbS0+Y2x1LnAgPSBOVUxMOwo+ICsJZHVfY21tLT5jbHUub25lX3NpZGUgPSBmYWxzZTsKPiAr CUlOSVRfTElTVF9IRUFEKCZkdV9jbW0tPmhnby5saXN0KTsKPiArCWR1X2NtbS0+aGdvLnJlc2V0 ID0gMDsKPiArCj4gKwlzcHJpbnRmKG5hbWUsICJkdS1jbW0lZCIsIHJjcnRjLT5pbmRleCk7Cj4g KwlkdV9jbW0tPndvcmtxdWV1ZSA9IGNyZWF0ZV9zaW5nbGV0aHJlYWRfd29ya3F1ZXVlKG5hbWUp Owo+ICsJSU5JVF9XT1JLKCZkdV9jbW0tPndvcmssIGR1X2NtbV93b3JrKTsKPiArCj4gKwlyY3J0 Yy0+Y21tX2hhbmRsZSA9IGR1X2NtbTsKPiArCj4gKwlkZXZfaW5mbyhyY2R1LT5kZXYsICJEVSVk IHVzZSBDTU0oJXMgYnVmZmVyKVxuIiwKPiArCQkgcmNydGMtPmluZGV4LCBkdV9jbW0tPmRidWYg PyAiRG91YmxlIiA6ICJTaW5nbGUiKTsKPiArCj4gKwlyZXR1cm4gMDsKPiArCj4gKyNpZmRlZiBD T05GSUdfUE1fU0xFRVAKPiArZXJyb3JfY2x1X3JlZ19zYXZlX2J1ZjoKPiArZXJyb3JfbHV0X3Jl Z19zYXZlX2J1ZjoKPiArI2VuZGlmIC8qIENPTkZJR19QTV9TTEVFUCAqLwo+ICtlcnJvcl9jbG9j a19jbW06Cj4gKwlkZXZtX2lvdW5tYXAocmNkdS0+ZGV2LCBkdV9jbW0tPmNtbV9iYXNlKTsKPiAr ZXJyb3JfbWFwcGluZ19jbW06Cj4gKwlkZXZtX2tmcmVlKHJjZHUtPmRldiwgZHVfY21tKTsKPiAr ZXJyb3JfYWxsb2M6Cj4gKwlyZXR1cm4gcmV0Owo+ICt9Cj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMv Z3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfY3J0Yy5jIGIvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUv cmNhcl9kdV9jcnRjLmMKPiBpbmRleCAxNWRjOWNhLi44NjRmYjk0IDEwMDY0NAo+IC0tLSBhL2Ry aXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfY3J0Yy5jCj4gKysrIGIvZHJpdmVycy9ncHUv ZHJtL3JjYXItZHUvcmNhcl9kdV9jcnRjLmMKPiBAQCAtMjk2LDYgKzI5NiwxOSBAQCBzdGF0aWMg dm9pZCByY2FyX2R1X2NydGNfc2V0X2Rpc3BsYXlfdGltaW5nKHN0cnVjdCByY2FyX2R1X2NydGMg KnJjcnRjKQo+ICAJcmNhcl9kdV9jcnRjX3dyaXRlKHJjcnRjLCBIRFNSLCBtb2RlLT5odG90YWwg LSBtb2RlLT5oc3luY19zdGFydCAtIDE5KTsKPiAgCXJjYXJfZHVfY3J0Y193cml0ZShyY3J0Yywg SERFUiwgbW9kZS0+aHRvdGFsIC0gbW9kZS0+aHN5bmNfc3RhcnQgKwo+ICAJCQkJCW1vZGUtPmhk aXNwbGF5IC0gMTkpOwo+ICsJaWYgKHJjYXJfZHVfaGFzKHJjcnRjLT5ncm91cC0+ZGV2LCBSQ0FS X0RVX0ZFQVRVUkVfQ01NKSkgewo+ICsJCXJjYXJfZHVfY3J0Y193cml0ZShyY3J0YywgSERTUiwg bW9kZS0+aHRvdGFsIC0KPiArCQkJCQkJbW9kZS0+aHN5bmNfc3RhcnQgLSAxOSAtIDI1KTsKPiAr CQlyY2FyX2R1X2NydGNfd3JpdGUocmNydGMsIEhERVIsIG1vZGUtPmh0b3RhbCAtCj4gKwkJCQkJ CW1vZGUtPmhzeW5jX3N0YXJ0ICsKPiArCQkJCQkJbW9kZS0+aGRpc3BsYXkgLSAxOSAtIDI1KTsK PiArCX0gZWxzZSB7Cj4gKwkJcmNhcl9kdV9jcnRjX3dyaXRlKHJjcnRjLCBIRFNSLCBtb2RlLT5o dG90YWwgLQo+ICsJCQkJCQltb2RlLT5oc3luY19zdGFydCAtIDE5KTsKPiArCQlyY2FyX2R1X2Ny dGNfd3JpdGUocmNydGMsIEhERVIsIG1vZGUtPmh0b3RhbCAtCj4gKwkJCQkJCW1vZGUtPmhzeW5j X3N0YXJ0ICsKPiArCQkJCQkJbW9kZS0+aGRpc3BsYXkgLSAxOSk7Cj4gKwl9Cj4gIAlyY2FyX2R1 X2NydGNfd3JpdGUocmNydGMsIEhTV1IsIG1vZGUtPmhzeW5jX2VuZCAtCj4gIAkJCQkJbW9kZS0+ aHN5bmNfc3RhcnQgLSAxKTsKPiAgCXJjYXJfZHVfY3J0Y193cml0ZShyY3J0YywgSENSLCAgbW9k ZS0+aHRvdGFsIC0gMSk7Cj4gQEAgLTUzMCw2ICs1NDMsOSBAQCBzdGF0aWMgdm9pZCByY2FyX2R1 X2NydGNfc3RhcnQoc3RydWN0IHJjYXJfZHVfY3J0YyAqcmNydGMpCj4gIAkJCSAgICAgRFNZU1Jf VFZNX01BU1RFUik7Cj4gIAo+ICAJcmNhcl9kdV9ncm91cF9zdGFydF9zdG9wKHJjcnRjLT5ncm91 cCwgdHJ1ZSk7Cj4gKwo+ICsJaWYgKHJjYXJfZHVfaGFzKHJjcnRjLT5ncm91cC0+ZGV2LCBSQ0FS X0RVX0ZFQVRVUkVfQ01NKSkKPiArCQlyY2FyX2R1X2NtbV9zdGFydF9zdG9wKHJjcnRjLCB0cnVl KTsKPiAgfQo+ICAKPiAgc3RhdGljIHZvaWQgcmNhcl9kdV9jcnRjX2Rpc2FibGVfcGxhbmVzKHN0 cnVjdCByY2FyX2R1X2NydGMgKnJjcnRjKQo+IEBAIC01NjUsNiArNTgxLDkgQEAgc3RhdGljIHZv aWQgcmNhcl9kdV9jcnRjX3N0b3Aoc3RydWN0IHJjYXJfZHVfY3J0YyAqcmNydGMpCj4gIHsKPiAg CXN0cnVjdCBkcm1fY3J0YyAqY3J0YyA9ICZyY3J0Yy0+Y3J0YzsKPiAgCj4gKwlpZiAocmNhcl9k dV9oYXMocmNydGMtPmdyb3VwLT5kZXYsIFJDQVJfRFVfRkVBVFVSRV9DTU0pKQo+ICsJCXJjYXJf ZHVfY21tX3N0YXJ0X3N0b3AocmNydGMsIGZhbHNlKTsKPiArCj4gIAkvKgo+ICAJICogRGlzYWJs ZSBhbGwgcGxhbmVzIGFuZCB3YWl0IGZvciB0aGUgY2hhbmdlIHRvIHRha2UgZWZmZWN0LiBUaGlz IGlzCj4gIAkgKiByZXF1aXJlZCBhcyB0aGUgcGxhbmUgZW5hYmxlIHJlZ2lzdGVycyBhcmUgdXBk YXRlZCBvbiB2YmxhbmssIGFuZCBubwo+IEBAIC04OTksNiArOTE4LDkgQEAgc3RhdGljIGlycXJl dHVybl90IHJjYXJfZHVfY3J0Y19pcnEoaW50IGlycSwgdm9pZCAqYXJnKQo+ICAJCQlyY2FyX2R1 X2NydGNfZmluaXNoX3BhZ2VfZmxpcChyY3J0Yyk7Cj4gIAkJfQo+ICAKPiArCQlpZiAocmNhcl9k dV9oYXMocmNydGMtPmdyb3VwLT5kZXYsIFJDQVJfRFVfRkVBVFVSRV9DTU0pKQo+ICsJCQlyY2Fy X2R1X2NtbV9raWNrKHJjcnRjKTsKClRoZSBmYWN0IHRoYXQgdGhlIFNvQyBoYXMgYSBDTU0gZG9l c24ndCBtZWFuIGl0IHNob3VsZCBiZSB1c2VkCnVuY29uZGl0aW9uYWxseS4gV2hlbiB0aGUgQ01N IGZlYXR1cmVzIGFyZSBub3QgbmVlZGVkIGJ5IHVzZXJzcGFjZSB0aGUKQ01NIHNob3VsZCBiZSBk aXNhYmxlZC4KCj4gKwo+ICAJCXJldCA9IElSUV9IQU5ETEVEOwo+ICAJfQo+ICAKPiBAQCAtOTk5 LDUgKzEwMjEsNyBAQCBpbnQgcmNhcl9kdV9jcnRjX2NyZWF0ZShzdHJ1Y3QgcmNhcl9kdV9ncm91 cCAqcmdycCwgdW5zaWduZWQgaW50IHN3aW5kZXgsCj4gIAkJcmV0dXJuIHJldDsKPiAgCX0KPiAg Cj4gKwlyY2FyX2R1X2NtbV9pbml0KHJjcnRjKTsKPiArCj4gIAlyZXR1cm4gMDsKPiAgfQo+IGRp ZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X2NydGMuaCBiL2RyaXZl cnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfY3J0Yy5oCj4gaW5kZXggNzY4MGNiMi4uNzRlMGEy MiAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X2NydGMuaAo+ ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfY3J0Yy5oCj4gQEAgLTY3LDYg KzY3LDEwIEBAIHN0cnVjdCByY2FyX2R1X2NydGMgewo+ICAJc3RydWN0IHJjYXJfZHVfZ3JvdXAg Kmdyb3VwOwo+ICAJc3RydWN0IHJjYXJfZHVfdnNwICp2c3A7Cj4gIAl1bnNpZ25lZCBpbnQgdnNw X3BpcGU7Cj4gKwlpbnQgbHZkc19jaDsKCkkgdGhpbmsgeW91IG5lZWQgdG8gZmlndXJlIG91dCBh bGwgdGhlIHBsYWNlcyB3aGVyZSB5b3UgcHVsbGVkIGluIEJTUApjb2RlIGNvbXBsZXRlbHkgdW5y ZWxhdGVkIHRvIHRoZSBzZXJpZXMgOi0pCgo+ICsKPiArCXZvaWQgKmNtbV9oYW5kbGU7Cj4gKwo+ ICB9Owo+ICAKPiAgI2RlZmluZSB0b19yY2FyX2NydGMoYykJY29udGFpbmVyX29mKGMsIHN0cnVj dCByY2FyX2R1X2NydGMsIGNydGMpCj4gQEAgLTEwNCw0ICsxMDgsMTYgQEAgdm9pZCByY2FyX2R1 X2NydGNfcm91dGVfb3V0cHV0KHN0cnVjdCBkcm1fY3J0YyAqY3J0YywKPiAgCQkJICAgICAgIGVu dW0gcmNhcl9kdV9vdXRwdXQgb3V0cHV0KTsKPiAgdm9pZCByY2FyX2R1X2NydGNfZmluaXNoX3Bh Z2VfZmxpcChzdHJ1Y3QgcmNhcl9kdV9jcnRjICpyY3J0Yyk7Cj4gIAo+ICsvKiBEVS1DTU0gZnVu Y3Rpb25zICovCj4gK2ludCByY2FyX2R1X2NtbV9pbml0KHN0cnVjdCByY2FyX2R1X2NydGMgKnJj cnRjKTsKPiAraW50IHJjYXJfZHVfY21tX2RyaXZlcl9vcGVuKHN0cnVjdCBkcm1fZGV2aWNlICpk ZXYsIHN0cnVjdCBkcm1fZmlsZSAqZmlsZV9wcml2KTsKPiArdm9pZCByY2FyX2R1X2NtbV9wb3N0 Y2xvc2Uoc3RydWN0IGRybV9kZXZpY2UgKmRldiwgc3RydWN0IGRybV9maWxlICpmaWxlX3ByaXYp Owo+ICtpbnQgcmNhcl9kdV9jbW1fc3RhcnRfc3RvcChzdHJ1Y3QgcmNhcl9kdV9jcnRjICpyY3J0 YywgYm9vbCBvbik7Cj4gK3ZvaWQgcmNhcl9kdV9jbW1fa2ljayhzdHJ1Y3QgcmNhcl9kdV9jcnRj ICpyY3J0Yyk7Cj4gKwo+ICsjaWZkZWYgQ09ORklHX1BNX1NMRUVQCj4gK2ludCByY2FyX2R1X2Nt bV9wbV9zdXNwZW5kKHN0cnVjdCByY2FyX2R1X2NydGMgKnJjcnRjKTsKPiAraW50IHJjYXJfZHVf Y21tX3BtX3Jlc3VtZShzdHJ1Y3QgcmNhcl9kdV9jcnRjICpyY3J0Yyk7Cj4gKyNlbmRpZiAvKiBD T05GSUdfUE1fU0xFRVAgKi8KPiArCj4gICNlbmRpZiAvKiBfX1JDQVJfRFVfQ1JUQ19IX18gKi8K PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kdV9kcnYuYyBiL2Ry aXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfZHJ2LmMKPiBpbmRleCAwMmFlZTZjLi44Mzhi N2M5IDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfZHJ2LmMK PiArKysgYi9kcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X2Rydi5jCj4gQEAgLTI2LDgg KzI2LDggQEAKPiAgI2luY2x1ZGUgPGRybS9kcm1fY3J0Y19oZWxwZXIuaD4KPiAgI2luY2x1ZGUg PGRybS9kcm1fZmJfY21hX2hlbHBlci5oPgo+ICAjaW5jbHVkZSA8ZHJtL2RybV9nZW1fY21hX2hl bHBlci5oPgo+IC0KPiAgI2luY2x1ZGUgInJjYXJfZHVfZHJ2LmgiCj4gKyNpbmNsdWRlICJyY2Fy X2R1X2VuY29kZXIuaCIKPiAgI2luY2x1ZGUgInJjYXJfZHVfa21zLmgiCj4gICNpbmNsdWRlICJy Y2FyX2R1X29mLmgiCj4gICNpbmNsdWRlICJyY2FyX2R1X3JlZ3MuaCIKPiBAQCAtMTI4LDcgKzEy OCw5IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgcmNhcl9kdV9kZXZpY2VfaW5mbyByY2FyX2R1X3I4 YTc3OTBfaW5mbyA9IHsKPiAgc3RhdGljIGNvbnN0IHN0cnVjdCByY2FyX2R1X2RldmljZV9pbmZv IHJjYXJfZHVfcjhhNzc5MV9pbmZvID0gewo+ICAJLmdlbiA9IDIsCj4gIAkuZmVhdHVyZXMgPSBS Q0FSX0RVX0ZFQVRVUkVfQ1JUQ19JUlFfQ0xPQ0sKPiAtCQkgIHwgUkNBUl9EVV9GRUFUVVJFX0VY VF9DVFJMX1JFR1MsCj4gKwkJICB8IFJDQVJfRFVfRkVBVFVSRV9FWFRfQ1RSTF9SRUdTCj4gKwkJ ICB8IFJDQVJfRFVfRkVBVFVSRV9DTU0sCj4gKwkubnVtX2NydGNzID0gMiwKPiAgCS5jaGFubmVs c19tYXNrID0gQklUKDEpIHwgQklUKDApLAo+ICAJLnJvdXRlcyA9IHsKPiAgCQkvKgo+IEBAIC0x OTAsNyArMTkyLDEwIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgcmNhcl9kdV9kZXZpY2VfaW5mbyBy Y2FyX2R1X3I4YTc3OTVfaW5mbyA9IHsKPiAgCS5nZW4gPSAzLAo+ICAJLmZlYXR1cmVzID0gUkNB Ul9EVV9GRUFUVVJFX0NSVENfSVJRX0NMT0NLCj4gIAkJICB8IFJDQVJfRFVfRkVBVFVSRV9FWFRf Q1RSTF9SRUdTCj4gLQkJICB8IFJDQVJfRFVfRkVBVFVSRV9WU1AxX1NPVVJDRSwKPiArCQkgIHwg UkNBUl9EVV9GRUFUVVJFX1ZTUDFfU09VUkNFCj4gKwkJICB8IFJDQVJfRFVfRkVBVFVSRV9DTU0g fCBSQ0FSX0RVX0ZFQVRVUkVfQ01NX0xVVF9EQlVGCj4gKwkJICB8IFJDQVJfRFVfRkVBVFVSRV9D TU1fQ0xVX0RCVUYsCj4gKwkubnVtX2NydGNzID0gNCwKPiAgCS5jaGFubmVsc19tYXNrID0gQklU KDMpIHwgQklUKDIpIHwgQklUKDEpIHwgQklUKDApLAo+ICAJLnJvdXRlcyA9IHsKPiAgCQkvKgo+ IEBAIC0yMjIsNyArMjI3LDEwIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgcmNhcl9kdV9kZXZpY2Vf aW5mbyByY2FyX2R1X3I4YTc3OTZfaW5mbyA9IHsKPiAgCS5nZW4gPSAzLAo+ICAJLmZlYXR1cmVz ID0gUkNBUl9EVV9GRUFUVVJFX0NSVENfSVJRX0NMT0NLCj4gIAkJICB8IFJDQVJfRFVfRkVBVFVS RV9FWFRfQ1RSTF9SRUdTCj4gLQkJICB8IFJDQVJfRFVfRkVBVFVSRV9WU1AxX1NPVVJDRSwKPiAr CQkgIHwgUkNBUl9EVV9GRUFUVVJFX1ZTUDFfU09VUkNFCj4gKwkJICB8IFJDQVJfRFVfRkVBVFVS RV9DTU0gfCBSQ0FSX0RVX0ZFQVRVUkVfQ01NX0xVVF9EQlVGCj4gKwkJICB8IFJDQVJfRFVfRkVB VFVSRV9DTU1fQ0xVX0RCVUYsCj4gKwkubnVtX2NydGNzID0gMywKPiAgCS5jaGFubmVsc19tYXNr ID0gQklUKDIpIHwgQklUKDEpIHwgQklUKDApLAo+ICAJLnJvdXRlcyA9IHsKPiAgCQkvKgo+IEBA IC0yNTAsNyArMjU4LDExIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgcmNhcl9kdV9kZXZpY2VfaW5m byByY2FyX2R1X3I4YTc3OTY1X2luZm8gPSB7Cj4gIAkuZ2VuID0gMywKPiAgCS5mZWF0dXJlcyA9 IFJDQVJfRFVfRkVBVFVSRV9DUlRDX0lSUV9DTE9DSwo+ICAJCSAgfCBSQ0FSX0RVX0ZFQVRVUkVf RVhUX0NUUkxfUkVHUwo+IC0JCSAgfCBSQ0FSX0RVX0ZFQVRVUkVfVlNQMV9TT1VSQ0UsCj4gKwkJ ICB8IFJDQVJfRFVfRkVBVFVSRV9WU1AxX1NPVVJDRQo+ICsJCSAgfCBSQ0FSX0RVX0ZFQVRVUkVf UjhBNzc5NjVfUkVHUwo+ICsJCSAgfCBSQ0FSX0RVX0ZFQVRVUkVfQ01NIHwgUkNBUl9EVV9GRUFU VVJFX0NNTV9MVVRfREJVRgo+ICsJCSAgfCBSQ0FSX0RVX0ZFQVRVUkVfQ01NX0NMVV9EQlVGLAo+ ICsJLm51bV9jcnRjcyA9IDMsCj4gIAkuY2hhbm5lbHNfbWFzayA9IEJJVCgzKSB8IEJJVCgxKSB8 IEJJVCgwKSwKPiAgCS5yb3V0ZXMgPSB7Cj4gIAkJLyoKPiBAQCAtMzI4LDYgKzM0MCw4IEBAIERF RklORV9EUk1fR0VNX0NNQV9GT1BTKHJjYXJfZHVfZm9wcyk7Cj4gIHN0YXRpYyBzdHJ1Y3QgZHJt X2RyaXZlciByY2FyX2R1X2RyaXZlciA9IHsKPiAgCS5kcml2ZXJfZmVhdHVyZXMJPSBEUklWRVJf R0VNIHwgRFJJVkVSX01PREVTRVQgfCBEUklWRVJfUFJJTUUKPiAgCQkJCXwgRFJJVkVSX0FUT01J QywKPiArCS5vcGVuCQkJPSByY2FyX2R1X2NtbV9kcml2ZXJfb3BlbiwKPiArCS5wb3N0Y2xvc2UJ CT0gcmNhcl9kdV9jbW1fcG9zdGNsb3NlLAo+ICAJLmxhc3RjbG9zZQkJPSByY2FyX2R1X2xhc3Rj bG9zZSwKPiAgCS5nZW1fZnJlZV9vYmplY3RfdW5sb2NrZWQgPSBkcm1fZ2VtX2NtYV9mcmVlX29i amVjdCwKPiAgCS5nZW1fdm1fb3BzCQk9ICZkcm1fZ2VtX2NtYV92bV9vcHMsCj4gQEAgLTM1OCw2 ICszNzIsMTIgQEAgc3RhdGljIGludCByY2FyX2R1X3BtX3N1c3BlbmQoc3RydWN0IGRldmljZSAq ZGV2KQo+ICB7Cj4gIAlzdHJ1Y3QgcmNhcl9kdV9kZXZpY2UgKnJjZHUgPSBkZXZfZ2V0X2RydmRh dGEoZGV2KTsKPiAgCXN0cnVjdCBkcm1fYXRvbWljX3N0YXRlICpzdGF0ZTsKPiArCWludCBpOwo+ ICsKPiArCWlmIChyY2FyX2R1X2hhcyhyY2R1LCBSQ0FSX0RVX0ZFQVRVUkVfQ01NKSkgewo+ICsJ CWZvciAoaSA9IDA7IGkgPCByY2R1LT5udW1fY3J0Y3M7ICsraSkKPiArCQkJcmNhcl9kdV9jbW1f cG1fc3VzcGVuZCgmcmNkdS0+Y3J0Y3NbaV0pOwo+ICsJfQo+ICAKPiAgCWRybV9rbXNfaGVscGVy X3BvbGxfZGlzYWJsZShyY2R1LT5kZGV2KTsKPiAgCWRybV9mYmRldl9jbWFfc2V0X3N1c3BlbmRf dW5sb2NrZWQocmNkdS0+ZmJkZXYsIHRydWUpOwo+IEBAIC0zNzcsNyArMzk3LDIwIEBAIHN0YXRp YyBpbnQgcmNhcl9kdV9wbV9zdXNwZW5kKHN0cnVjdCBkZXZpY2UgKmRldikKPiAgc3RhdGljIGlu dCByY2FyX2R1X3BtX3Jlc3VtZShzdHJ1Y3QgZGV2aWNlICpkZXYpCj4gIHsKPiAgCXN0cnVjdCBy Y2FyX2R1X2RldmljZSAqcmNkdSA9IGRldl9nZXRfZHJ2ZGF0YShkZXYpOwo+ICsjaWYgSVNfRU5B QkxFRChDT05GSUdfRFJNX1JDQVJfRFdfSERNSSkKPiArCXN0cnVjdCBkcm1fZW5jb2RlciAqZW5j b2RlcjsKPiArCWludCBpOwo+ICsKPiArCWlmIChyY2FyX2R1X2hhcyhyY2R1LCBSQ0FSX0RVX0ZF QVRVUkVfQ01NKSkgewo+ICsJCWZvciAoaSA9IDA7IChpIDwgcmNkdS0+bnVtX2NydGNzKTsgKytp KQo+ICsJCQlyY2FyX2R1X2NtbV9wbV9yZXN1bWUoJnJjZHUtPmNydGNzW2ldKTsKPiArCX0KPiAg Cj4gKwlsaXN0X2Zvcl9lYWNoX2VudHJ5KGVuY29kZXIsICZyY2R1LT5kZGV2LT5tb2RlX2NvbmZp Zy5lbmNvZGVyX2xpc3QsCj4gKwkJCSAgICBoZWFkKSB7Cj4gKwkJdG9fcmNhcl9lbmNvZGVyKGVu Y29kZXIpOwo+ICsJfQo+ICsjZW5kaWYKPiAgCWRybV9hdG9taWNfaGVscGVyX3Jlc3VtZShyY2R1 LT5kZGV2LCByY2R1LT5zdXNwZW5kX3N0YXRlKTsKPiAgCWRybV9mYmRldl9jbWFfc2V0X3N1c3Bl bmRfdW5sb2NrZWQocmNkdS0+ZmJkZXYsIGZhbHNlKTsKPiAgCWRybV9rbXNfaGVscGVyX3BvbGxf ZW5hYmxlKHJjZHUtPmRkZXYpOwo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcmNhci1k dS9yY2FyX2R1X2Rydi5oIGIvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kdV9kcnYuaAo+ IGluZGV4IGIzYTI1ZTguLmYyYWZlMzYgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL3Jj YXItZHUvcmNhcl9kdV9kcnYuaAo+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJf ZHVfZHJ2LmgKPiBAQCAtMzAsOCArMzAsMTkgQEAgc3RydWN0IHJjYXJfZHVfZGV2aWNlOwo+ICAj ZGVmaW5lIFJDQVJfRFVfRkVBVFVSRV9DUlRDX0lSUV9DTE9DSwkoMSA8PCAwKQkvKiBQZXItQ1JU QyBJUlEgYW5kIGNsb2NrICovCj4gICNkZWZpbmUgUkNBUl9EVV9GRUFUVVJFX0VYVF9DVFJMX1JF R1MJKDEgPDwgMSkJLyogSGFzIGV4dGVuZGVkIGNvbnRyb2wgcmVnaXN0ZXJzICovCj4gICNkZWZp bmUgUkNBUl9EVV9GRUFUVVJFX1ZTUDFfU09VUkNFCSgxIDw8IDIpCS8qIEhhcyBpbnB1dHMgZnJv bSBWU1AxICovCj4gLQo+IC0jZGVmaW5lIFJDQVJfRFVfUVVJUktfQUxJR05fMTI4QgkoMSA8PCAw KQkvKiBBbGlnbiBwaXRjaGVzIHRvIDEyOCBieXRlcyAqLwo+ICsvKiBVc2UgUjhBNzc5NjUgcmVn aXN0ZXJzICovCj4gKyNkZWZpbmUgUkNBUl9EVV9GRUFUVVJFX1I4QTc3OTY1X1JFR1MJQklUKDMp Cj4gKwo+ICsvKiBIYXMgREVGN1IgcmVnaXN0ZXIgJiBDTU0gKi8KPiArI2RlZmluZSBSQ0FSX0RV X0ZFQVRVUkVfQ01NCQlCSVQoMTApCj4gKy8qIEhhcyBDTU0gTFVUIERvdWJsZSBidWZmZXIgKi8K PiArI2RlZmluZSBSQ0FSX0RVX0ZFQVRVUkVfQ01NX0xVVF9EQlVGCUJJVCgxMSkKPiArLyogSGFz IENNTSBDTFUgRG91YmxlIGJ1ZmZlciAqLwo+ICsjZGVmaW5lIFJDQVJfRFVfRkVBVFVSRV9DTU1f Q0xVX0RCVUYJQklUKDEyKQo+ICsvKiBBbGlnbiBwaXRjaGVzIHRvIDEyOCBieXRlcyAqLwo+ICsj ZGVmaW5lIFJDQVJfRFVfUVVJUktfQUxJR05fMTI4QglCSVQoMCkKPiArLyogTFZEUyBsYW5lcyAx IGFuZCAzIGludmVydGVkICovCj4gKyNkZWZpbmUgUkNBUl9EVV9RVUlSS19MVkRTX0xBTkVTCUJJ VCgxKQoKVGhlIGxhc3QgZGVmaW5lIGlzIG5vdCB1c2VkIGhlcmUsIGFuZCBjbGVhcmx5IHVucmVs YXRlZCB0byB0aGlzIHBhdGNoCnNlcmllcy4gSSB0aGluayB0aGUgc2VyaWVzIG5lZWRzIG1ham9y IGNsZWFudXAuCgo+ICAKPiAgLyoKPiAgICogc3RydWN0IHJjYXJfZHVfb3V0cHV0X3JvdXRpbmcg LSBPdXRwdXQgcm91dGluZyBzcGVjaWZpY2F0aW9uCj4gQEAgLTYxLDYgKzcyLDcgQEAgc3RydWN0 IHJjYXJfZHVfZGV2aWNlX2luZm8gewo+ICAJdW5zaWduZWQgaW50IGZlYXR1cmVzOwo+ICAJdW5z aWduZWQgaW50IHF1aXJrczsKPiAgCXVuc2lnbmVkIGludCBjaGFubmVsc19tYXNrOwo+ICsJdW5z aWduZWQgaW50IG51bV9jcnRjczsKClRoZXJlJ3MgYWxyZWFkeSBhIHdheSBpbiB0aGUgZHJpdmVy IHRvIGNvdW50IENSVENzLCBubyBuZWVkIHRvIGR1cGxpY2F0ZQp0aGlzIGluIHRoZSByY2FyX2R1 X2RldmljZV9pbmZvIHN0cnVjdHVyZS4KCj4gIAlzdHJ1Y3QgcmNhcl9kdV9vdXRwdXRfcm91dGlu ZyByb3V0ZXNbUkNBUl9EVV9PVVRQVVRfTUFYXTsKPiAgCXVuc2lnbmVkIGludCBudW1fbHZkczsK PiAgCXVuc2lnbmVkIGludCBkcGxsX2NoOwo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0v cmNhci1kdS9yY2FyX2R1X2dyb3VwLmMgYi9kcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1 X2dyb3VwLmMKPiBpbmRleCBkNTM5Y2IyLi44M2EyODM2IDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMv Z3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfZ3JvdXAuYwo+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9y Y2FyLWR1L3JjYXJfZHVfZ3JvdXAuYwo+IEBAIC0xMzAsNiArMTMwLDExIEBAIHN0YXRpYyB2b2lk IHJjYXJfZHVfZ3JvdXBfc2V0dXAoc3RydWN0IHJjYXJfZHVfZ3JvdXAgKnJncnApCj4gIAlpZiAo cmNkdS0+aW5mby0+Z2VuID49IDMpCj4gIAkJcmNhcl9kdV9ncm91cF93cml0ZShyZ3JwLCBERUZS MTAsIERFRlIxMF9DT0RFIHwgREVGUjEwX0RFRkUxMCk7Cj4gIAo+ICsJaWYgKHJjYXJfZHVfaGFz KHJncnAtPmRldiwgUkNBUl9EVV9GRUFUVVJFX0NNTSkpIHsKPiArCQlyY2FyX2R1X2dyb3VwX3dy aXRlKHJncnAsIERFRjdSLCBERUY3Ul9DT0RFIHwKPiArCQkJCSAgICBERUY3Ul9DTU1FMSB8IERF RjdSX0NNTUUwKTsKPiArCX0KPiArCj4gIAkvKgo+ICAJICogVXNlIERTMVBSIGFuZCBEUzJQUiB0 byBjb25maWd1cmUgcGxhbmVzIHByaW9yaXRpZXMgYW5kIGNvbm5lY3RzIHRoZQo+ICAJICogc3Vw ZXJwb3NpdGlvbiAwIHRvIERVMCBwaW5zLiBEVTEgcGlucyB3aWxsIGJlIGNvbmZpZ3VyZWQgZHlu YW1pY2FsbHkuCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVf cmVncy5oIGIvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kdV9yZWdzLmgKPiBpbmRleCA5 ZGZkMjIwLi5iMjBlNzgzIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3Jj YXJfZHVfcmVncy5oCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kdV9yZWdz LmgKPiBAQCAtMjAwLDYgKzIwMCwxMSBAQAo+ICAjZGVmaW5lIERFRlI2X01MT1MxCQkoMSA8PCAy KQo+ICAjZGVmaW5lIERFRlI2X0RFRkFVTFQJCShERUZSNl9DT0RFIHwgREVGUjZfVENORTEpCj4g IAo+ICsjZGVmaW5lIERFRjdSCQkJMHgwMDBlYwo+ICsjZGVmaW5lIERFRjdSX0NPREUJCSgweDc3 NzkgPDwgMTYpCj4gKyNkZWZpbmUgREVGN1JfQ01NRTEJCUJJVCg2KQo+ICsjZGVmaW5lIERFRjdS X0NNTUUwCQlCSVQoNCkKPiArCj4gIC8qIC0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tCj4gICAqIFI4QTc3 OTAtb25seSBDb250cm9sIFJlZ2lzdGVycwo+ICAgKi8KPiBAQCAtNTUyLDQgKzU1Nyw5MSBAQAo+ ICAjZGVmaW5lIEdDQkNSCQkJMHgxMTA5OAo+ICAjZGVmaW5lIEJDQkNSCQkJMHgxMTA5Ywo+ICAK PiArLyogLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0KPiArICogRFUgQ29sb3IgTWFuYWdlbWVudCBNb2R1 bGUgUmVnaXN0ZXJzCj4gKyAqLwo+ICsKPiArI2RlZmluZSBDTU1fTFVUX0NUUkwJCQkweDAwMDAK PiArI2RlZmluZSBDTU1fTFVUX0NUUkxfRU4JCQlCSVQoMCkKPiArCj4gKyNkZWZpbmUgQ01NX0NM VV9DVFJMCQkJMHgwMTAwCj4gKyNkZWZpbmUgQ01NX0NMVV9DVFJMX0VOCQkJQklUKDApCj4gKyNk ZWZpbmUgQ01NX0NMVV9DVFJMX01WUwkJQklUKDI0KQo+ICsjZGVmaW5lIENNTV9DTFVfQ1RSTF9B QUkJCUJJVCgyOCkKPiArCj4gKyNkZWZpbmUgQ01NX0NUTDAJCQkweDAxODAKPiArI2RlZmluZSBD TTJfQ1RMMAkJCUNNTV9DVEwwCgpXaHkgZG8geW91IG5lZWQgYW4gYWxpYXMgaGVyZSAoYW5kIGZv ciBDTTJfQ1RMMSBiZWxvdykgPwoKPiArI2RlZmluZSBDTU1fQ1RMMF9DTFVEQgkJCUJJVCgyNCkK PiArI2RlZmluZSBDTU1fQ1RMMF9ISVNUUwkJCUJJVCgyMCkKPiArI2RlZmluZSBDTU1fQ1RMMF9U TTFfTUFTSwkJKDMgPDwgMTYpCj4gKyNkZWZpbmUgQ01NX0NUTDBfVE0xX0JUNjAxX1lDMjQwCSgw IDw8IDE2KQo+ICsjZGVmaW5lIENNTV9DVEwwX1RNMV9CVDYwMV9ZQzI1NQlCSVQoMTYpCj4gKyNk ZWZpbmUgQ01NX0NUTDBfVE0xX0JUNzA5X1JHMjU1CSgyIDw8IDE2KQo+ICsjZGVmaW5lIENNTV9D VEwwX1RNMV9CVDcwOV9SRzIzNQkoMyA8PCAxNikKPiArI2RlZmluZSBDTU1fQ1RMMF9UTTBfTUFT SwkJKDMgPDwgMTIpCj4gKyNkZWZpbmUgQ01NX0NUTDBfVE0wX0JUNjAxX1lDMjQwCSgwIDw8IDEy KQo+ICsjZGVmaW5lIENNTV9DVEwwX1RNMF9CVDYwMV9ZQzI1NQlCSVQoMTIpCj4gKyNkZWZpbmUg Q01NX0NUTDBfVE0wX0JUNzA5X1JHMjU1CSgyIDw8IDEyKQo+ICsjZGVmaW5lIENNTV9DVEwwX1RN MF9CVDcwOV9SRzIzNQkoMyA8PCAxMikKPiArI2RlZmluZSBDTU1fQ1RMMF9UTV9CVDYwMV9ZQzI0 MAkJKENNTV9DVEwwX1RNMV9CVDYwMV9ZQzI0MCB8XAo+ICsJCQkJCSBDTU1fQ1RMMF9UTTBfQlQ2 MDFfWUMyNDApCj4gKyNkZWZpbmUgQ01NX0NUTDBfVE1fQlQ2MDFfWUMyNTUJCShDTU1fQ1RMMF9U TTFfQlQ2MDFfWUMyNTUgfFwKPiArCQkJCQkgQ01NX0NUTDBfVE0wX0JUNjAxX1lDMjU1KQo+ICsj ZGVmaW5lIENNTV9DVEwwX1RNX0JUNzA5X1JHMjU1CQkoQ01NX0NUTDBfVE0xX0JUNzA5X1JHMjU1 IHxcCj4gKwkJCQkJIENNTV9DVEwwX1RNMF9CVDcwOV9SRzI1NSkKPiArI2RlZmluZSBDTU1fQ1RM MF9UTV9CVDcwOV9SRzIzNQkJKENNTV9DVEwwX1RNMV9CVDcwOV9SRzIzNSB8XAo+ICsJCQkJCSBD TU1fQ1RMMF9UTTBfQlQ3MDlfUkcyMzUpCj4gKyNkZWZpbmUgQ01NX0NUTDBfWUMJCQlCSVQoOCkK PiArI2RlZmluZSBDTU1fQ1RMMF9WUE9MCQkJQklUKDQpCj4gKyNkZWZpbmUgQ01NX0NUTDBfREJV RgkJCUJJVCgwKQo+ICsKPiArI2RlZmluZSBDTU1fQ1RMMQkJCTB4MDE4NAo+ICsjZGVmaW5lIENN Ml9DVEwxCQkJQ01NX0NUTDEKPiArI2RlZmluZSBDTU1fQ1RMMV9CRlMJCQlCSVQoMCkKPiArCj4g KyNkZWZpbmUgQ01NX0NUTDIJCQkweDAxODgKPiArI2RlZmluZSBDTU1fSEdPX09GRlNFVAkJCTB4 MDIwMAo+ICsjZGVmaW5lIENNTV9IR09fU0laRQkJCTB4MDIwNAo+ICsjZGVmaW5lIENNTV9IR09f TU9ERQkJCTB4MDIwOAo+ICsjZGVmaW5lIENNTV9IR09fTU9ERV9NQVNLCQkoMHhGRikKCk5vIG5l ZWQgZm9yIHBhcmVudGhlc2VzLiBIZXggY29uc3RhbnRzIGluIHRoZSBEVSBjb2RlIGJhc2UgdXNl Cmxvd2VyY2FzZS4KCj4gKyNkZWZpbmUgQ01NX0hHT19NT0RFX01BWFJHQgkJQklUKDcpCj4gKyNk ZWZpbmUgQ01NX0hHT19NT0RFX09GU0JfUgkJQklUKDYpCj4gKyNkZWZpbmUgQ01NX0hHT19NT0RF X09GU0JfRwkJQklUKDUpCj4gKyNkZWZpbmUgQ01NX0hHT19NT0RFX09GU0JfQgkJQklUKDQpCj4g KyNkZWZpbmUgQ01NX0hHT19NT0RFX0hSQVRJT19OT19TS0lQUAkJKDAgPDwgMikKPiArI2RlZmlu ZSBDTU1fSEdPX01PREVfSFJBVElPX0hBTEZfU0tJUFAJCUJJVCgyKQo+ICsjZGVmaW5lIENNTV9I R09fTU9ERV9IUkFUSU9fUVVBUlRFUl9TS0lQUAkoMiA8PCAyKQo+ICsjZGVmaW5lIENNTV9IR09f TU9ERV9WUkFUSU9fTk9fU0tJUFAJCSgwIDw8IDApCj4gKyNkZWZpbmUgQ01NX0hHT19NT0RFX1ZS QVRJT19IQUxGX1NLSVBQCQlCSVQoMCkKPiArI2RlZmluZSBDTU1fSEdPX01PREVfVlJBVElPX1FV QVJURVJfU0tJUFAJKDIgPDwgMCkKPiArI2RlZmluZSBDTU1fSEdPX0xCX1RICQkJMHgwMjBDCj4g KyNkZWZpbmUgQ01NX0hHT19MQjBfSAkJCTB4MDIxMAo+ICsjZGVmaW5lIENNTV9IR09fTEIwX1YJ CQkweDAyMTQKPiArI2RlZmluZSBDTU1fSEdPX0xCMV9ICQkJMHgwMjE4Cj4gKyNkZWZpbmUgQ01N X0hHT19MQjFfVgkJCTB4MDIxQwo+ICsjZGVmaW5lIENNTV9IR09fTEIyX0gJCQkweDAyMjAKPiAr I2RlZmluZSBDTU1fSEdPX0xCMl9WCQkJMHgwMjI0Cj4gKyNkZWZpbmUgQ01NX0hHT19MQjNfSAkJ CTB4MDIyOAo+ICsjZGVmaW5lIENNTV9IR09fTEIzX1YJCQkweDAyMkMKPiArI2RlZmluZSBDTU1f SEdPX1JfSElTVE8obikJCSgweDAyMzAgKyAoKG4pICogNCkpCj4gKyNkZWZpbmUgQ01NX0hHT19S X01BWE1JTgkJMHgwMzMwCj4gKyNkZWZpbmUgQ01NX0hHT19SX1NVTQkJCTB4MDMzNAo+ICsjZGVm aW5lIENNTV9IR09fUl9MQl9ERVQJCTB4MDMzOAo+ICsjZGVmaW5lIENNTV9IR09fR19ISVNUTyhu KQkJKDB4MDM0MCArICgobikgKiA0KSkKPiArI2RlZmluZSBDTU1fSEdPX0dfTUFYTUlOCQkweDA0 NDAKPiArI2RlZmluZSBDTU1fSEdPX0dfU1VNCQkJMHgwNDQ0Cj4gKyNkZWZpbmUgQ01NX0hHT19H X0xCX0RFVAkJMHgwNDQ4Cj4gKyNkZWZpbmUgQ01NX0hHT19CX0hJU1RPKG4pCQkoMHgwNDUwICsg KChuKSAqIDQpKQo+ICsjZGVmaW5lIENNTV9IR09fQl9NQVhNSU4JCTB4MDU1MAo+ICsjZGVmaW5l IENNTV9IR09fQl9TVU0JCQkweDA1NTQKPiArI2RlZmluZSBDTU1fSEdPX0JfTEJfREVUCQkweDA1 NTgKPiArI2RlZmluZSBDTU1fSEdPX1JFR1JTVAkJCTB4MDVGQwo+ICsjZGVmaW5lIENNTV9IR09f UkVHUlNUX1JDTEVBCQlCSVQoMCkKPiArI2RlZmluZSBDTU1fTFVUX1RCTEEobikJCQkoMHgwNjAw ICsgKChuKSAqIDQpKQo+ICsjZGVmaW5lIENNTV9DTFVfQUREUgkJCTB4MEEwMAo+ICsjZGVmaW5l IENNTV9DTFVfREFUQQkJCTB4MEEwNAo+ICsjZGVmaW5lIENNTV9MVVRfVEJMQihuKQkJCSgweDBC MDAgKyAoKG4pICogNCkpCj4gKyNkZWZpbmUgQ01NX0NMVV9BRERSMgkJCTB4MEYwMAo+ICsjZGVm aW5lIENNTV9DTFVfREFUQTIJCQkweDBGMDQKClRoZSBDTU0gaXMgYSBzZXBhcmF0ZSBJUCBjb3Jl LCBJIHRoaW5rIGl0IHdvdWxkIGJlIGJlc3Qgc3VwcG9ydGVkIGluIGEKc2VwYXJhdGUgcGxhdGZv cm1fZHJpdmVyIGxpa2UgdGhlIExWRFMgZW5jb2Rlciwgd2l0aCB0aGUgcmVnaXN0ZXJzIHNwbGl0 CnRvIGEgc2VwYXJhdGUgaGVhZGVyLgoKPiArCj4gICNlbmRpZiAvKiBfX1JDQVJfRFVfUkVHU19I X18gKi8KPiBkaWZmIC0tZ2l0IGEvaW5jbHVkZS9kcm0vZHJtX2lvY3RsLmggYi9pbmNsdWRlL2Ry bS9kcm1faW9jdGwuaAo+IGluZGV4IGZhZmI2ZjUuLmFkZDQyODAgMTAwNjQ0Cj4gLS0tIGEvaW5j bHVkZS9kcm0vZHJtX2lvY3RsLmgKPiArKysgYi9pbmNsdWRlL2RybS9kcm1faW9jdGwuaAo+IEBA IC0xMDksNiArMTA5LDEzIEBAIGVudW0gZHJtX2lvY3RsX2ZsYWdzIHsKPiAgCSAqLwo+ICAJRFJN X1JPT1RfT05MWQkJPSBCSVQoMiksCj4gIAkvKioKPiArCSAqIEBEUk1fQ09OVFJPTF9BTExPVzoK PiArCSAqCj4gKwkgKiBEZXByZWNhdGVkLCBkbyBub3QgdXNlLiBDb250cm9sIG5vZGVzIGFyZSBp biB0aGUgcHJvY2VzcyBvZiBnZXR0aW5nCj4gKwkgKiByZW1vdmVkLgo+ICsJICovCgpEbyBub3Qg dXNlIG1lYW5zIGRvIG5vdCB1c2UgOi0pCgpBcyBjb21tZW50ZWQgb24gdGhlIGNvdmVyIGxldHRl ciwgY2hhbmdlcyB0byB0aGUgRFJNIGNvcmUgYW5kIERSTSBBUEkKYXJlIGZpbmUsIGJ1dCBuZWVk IHRvIGJlIHNwbGl0IHRvIHBhdGNoZXMgb2YgdGhlaXIgb3duLCB3aXRoCmNvcnJlc3BvbmRpbmcg ZG9jdW1lbnRhdGlvbiBhbmQgYSBjbGVhciBleHBsYW5hdGlvbiBvZiB3aGF0IHRoZXkgZG8gYW5k CndoeSB0aGV5J3JlIG5lZWRlZC4KCj4gKwlEUk1fQ09OVFJPTF9BTExPVwk9IEJJVCgzKSwKPiAr CS8qKgo+ICAJICogQERSTV9VTkxPQ0tFRDoKPiAgCSAqCj4gIAkgKiBXaGV0aGVyICZkcm1faW9j dGxfZGVzYy5mdW5jIHNob3VsZCBiZSBjYWxsZWQgd2l0aCB0aGUgRFJNIEJLTCBoZWxkCgotLSAK UmVnYXJkcywKCkxhdXJlbnQgUGluY2hhcnQKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMu ZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlz dGluZm8vZHJpLWRldmVs