From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_PASS, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 511F8C4360F for ; Thu, 4 Apr 2019 14:17:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 10A5020882 for ; Thu, 4 Apr 2019 14:17:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1554387448; bh=dz02+vyAQzTJ+ydtd4Q0ByksCflESIlaDROjOLV+0h4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=sAeXZ1RvKPZpfUIGxGrFuwzyeeRSxr4jr/qcOTx9ISyaYrUrHV7k18KXm5vEKMUZy jDBJ5lMaiu/BAkJaevY0K7jweG3oAEMqoM5W39Qd81oIUQvmmW0r5I5Y6nA+bbDEer 92YbyK2MDdB8OqnRGcdBKSnv1nLsHiiNb99RrDQM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727152AbfDDOR1 (ORCPT ); Thu, 4 Apr 2019 10:17:27 -0400 Received: from mail.kernel.org ([198.145.29.99]:49684 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726269AbfDDOR1 (ORCPT ); Thu, 4 Apr 2019 10:17:27 -0400 Received: from localhost (173-25-63-173.client.mchsi.com [173.25.63.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 37E7820882; Thu, 4 Apr 2019 14:17:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1554387445; bh=dz02+vyAQzTJ+ydtd4Q0ByksCflESIlaDROjOLV+0h4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=lV678yuyPOoR2YAcMFwXDDvKvf8mGaCK4mbnj6X6u4exZRi45DwpxQz+Z+USIPJDq LzD++oz1XHEtx6MLNS2d34zk8TgTdJb0rPsUpsfY2st8af2e3Ke45HAN/MZK4s88/m VIoJEjMxHgqhVOcmt+O76PFLOb7QgNPRNqxRvzKk= Date: Thu, 4 Apr 2019 09:17:24 -0500 From: Bjorn Helgaas To: Lyude Paul Cc: David Ober , linux-pci@vger.kernel.org, nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Karol Herbst , Ben Skeggs , stable@vger.kernel.org, linux-kernel@vger.kernel.org, "Rafael J. Wysocki" , Hans de Goede Subject: Re: [PATCH] pci/quirks: Add quirk to reset nvgpu at boot for the Lenovo ThinkPad P50 Message-ID: <20190404141724.GJ141706@google.com> References: <20190212220230.1568-1-lyude@redhat.com> <20190215004329.GR96272@google.com> <2fca9a9feafcd17b27bc71994a71ebc241a93e9a.camel@redhat.com> <52b17f8cb24e179e9661d75548d193843ae87b4c.camel@redhat.com> <20190321224819.GK251185@google.com> <20190322113015.GM251185@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190322113015.GM251185@google.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org [+cc Hans, author of 0b2fe6594fa2 ("drm/nouveau: Queue hpd_work on (runtime) resume")] On Fri, Mar 22, 2019 at 06:30:15AM -0500, Bjorn Helgaas wrote: > On Thu, Mar 21, 2019 at 05:48:19PM -0500, Bjorn Helgaas wrote: > > On Wed, Mar 13, 2019 at 06:25:02PM -0400, Lyude Paul wrote: > > > On Fri, 2019-02-15 at 16:17 -0500, Lyude Paul wrote: > > > > On Thu, 2019-02-14 at 18:43 -0600, Bjorn Helgaas wrote: > > > > > On Tue, Feb 12, 2019 at 05:02:30PM -0500, Lyude Paul wrote: > > > > > > On a very specific subset of ThinkPad P50 SKUs, particularly > > > > > > ones that come with a Quadro M1000M chip instead of the M2000M > > > > > > variant, the BIOS seems to have a very nasty habit of not > > > > > > always resetting the secondary Nvidia GPU between full reboots > > > > > > if the laptop is configured in Hybrid Graphics mode. The > > > > > > reason for this happening is unknown, but the following steps > > > > > > and possibly a good bit of patience will reproduce the issue: > > > > > > > > > > > > 1. Boot up the laptop normally in Hybrid graphics mode > > > > > > 2. Make sure nouveau is loaded and that the GPU is awake > > > > > > 2. Allow the nvidia GPU to runtime suspend itself after being idle > > > > > > 3. Reboot the machine, the more sudden the better (e.g sysrq-b may help) > > > > > > 4. If nouveau loads up properly, reboot the machine again and go back to > > > > > > step 2 until you reproduce the issue > > > > > > > > > > > > This results in some very strange behavior: the GPU will quite > > > > > > literally be left in exactly the same state it was in when the > > > > > > previously booted kernel started the reboot. This has all > > > > > > sorts of bad sideaffects: for starters, this completely breaks > > > > > > nouveau starting with a mysterious EVO channel failure that > > > > > > happens well before we've actually used the EVO channel for > > > > > > anything: > > > > Thanks for the hybrid tutorial (snipped from this response). IIUC, > > what you said was that in hybrid mode, the Intel GPU drives the > > built-in display and the Nvidia GPU drives any external displays and > > may be used for DRI PRIME rendering (whatever that is). But since you > > say the Nvidia device gets runtime suspended, I assume there's no > > external display here and you're not using DRI PRIME. > > > > I wonder if it's related to the fact that the Nvidia GPU has been > > runtime suspended before you do the reboot. Can you try turning of > > runtime power management for the GPU by setting the runpm module > > parameter to 0? I *think* this would be booting with > > "nouveau.runpm=0". > > Sorry, I wasn't really thinking here. You already *said* this is > related to runtime suspend. It only happens when the Nvidia GPU has > been suspended. > > I don't know that much about suspend, but ISTR seeing comments about > resuming devices before we shutdown. If we do that, maybe there's > some kind of race between that resume and the reboot? I think we do in fact resume PCI devices before shutdown. Here's the path I'm looking at: device_shutdown pm_runtime_get_noresume pm_runtime_barrier dev->bus->shutdown pci_device_shutdown pm_runtime_resume __pm_runtime_resume(dev, 0) rpm_resume(dev, 0) __update_runtime_status(dev, RPM_RESUMING) callback = RPM_GET_CALLBACK(dev, runtime_resume) rpm_callback(callback, dev) __rpm_callback pci_pm_runtime_resume drv->pm->runtime_resume nouveau_pmops_runtime_resume nouveau_do_resume schedule_work(hpd_work) # <--- ... nouveau_display_hpd_work pm_runtime_get_sync drm_helper_hpd_irq_event pm_runtime_mark_last_busy pm_runtime_put_sync I'm curious about that "schedule_work(hpd_work)" near the end because no other drivers seem to use schedule_work() in the runtime_resume path, and I don't know how that synchronizes with the shutdown process. I don't see anything that waits for nouveau_display_hpd_work() to complete, so it seems like something that could be a race. I wonder this problem would be easier to reproduce if you added a sleep in nouveau_display_hpd_work() as in the first hunk below, and I wonder if the problem would then go away if you stopped scheduling hpd_work as in the second hunk? Obviously the second hunk isn't a solution, it's just an attempt to figure out if I'm looking in the right area. Bjorn diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index 55c0fa451163..e50806012d41 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c @@ -350,6 +350,7 @@ nouveau_display_hpd_work(struct work_struct *work) pm_runtime_get_sync(drm->dev->dev); + msleep(2000); drm_helper_hpd_irq_event(drm->dev); pm_runtime_mark_last_busy(drm->dev->dev); diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index 5020265bfbd9..48da72caa017 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -946,9 +946,6 @@ nouveau_pmops_runtime_resume(struct device *dev) nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; - /* Monitors may have been connected / disconnected during suspend */ - schedule_work(&nouveau_drm(drm_dev)->hpd_work); - return ret; } From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bjorn Helgaas Subject: Re: [PATCH] pci/quirks: Add quirk to reset nvgpu at boot for the Lenovo ThinkPad P50 Date: Thu, 4 Apr 2019 09:17:24 -0500 Message-ID: <20190404141724.GJ141706@google.com> References: <20190212220230.1568-1-lyude@redhat.com> <20190215004329.GR96272@google.com> <2fca9a9feafcd17b27bc71994a71ebc241a93e9a.camel@redhat.com> <52b17f8cb24e179e9661d75548d193843ae87b4c.camel@redhat.com> <20190321224819.GK251185@google.com> <20190322113015.GM251185@google.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <20190322113015.GM251185@google.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Lyude Paul Cc: Karol Herbst , linux-pci@vger.kernel.org, "Rafael J. Wysocki" , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Hans de Goede , stable@vger.kernel.org, David Ober , nouveau@lists.freedesktop.org List-Id: nouveau.vger.kernel.org WytjYyBIYW5zLCBhdXRob3Igb2YgMGIyZmU2NTk0ZmEyICgiZHJtL25vdXZlYXU6IFF1ZXVlIGhw ZF93b3JrIG9uIChydW50aW1lKSByZXN1bWUiKV0KCk9uIEZyaSwgTWFyIDIyLCAyMDE5IGF0IDA2 OjMwOjE1QU0gLTA1MDAsIEJqb3JuIEhlbGdhYXMgd3JvdGU6Cj4gT24gVGh1LCBNYXIgMjEsIDIw MTkgYXQgMDU6NDg6MTlQTSAtMDUwMCwgQmpvcm4gSGVsZ2FhcyB3cm90ZToKPiA+IE9uIFdlZCwg TWFyIDEzLCAyMDE5IGF0IDA2OjI1OjAyUE0gLTA0MDAsIEx5dWRlIFBhdWwgd3JvdGU6Cj4gPiA+ IE9uIEZyaSwgMjAxOS0wMi0xNSBhdCAxNjoxNyAtMDUwMCwgTHl1ZGUgUGF1bCB3cm90ZToKPiA+ ID4gPiBPbiBUaHUsIDIwMTktMDItMTQgYXQgMTg6NDMgLTA2MDAsIEJqb3JuIEhlbGdhYXMgd3Jv dGU6Cj4gPiA+ID4gPiBPbiBUdWUsIEZlYiAxMiwgMjAxOSBhdCAwNTowMjozMFBNIC0wNTAwLCBM eXVkZSBQYXVsIHdyb3RlOgo+ID4gPiA+ID4gPiBPbiBhIHZlcnkgc3BlY2lmaWMgc3Vic2V0IG9m IFRoaW5rUGFkIFA1MCBTS1VzLCBwYXJ0aWN1bGFybHkKPiA+ID4gPiA+ID4gb25lcyB0aGF0IGNv bWUgd2l0aCBhIFF1YWRybyBNMTAwME0gY2hpcCBpbnN0ZWFkIG9mIHRoZSBNMjAwME0KPiA+ID4g PiA+ID4gdmFyaWFudCwgdGhlIEJJT1Mgc2VlbXMgdG8gaGF2ZSBhIHZlcnkgbmFzdHkgaGFiaXQg b2Ygbm90Cj4gPiA+ID4gPiA+IGFsd2F5cyByZXNldHRpbmcgdGhlIHNlY29uZGFyeSBOdmlkaWEg R1BVIGJldHdlZW4gZnVsbCByZWJvb3RzCj4gPiA+ID4gPiA+IGlmIHRoZSBsYXB0b3AgaXMgY29u ZmlndXJlZCBpbiBIeWJyaWQgR3JhcGhpY3MgbW9kZS4gVGhlCj4gPiA+ID4gPiA+IHJlYXNvbiBm b3IgdGhpcyBoYXBwZW5pbmcgaXMgdW5rbm93biwgYnV0IHRoZSBmb2xsb3dpbmcgc3RlcHMKPiA+ ID4gPiA+ID4gYW5kIHBvc3NpYmx5IGEgZ29vZCBiaXQgb2YgcGF0aWVuY2Ugd2lsbCByZXByb2R1 Y2UgdGhlIGlzc3VlOgo+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gMS4gQm9vdCB1cCB0aGUgbGFw dG9wIG5vcm1hbGx5IGluIEh5YnJpZCBncmFwaGljcyBtb2RlCj4gPiA+ID4gPiA+IDIuIE1ha2Ug c3VyZSBub3V2ZWF1IGlzIGxvYWRlZCBhbmQgdGhhdCB0aGUgR1BVIGlzIGF3YWtlCj4gPiA+ID4g PiA+IDIuIEFsbG93IHRoZSBudmlkaWEgR1BVIHRvIHJ1bnRpbWUgc3VzcGVuZCBpdHNlbGYgYWZ0 ZXIgYmVpbmcgaWRsZQo+ID4gPiA+ID4gPiAzLiBSZWJvb3QgdGhlIG1hY2hpbmUsIHRoZSBtb3Jl IHN1ZGRlbiB0aGUgYmV0dGVyIChlLmcgc3lzcnEtYiBtYXkgaGVscCkKPiA+ID4gPiA+ID4gNC4g SWYgbm91dmVhdSBsb2FkcyB1cCBwcm9wZXJseSwgcmVib290IHRoZSBtYWNoaW5lIGFnYWluIGFu ZCBnbyBiYWNrIHRvCj4gPiA+ID4gPiA+IHN0ZXAgMiB1bnRpbCB5b3UgcmVwcm9kdWNlIHRoZSBp c3N1ZQo+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gVGhpcyByZXN1bHRzIGluIHNvbWUgdmVyeSBz dHJhbmdlIGJlaGF2aW9yOiB0aGUgR1BVIHdpbGwgcXVpdGUKPiA+ID4gPiA+ID4gbGl0ZXJhbGx5 IGJlIGxlZnQgaW4gZXhhY3RseSB0aGUgc2FtZSBzdGF0ZSBpdCB3YXMgaW4gd2hlbiB0aGUKPiA+ ID4gPiA+ID4gcHJldmlvdXNseSBib290ZWQga2VybmVsIHN0YXJ0ZWQgdGhlIHJlYm9vdC4gVGhp cyBoYXMgYWxsCj4gPiA+ID4gPiA+IHNvcnRzIG9mIGJhZCBzaWRlYWZmZWN0czogZm9yIHN0YXJ0 ZXJzLCB0aGlzIGNvbXBsZXRlbHkgYnJlYWtzCj4gPiA+ID4gPiA+IG5vdXZlYXUgc3RhcnRpbmcg d2l0aCBhIG15c3RlcmlvdXMgRVZPIGNoYW5uZWwgZmFpbHVyZSB0aGF0Cj4gPiA+ID4gPiA+IGhh cHBlbnMgd2VsbCBiZWZvcmUgd2UndmUgYWN0dWFsbHkgdXNlZCB0aGUgRVZPIGNoYW5uZWwgZm9y Cj4gPiA+ID4gPiA+IGFueXRoaW5nOgo+ID4gCj4gPiBUaGFua3MgZm9yIHRoZSBoeWJyaWQgdHV0 b3JpYWwgKHNuaXBwZWQgZnJvbSB0aGlzIHJlc3BvbnNlKS4gIElJVUMsCj4gPiB3aGF0IHlvdSBz YWlkIHdhcyB0aGF0IGluIGh5YnJpZCBtb2RlLCB0aGUgSW50ZWwgR1BVIGRyaXZlcyB0aGUKPiA+ IGJ1aWx0LWluIGRpc3BsYXkgYW5kIHRoZSBOdmlkaWEgR1BVIGRyaXZlcyBhbnkgZXh0ZXJuYWwg ZGlzcGxheXMgYW5kCj4gPiBtYXkgYmUgdXNlZCBmb3IgRFJJIFBSSU1FIHJlbmRlcmluZyAod2hh dGV2ZXIgdGhhdCBpcykuICBCdXQgc2luY2UgeW91Cj4gPiBzYXkgdGhlIE52aWRpYSBkZXZpY2Ug Z2V0cyBydW50aW1lIHN1c3BlbmRlZCwgSSBhc3N1bWUgdGhlcmUncyBubwo+ID4gZXh0ZXJuYWwg ZGlzcGxheSBoZXJlIGFuZCB5b3UncmUgbm90IHVzaW5nIERSSSBQUklNRS4KPiA+IAo+ID4gSSB3 b25kZXIgaWYgaXQncyByZWxhdGVkIHRvIHRoZSBmYWN0IHRoYXQgdGhlIE52aWRpYSBHUFUgaGFz IGJlZW4KPiA+IHJ1bnRpbWUgc3VzcGVuZGVkIGJlZm9yZSB5b3UgZG8gdGhlIHJlYm9vdC4gIENh biB5b3UgdHJ5IHR1cm5pbmcgb2YKPiA+IHJ1bnRpbWUgcG93ZXIgbWFuYWdlbWVudCBmb3IgdGhl IEdQVSBieSBzZXR0aW5nIHRoZSBydW5wbSBtb2R1bGUKPiA+IHBhcmFtZXRlciB0byAwPyAgSSAq dGhpbmsqIHRoaXMgd291bGQgYmUgYm9vdGluZyB3aXRoCj4gPiAibm91dmVhdS5ydW5wbT0wIi4K PiAKPiBTb3JyeSwgSSB3YXNuJ3QgcmVhbGx5IHRoaW5raW5nIGhlcmUuICBZb3UgYWxyZWFkeSAq c2FpZCogdGhpcyBpcwo+IHJlbGF0ZWQgdG8gcnVudGltZSBzdXNwZW5kLiAgSXQgb25seSBoYXBw ZW5zIHdoZW4gdGhlIE52aWRpYSBHUFUgaGFzCj4gYmVlbiBzdXNwZW5kZWQuCj4gCj4gSSBkb24n dCBrbm93IHRoYXQgbXVjaCBhYm91dCBzdXNwZW5kLCBidXQgSVNUUiBzZWVpbmcgY29tbWVudHMg YWJvdXQKPiByZXN1bWluZyBkZXZpY2VzIGJlZm9yZSB3ZSBzaHV0ZG93bi4gIElmIHdlIGRvIHRo YXQsIG1heWJlIHRoZXJlJ3MKPiBzb21lIGtpbmQgb2YgcmFjZSBiZXR3ZWVuIHRoYXQgcmVzdW1l IGFuZCB0aGUgcmVib290PwoKSSB0aGluayB3ZSBkbyBpbiBmYWN0IHJlc3VtZSBQQ0kgZGV2aWNl cyBiZWZvcmUgc2h1dGRvd24uICBIZXJlJ3MgdGhlCnBhdGggSSdtIGxvb2tpbmcgYXQ6CgogIGRl dmljZV9zaHV0ZG93bgogICAgcG1fcnVudGltZV9nZXRfbm9yZXN1bWUKICAgIHBtX3J1bnRpbWVf YmFycmllcgogICAgZGV2LT5idXMtPnNodXRkb3duCiAgICAgIHBjaV9kZXZpY2Vfc2h1dGRvd24K ICAgICAgICBwbV9ydW50aW1lX3Jlc3VtZQogICAgICAgICAgX19wbV9ydW50aW1lX3Jlc3VtZShk ZXYsIDApCiAgICAgICAgICAgIHJwbV9yZXN1bWUoZGV2LCAwKQogICAgICAgICAgICAgIF9fdXBk YXRlX3J1bnRpbWVfc3RhdHVzKGRldiwgUlBNX1JFU1VNSU5HKQogICAgICAgICAgICAgIGNhbGxi YWNrID0gUlBNX0dFVF9DQUxMQkFDSyhkZXYsIHJ1bnRpbWVfcmVzdW1lKQogICAgICAgICAgICAg IHJwbV9jYWxsYmFjayhjYWxsYmFjaywgZGV2KQogICAgICAgICAgICAgICAgX19ycG1fY2FsbGJh Y2sKICAgICAgICAgICAgICAgICAgcGNpX3BtX3J1bnRpbWVfcmVzdW1lCiAgICAgICAgICAgICAg ICAgICAgZHJ2LT5wbS0+cnVudGltZV9yZXN1bWUKICAgICAgICAgICAgICAgICAgICAgIG5vdXZl YXVfcG1vcHNfcnVudGltZV9yZXN1bWUKICAgICAgICAgICAgICAgICAgICAgICAgbm91dmVhdV9k b19yZXN1bWUKICAgICAgICAgICAgICAgICAgICAgICAgc2NoZWR1bGVfd29yayhocGRfd29yaykg ICAjIDwtLS0KICAgICAgICAgICAgICAgICAgICAgICAgLi4uCiAgICAgICAgICAgICAgICAgICAg ICAgIG5vdXZlYXVfZGlzcGxheV9ocGRfd29yawogICAgICAgICAgICAgICAgICAgICAgICAgIHBt X3J1bnRpbWVfZ2V0X3N5bmMKICAgICAgICAgICAgICAgICAgICAgICAgICBkcm1faGVscGVyX2hw ZF9pcnFfZXZlbnQKICAgICAgICAgICAgICAgICAgICAgICAgICBwbV9ydW50aW1lX21hcmtfbGFz dF9idXN5CiAgICAgICAgICAgICAgICAgICAgICAgICAgcG1fcnVudGltZV9wdXRfc3luYwoKSSdt IGN1cmlvdXMgYWJvdXQgdGhhdCAic2NoZWR1bGVfd29yayhocGRfd29yaykiIG5lYXIgdGhlIGVu ZCBiZWNhdXNlCm5vIG90aGVyIGRyaXZlcnMgc2VlbSB0byB1c2Ugc2NoZWR1bGVfd29yaygpIGlu IHRoZSBydW50aW1lX3Jlc3VtZQpwYXRoLCBhbmQgSSBkb24ndCBrbm93IGhvdyB0aGF0IHN5bmNo cm9uaXplcyB3aXRoIHRoZSBzaHV0ZG93bgpwcm9jZXNzLiAgSSBkb24ndCBzZWUgYW55dGhpbmcg dGhhdCB3YWl0cyBmb3IKbm91dmVhdV9kaXNwbGF5X2hwZF93b3JrKCkgdG8gY29tcGxldGUsIHNv IGl0IHNlZW1zIGxpa2Ugc29tZXRoaW5nCnRoYXQgY291bGQgYmUgYSByYWNlLgoKSSB3b25kZXIg dGhpcyBwcm9ibGVtIHdvdWxkIGJlIGVhc2llciB0byByZXByb2R1Y2UgaWYgeW91IGFkZGVkIGEK c2xlZXAgaW4gbm91dmVhdV9kaXNwbGF5X2hwZF93b3JrKCkgYXMgaW4gdGhlIGZpcnN0IGh1bmsg YmVsb3csIGFuZCBJCndvbmRlciBpZiB0aGUgcHJvYmxlbSB3b3VsZCB0aGVuIGdvIGF3YXkgaWYg eW91IHN0b3BwZWQgc2NoZWR1bGluZwpocGRfd29yayBhcyBpbiB0aGUgc2Vjb25kIGh1bms/ICBP YnZpb3VzbHkgdGhlIHNlY29uZCBodW5rIGlzbid0IGEKc29sdXRpb24sIGl0J3MganVzdCBhbiBh dHRlbXB0IHRvIGZpZ3VyZSBvdXQgaWYgSSdtIGxvb2tpbmcgaW4gdGhlCnJpZ2h0IGFyZWEuCgpC am9ybgoKCmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vbm91dmVhdS9ub3V2ZWF1X2Rpc3Bs YXkuYyBiL2RyaXZlcnMvZ3B1L2RybS9ub3V2ZWF1L25vdXZlYXVfZGlzcGxheS5jCmluZGV4IDU1 YzBmYTQ1MTE2My4uZTUwODA2MDEyZDQxIDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vbm91 dmVhdS9ub3V2ZWF1X2Rpc3BsYXkuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vbm91dmVhdS9ub3V2 ZWF1X2Rpc3BsYXkuYwpAQCAtMzUwLDYgKzM1MCw3IEBAIG5vdXZlYXVfZGlzcGxheV9ocGRfd29y ayhzdHJ1Y3Qgd29ya19zdHJ1Y3QgKndvcmspCiAKIAlwbV9ydW50aW1lX2dldF9zeW5jKGRybS0+ ZGV2LT5kZXYpOwogCisJbXNsZWVwKDIwMDApOwogCWRybV9oZWxwZXJfaHBkX2lycV9ldmVudChk cm0tPmRldik7CiAKIAlwbV9ydW50aW1lX21hcmtfbGFzdF9idXN5KGRybS0+ZGV2LT5kZXYpOwoK CgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL25vdXZlYXUvbm91dmVhdV9kcm0uYyBiL2Ry aXZlcnMvZ3B1L2RybS9ub3V2ZWF1L25vdXZlYXVfZHJtLmMKaW5kZXggNTAyMDI2NWJmYmQ5Li40 OGRhNzJjYWEwMTcgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9ub3V2ZWF1L25vdXZlYXVf ZHJtLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL25vdXZlYXUvbm91dmVhdV9kcm0uYwpAQCAtOTQ2 LDkgKzk0Niw2IEBAIG5vdXZlYXVfcG1vcHNfcnVudGltZV9yZXN1bWUoc3RydWN0IGRldmljZSAq ZGV2KQogCW52aWZfbWFzaygmZGV2aWNlLT5vYmplY3QsIDB4MDg4NDg4LCAoMSA8PCAyNSksICgx IDw8IDI1KSk7CiAJZHJtX2Rldi0+c3dpdGNoX3Bvd2VyX3N0YXRlID0gRFJNX1NXSVRDSF9QT1dF Ul9PTjsKIAotCS8qIE1vbml0b3JzIG1heSBoYXZlIGJlZW4gY29ubmVjdGVkIC8gZGlzY29ubmVj dGVkIGR1cmluZyBzdXNwZW5kICovCi0Jc2NoZWR1bGVfd29yaygmbm91dmVhdV9kcm0oZHJtX2Rl diktPmhwZF93b3JrKTsKLQogCXJldHVybiByZXQ7CiB9CiAKX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2 ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21h aWxtYW4vbGlzdGluZm8vZHJpLWRldmVs