From: Christoph Hellwig <hch@infradead.org>
To: Anup Patel <anup@brainfault.org>
Cc: Albert Ou <aou@eecs.berkeley.edu>,
opensbi@lists.infradead.org, Anup Patel <Anup.Patel@wdc.com>,
Christoph Hellwig <hch@infradead.org>,
Atish Patra <atish.patra@wdc.com>,
Palmer Dabbelt <palmer@sifive.com>, Gary Guo <gary@garyguo.net>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v4 0/5] TLB/I$ flush cleanups and improvements
Date: Wed, 10 Apr 2019 03:11:41 -0700 [thread overview]
Message-ID: <20190410101141.GA29411@infradead.org> (raw)
In-Reply-To: <CAAhSdy36Ukh-rCZPnyQh9y8iUi730wBuY_qGO+ctK1_L=sCU1g@mail.gmail.com>
On Wed, Apr 10, 2019 at 02:31:04PM +0530, Anup Patel wrote:
> > Can you clarify the races? I know Anup had some FIFO-order commits
> > in opensbi about a week ago, did they address you concerns?
> >
> > Anup, do you have performance numbers for the old opensbi vs your
> > implementation of the optimized TLB flushing vs this patch?
>
> Atish had posted performance numbers on his GitHub PR at:
> https://github.com/riscv/opensbi/pull/111
>
> These performance numbers are as follows.....
>
> Benchmark used: A microbenchmark that mmap a ramdisk (1G) and
> multiple threads access 50MB of memory randomly.
>
> https://github.com/westerndigitalcorporation/hmmap/blob/master/userspace/hmmap_uspace_common.c
>
> The result is averaged over 25 iterations for 8 threads on HiFive
> Unleashed board. In both cases around ~1M remote tlb flushes are triggered.
>
> IPI SBI Gain
> Average Write Time 2.53183 2.43263 +4.34%
> Average Read Time 1.32198 1.24643 +6.09%
> Total Time 97.7589 92.859 +5.01%
So what does this mean? I assume the codebases are latest(-ish)
opensbi and latest(-ish) kernel with the patches from Gary, and
IPI is with the lernel based code enabled, and SBI is with the SBI
calls?
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next prev parent reply other threads:[~2019-04-10 10:11 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-27 0:41 [PATCH v4 0/5] TLB/I$ flush cleanups and improvements Gary Guo
2019-03-27 0:41 ` [PATCH v4 1/5] riscv: move flush_icache_{all,mm} to cacheflush.c Gary Guo
2019-03-27 7:06 ` Christoph Hellwig
2019-03-28 6:45 ` Anup Patel
2019-03-27 0:41 ` [PATCH v4 2/5] riscv: move switch_mm to its own file Gary Guo
2019-03-27 7:08 ` Christoph Hellwig
2019-03-27 7:18 ` Christoph Hellwig
2019-03-28 6:47 ` Anup Patel
2019-03-27 0:41 ` [PATCH v4 3/5] riscv: fix sbi_remote_sfence_vma{,_asid} Gary Guo
2019-03-27 7:08 ` Christoph Hellwig
2019-03-28 6:47 ` Anup Patel
2019-03-27 0:41 ` [PATCH v4 4/5] riscv: rewrite tlb flush for performance Gary Guo
2019-03-27 7:25 ` Christoph Hellwig
2019-03-27 13:56 ` Gary Guo
2019-03-28 16:17 ` Christoph Hellwig
2019-03-28 16:39 ` Gary Guo
2019-03-28 16:55 ` Christoph Hellwig
2019-03-27 0:41 ` [PATCH v4 5/5] riscv: implement IPI-based remote TLB shootdown Gary Guo
2019-03-27 7:31 ` Christoph Hellwig
2019-03-27 14:03 ` Gary Guo
2019-03-28 16:36 ` Christoph Hellwig
2019-03-28 16:47 ` Gary Guo
2019-03-28 16:57 ` Christoph Hellwig
2019-03-28 6:50 ` Anup Patel
2019-04-10 7:04 ` [PATCH v4 0/5] TLB/I$ flush cleanups and improvements Christoph Hellwig
2019-04-10 9:01 ` Anup Patel
2019-04-10 10:11 ` Christoph Hellwig [this message]
2019-04-10 10:22 ` Anup Patel
2019-04-11 1:24 ` Atish Patra
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