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From: Patrick Venture <venture@google.com>
To: venture@google.com, joel@jms.id.au, andrew@aj.id.au
Cc: Maxim Sloyko <maxims@google.com>,
	openbmc@lists.ozlabs.org,  Robert Lippert <rlippert@google.com>
Subject: [PATCH dev-5.0] ARM: dts: aspeed: zaius: add Infineon and Intersil regulators
Date: Fri, 12 Apr 2019 07:42:06 -0700	[thread overview]
Message-ID: <20190412144206.68324-1-venture@google.com> (raw)

From: Maxim Sloyko <maxims@google.com>

Add the nodes for the ir38064 and isl68137 devices on the Zaius board.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Signed-off-by: Robert Lippert <rlippert@google.com>
Signed-off-by: Patrick Venture <venture@google.com>
---
 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 65 ++++++++++++++++++++--
 1 file changed, 60 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
index 0c0ea41cbe27..53751adebf17 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
@@ -301,6 +301,32 @@
 				reg = <0x54>;
 			};
 		};
+
+	};
+
+	vrm@64 {
+		compatible = "intersil,isl68137";
+		reg = <0x64>;
+	};
+
+	vrm@40 {
+		compatible = "intersil,isl68137";
+		reg = <0x40>;
+	};
+
+	vrm@60 {
+		compatible = "intersil,isl68137";
+		reg = <0x60>;
+	};
+
+	vrm@43 {
+		compatible = "infineon,ir38064";
+		reg = <0x43>;
+	};
+
+	vrm@41 {
+		compatible = "intersil,isl68137";
+		reg = <0x41>;
 	};
 
 	/* Master selector PCA9541A @70h (other master: CPU0)
@@ -316,18 +342,47 @@
 	/* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
 	/* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */
 	/* CPU0 VR ISL68137 0.8V PMBUS @60h */
-	/* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @41h */
+	/* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @43h */
 	/* CPU0 VR ISL68137 1.2V CH47 PMBUS @41h */
+	/* Master selector PCA9541A @70h (other master: CPU0)
+	 *   LM5066I PMBUS @10h
+	 */
+	/* 12V SMPS Q54SH12050NNDH @61h */
 };
 
 &i2c8 {
 	status = "okay";
 
-	/* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */
-	/* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */
-	/* CPU1 VR ISL68137 0.8V PMBUS @61h */
+	vrm@64 {
+		compatible = "intersil,isl68137";
+		reg = <0x64>;
+	};
+
+	vrm@40 {
+		compatible = "intersil,isl68137";
+		reg = <0x40>;
+	};
+
+	vrm@41 {
+		compatible = "intersil,isl68137";
+		reg = <0x41>;
+	};
+
+	vrm@42 {
+		compatible = "infineon,ir38064";
+		reg = <0x42>;
+	};
+
+	vrm@60 {
+		compatible = "intersil,isl68137";
+		reg = <0x60>;
+	};
+
+	/* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @64h */
+	/* CPU1 VR ISL68137 1.2V CH03 PMBUS @40h */
+	/* CPU1 VR ISL68137 1.2V CH47 PMBUS @41h */
 	/* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */
-	/* CPU0 VR ISL68137 1.2V CH47 PMBUS @45h */
+	/* CPU1 VR ISL68137 0.8V PMBUS @60h */
 };
 
 
-- 
2.21.0.392.gf8f6787159e-goog

             reply	other threads:[~2019-04-12 14:42 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-12 14:42 Patrick Venture [this message]
2019-04-12 14:43 ` [PATCH dev-5.0] ARM: dts: aspeed: zaius: add Infineon and Intersil regulators Patrick Venture
2019-04-16 15:30 ` Patrick Venture
2019-04-18  6:17   ` Andrew Jeffery
2019-04-18 14:14     ` Patrick Venture
2019-04-18 14:28       ` Patrick Venture

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