From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lina Iyer Subject: Re: [PATCH v4 00/10] support wakeup capable GPIOs Date: Mon, 15 Apr 2019 09:56:45 -0600 Message-ID: <20190415155645.GA16124@codeaurora.org> References: <20190313211844.29416-1-ilina@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Marc Zyngier Cc: swboyd@chromium.org, evgreen@chromium.org, linux-kernel@vger.kernel.org, rplsssn@codeaurora.org, linux-arm-msm@vger.kernel.org, thierry.reding@gmail.com, bjorn.andersson@linaro.org, dianders@chromium.org, linus.walleij@linaro.org List-Id: linux-arm-msm@vger.kernel.org On Mon, Apr 15 2019 at 06:43 -0600, Marc Zyngier wrote: >On 13/03/2019 21:18, Lina Iyer wrote: >> Hi all, >> >> This series adds support for wakeup capable GPIOs. It is based on Thierry's >> hiearchical GPIO domains. This approach is based on Stephen's idea [1]. The SoC >> that is used for this development is a QCOM SDM845. The current patchset is >> rebased on top of 5.0 and adds documentation for the wakeup-parent and >> irqdomain-map DT properties along with the the optional irqdomain-map-mask and >> irqdomain-map-pass-thru properties. Also incorporating comments from Marc on >> the earlier submission [2]. I cleaned up some of the change history in these >> patches to match the version number with that of the submission. >> >> The dtsi patches are based on Bjorn's changes for increased address and cell >> size [3] and [4]. >> >> Kindly review the series. > >What the status of this? What is the expected merge strategy? > Hi Mark, I ran into a couple of issues, most of which have been sorted out. But there is a hardware requirement to write up another register (to set type), for GPIO wakeup that was missed earlier. I am trying to get that tested out. That's the hold up. Sorry about that. --Lina