From mboxrd@z Thu Jan 1 00:00:00 1970 From: Greg Kroah-Hartman Subject: [PATCH 5.0 084/117] drm/i915/dp: revert back to max link rate and lane count on eDP Date: Mon, 15 Apr 2019 21:00:54 +0200 Message-ID: <20190415183749.193873670@linuxfoundation.org> References: <20190415183744.887851196@linuxfoundation.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7C2B7898F5 for ; Mon, 15 Apr 2019 19:13:24 +0000 (UTC) In-Reply-To: <20190415183744.887851196@linuxfoundation.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: linux-kernel@vger.kernel.org Cc: Matteo Iervasi , Jani Nikula , Greg Kroah-Hartman , intel-gfx@lists.freedesktop.org, Albert Astals Cid , stable@vger.kernel.org, Emanuele Panigati List-Id: intel-gfx@lists.freedesktop.org RnJvbTogSmFuaSBOaWt1bGEgPGphbmkubmlrdWxhQGludGVsLmNvbT4KCmNvbW1pdCAyMTYzNWQ3 MzExNzM0ZDJkMWIxNzdmOGE5NWUyZjkzODYxNzRiNzZkIHVwc3RyZWFtLgoKQ29tbWl0IDc3Njlk YjU4ODM4NCAoImRybS9pOTE1L2RwOiBvcHRpbWl6ZSBlRFAgMS40KyBsaW5rIGNvbmZpZyBmYXN0 CmFuZCBuYXJyb3ciKSBzdGFydGVkIHRvIG9wdGl6ZSB0aGUgZURQIDEuNCsgbGluayBjb25maWcs IGJvdGggcGVyIHNwZWMKYW5kIGFzIHByZXBhcmF0aW9uIGZvciBkaXNwbGF5IHN0cmVhbSBjb21w cmVzc2lvbiBzdXBwb3J0LgoKU2FkbHksIHdlIGFnYWluIGZhY2UgcGFuZWxzIHRoYXQgZmxhdCBv dXQgZmFpbCB3aXRoIHBhcmFtZXRlcnMgdGhleQpjbGFpbSB0byBzdXBwb3J0LiBSZXZlcnQsIGFu ZCBnbyBiYWNrIHRvIHRoZSBkcmF3aW5nIGJvYXJkLgoKdjI6IEFjdHVhbGx5IHJldmVydCB0byBt YXggcGFyYW1zIGluc3RlYWQgb2YganVzdCB3aWRlLWFuZC1zbG93LgoKQnVnemlsbGE6IGh0dHBz Oi8vYnVncy5mcmVlZGVza3RvcC5vcmcvc2hvd19idWcuY2dpP2lkPTEwOTk1OQpGaXhlczogNzc2 OWRiNTg4Mzg0ICgiZHJtL2k5MTUvZHA6IG9wdGltaXplIGVEUCAxLjQrIGxpbmsgY29uZmlnIGZh c3QgYW5kIG5hcnJvdyIpCkNjOiBWaWxsZSBTeXJqw6Rsw6QgPHZpbGxlLnN5cmphbGFAbGludXgu aW50ZWwuY29tPgpDYzogTWFuYXNpIE5hdmFyZSA8bWFuYXNpLmQubmF2YXJlQGludGVsLmNvbT4K Q2M6IFJvZHJpZ28gVml2aSA8cm9kcmlnby52aXZpQGludGVsLmNvbT4KQ2M6IE1hdHQgQXR3b29k IDxtYXR0aGV3LnMuYXR3b29kQGludGVsLmNvbT4KQ2M6ICJMZWUsIFNoYXduIEMiIDxzaGF3bi5j LmxlZUBpbnRlbC5jb20+CkNjOiBEYXZlIEFpcmxpZSA8YWlybGllZEBnbWFpbC5jb20+CkNjOiBp bnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCkNjOiA8c3RhYmxlQHZnZXIua2VybmVsLm9y Zz4gIyB2NS4wKwpSZXZpZXdlZC1ieTogUm9kcmlnbyBWaXZpIDxyb2RyaWdvLnZpdmlAaW50ZWwu Y29tPgpSZXZpZXdlZC1ieTogTWFuYXNpIE5hdmFyZSA8bWFuYXNpLmQubmF2YXJlQGludGVsLmNv bT4KVGVzdGVkLWJ5OiBBbGJlcnQgQXN0YWxzIENpZCA8YWFjaWRAa2RlLm9yZz4gIyB2NS4wIGJh Y2twb3J0ClRlc3RlZC1ieTogRW1hbnVlbGUgUGFuaWdhdGkgPGlscGFuaWNoQGdtYWlsLmNvbT4g IyB2NS4wIGJhY2twb3J0ClRlc3RlZC1ieTogTWF0dGVvIEllcnZhc2kgPG1hdHRlb2llcnZhc2lA Z21haWwuY29tPiAjIHY1LjAgYmFja3BvcnQKU2lnbmVkLW9mZi1ieTogSmFuaSBOaWt1bGEgPGph bmkubmlrdWxhQGludGVsLmNvbT4KTGluazogaHR0cHM6Ly9wYXRjaHdvcmsuZnJlZWRlc2t0b3Au b3JnL3BhdGNoL21zZ2lkLzIwMTkwNDA1MDc1MjIwLjk4MTUtMS1qYW5pLm5pa3VsYUBpbnRlbC5j b20KKGNoZXJyeSBwaWNrZWQgZnJvbSBjb21taXQgZjExY2IxYzE5YWQwNTYzYjNjMWVhNWViMTZh NmJhYzBlNDAxZjQyOCkKU2lnbmVkLW9mZi1ieTogUm9kcmlnbyBWaXZpIDxyb2RyaWdvLnZpdmlA aW50ZWwuY29tPgpTaWduZWQtb2ZmLWJ5OiBHcmVnIEtyb2FoLUhhcnRtYW4gPGdyZWdraEBsaW51 eGZvdW5kYXRpb24ub3JnPgoKCi0tLQogZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZHAuYyB8 ICAgNjkgKysrKystLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQogMSBmaWxlIGNo YW5nZWQsIDEwIGluc2VydGlvbnMoKyksIDU5IGRlbGV0aW9ucygtKQoKLS0tIGEvZHJpdmVycy9n cHUvZHJtL2k5MTUvaW50ZWxfZHAuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9k cC5jCkBAIC0xODQ1LDQyICsxODQ1LDYgQEAgaW50ZWxfZHBfY29tcHV0ZV9saW5rX2NvbmZpZ193 aWRlKHN0cnVjdAogCXJldHVybiBmYWxzZTsKIH0KIAotLyogT3B0aW1pemUgbGluayBjb25maWcg aW4gb3JkZXI6IG1heCBicHAsIG1pbiBsYW5lcywgbWluIGNsb2NrICovCi1zdGF0aWMgYm9vbAot aW50ZWxfZHBfY29tcHV0ZV9saW5rX2NvbmZpZ19mYXN0KHN0cnVjdCBpbnRlbF9kcCAqaW50ZWxf ZHAsCi0JCQkJICBzdHJ1Y3QgaW50ZWxfY3J0Y19zdGF0ZSAqcGlwZV9jb25maWcsCi0JCQkJICBj b25zdCBzdHJ1Y3QgbGlua19jb25maWdfbGltaXRzICpsaW1pdHMpCi17Ci0Jc3RydWN0IGRybV9k aXNwbGF5X21vZGUgKmFkanVzdGVkX21vZGUgPSAmcGlwZV9jb25maWctPmJhc2UuYWRqdXN0ZWRf bW9kZTsKLQlpbnQgYnBwLCBjbG9jaywgbGFuZV9jb3VudDsKLQlpbnQgbW9kZV9yYXRlLCBsaW5r X2Nsb2NrLCBsaW5rX2F2YWlsOwotCi0JZm9yIChicHAgPSBsaW1pdHMtPm1heF9icHA7IGJwcCA+ PSBsaW1pdHMtPm1pbl9icHA7IGJwcCAtPSAyICogMykgewotCQltb2RlX3JhdGUgPSBpbnRlbF9k cF9saW5rX3JlcXVpcmVkKGFkanVzdGVkX21vZGUtPmNydGNfY2xvY2ssCi0JCQkJCQkgICBicHAp OwotCi0JCWZvciAobGFuZV9jb3VudCA9IGxpbWl0cy0+bWluX2xhbmVfY291bnQ7Ci0JCSAgICAg bGFuZV9jb3VudCA8PSBsaW1pdHMtPm1heF9sYW5lX2NvdW50OwotCQkgICAgIGxhbmVfY291bnQg PDw9IDEpIHsKLQkJCWZvciAoY2xvY2sgPSBsaW1pdHMtPm1pbl9jbG9jazsgY2xvY2sgPD0gbGlt aXRzLT5tYXhfY2xvY2s7IGNsb2NrKyspIHsKLQkJCQlsaW5rX2Nsb2NrID0gaW50ZWxfZHAtPmNv bW1vbl9yYXRlc1tjbG9ja107Ci0JCQkJbGlua19hdmFpbCA9IGludGVsX2RwX21heF9kYXRhX3Jh dGUobGlua19jbG9jaywKLQkJCQkJCQkJICAgIGxhbmVfY291bnQpOwotCi0JCQkJaWYgKG1vZGVf cmF0ZSA8PSBsaW5rX2F2YWlsKSB7Ci0JCQkJCXBpcGVfY29uZmlnLT5sYW5lX2NvdW50ID0gbGFu ZV9jb3VudDsKLQkJCQkJcGlwZV9jb25maWctPnBpcGVfYnBwID0gYnBwOwotCQkJCQlwaXBlX2Nv bmZpZy0+cG9ydF9jbG9jayA9IGxpbmtfY2xvY2s7Ci0KLQkJCQkJcmV0dXJuIHRydWU7Ci0JCQkJ fQotCQkJfQotCQl9Ci0JfQotCi0JcmV0dXJuIGZhbHNlOwotfQotCiBzdGF0aWMgaW50IGludGVs X2RwX2RzY19jb21wdXRlX2JwcChzdHJ1Y3QgaW50ZWxfZHAgKmludGVsX2RwLCB1OCBkc2NfbWF4 X2JwYykKIHsKIAlpbnQgaSwgbnVtX2JwYzsKQEAgLTIwMTMsMTUgKzE5NzcsMTMgQEAgaW50ZWxf ZHBfY29tcHV0ZV9saW5rX2NvbmZpZyhzdHJ1Y3QgaW50ZQogCWxpbWl0cy5taW5fYnBwID0gNiAq IDM7CiAJbGltaXRzLm1heF9icHAgPSBpbnRlbF9kcF9jb21wdXRlX2JwcChpbnRlbF9kcCwgcGlw ZV9jb25maWcpOwogCi0JaWYgKGludGVsX2RwX2lzX2VkcChpbnRlbF9kcCkgJiYgaW50ZWxfZHAt PmVkcF9kcGNkWzBdIDwgRFBfRURQXzE0KSB7CisJaWYgKGludGVsX2RwX2lzX2VkcChpbnRlbF9k cCkpIHsKIAkJLyoKIAkJICogVXNlIHRoZSBtYXhpbXVtIGNsb2NrIGFuZCBudW1iZXIgb2YgbGFu ZXMgdGhlIGVEUCBwYW5lbAotCQkgKiBhZHZlcnRpemVzIGJlaW5nIGNhcGFibGUgb2YuIFRoZSBl RFAgMS4zIGFuZCBlYXJsaWVyIHBhbmVscwotCQkgKiBhcmUgZ2VuZXJhbGx5IGRlc2lnbmVkIHRv IHN1cHBvcnQgb25seSBhIHNpbmdsZSBjbG9jayBhbmQKLQkJICogbGFuZSBjb25maWd1cmF0aW9u LCBhbmQgdHlwaWNhbGx5IHRoZXNlIHZhbHVlcyBjb3JyZXNwb25kIHRvCi0JCSAqIHRoZSBuYXRp dmUgcmVzb2x1dGlvbiBvZiB0aGUgcGFuZWwuIFdpdGggZURQIDEuNCByYXRlIHNlbGVjdAotCQkg KiBhbmQgRFNDLCB0aGlzIGlzIGRlY3JlYXNpbmdseSB0aGUgY2FzZSwgYW5kIHdlIG5lZWQgdG8g YmUKLQkJICogYWJsZSB0byBzZWxlY3QgbGVzcyB0aGFuIG1heGltdW0gbGluayBjb25maWcuCisJ CSAqIGFkdmVydGl6ZXMgYmVpbmcgY2FwYWJsZSBvZi4gVGhlIHBhbmVscyBhcmUgZ2VuZXJhbGx5 CisJCSAqIGRlc2lnbmVkIHRvIHN1cHBvcnQgb25seSBhIHNpbmdsZSBjbG9jayBhbmQgbGFuZQor CQkgKiBjb25maWd1cmF0aW9uLCBhbmQgdHlwaWNhbGx5IHRoZXNlIHZhbHVlcyBjb3JyZXNwb25k IHRvIHRoZQorCQkgKiBuYXRpdmUgcmVzb2x1dGlvbiBvZiB0aGUgcGFuZWwuCiAJCSAqLwogCQls aW1pdHMubWluX2xhbmVfY291bnQgPSBsaW1pdHMubWF4X2xhbmVfY291bnQ7CiAJCWxpbWl0cy5t aW5fY2xvY2sgPSBsaW1pdHMubWF4X2Nsb2NrOwpAQCAtMjAzNSwyMiArMTk5NywxMSBAQCBpbnRl bF9kcF9jb21wdXRlX2xpbmtfY29uZmlnKHN0cnVjdCBpbnRlCiAJCSAgICAgIGludGVsX2RwLT5j b21tb25fcmF0ZXNbbGltaXRzLm1heF9jbG9ja10sCiAJCSAgICAgIGxpbWl0cy5tYXhfYnBwLCBh ZGp1c3RlZF9tb2RlLT5jcnRjX2Nsb2NrKTsKIAotCWlmIChpbnRlbF9kcF9pc19lZHAoaW50ZWxf ZHApKQotCQkvKgotCQkgKiBPcHRpbWl6ZSBmb3IgZmFzdCBhbmQgbmFycm93LiBlRFAgMS4zIHNl Y3Rpb24gMy4zIGFuZCBlRFAgMS40Ci0JCSAqIHNlY3Rpb24gQS4xOiAiSXQgaXMgcmVjb21tZW5k ZWQgdGhhdCB0aGUgbWluaW11bSBudW1iZXIgb2YKLQkJICogbGFuZXMgYmUgdXNlZCwgdXNpbmcg dGhlIG1pbmltdW0gbGluayByYXRlIGFsbG93ZWQgZm9yIHRoYXQKLQkJICogbGFuZSBjb25maWd1 cmF0aW9uLiIKLQkJICoKLQkJICogTm90ZSB0aGF0IHdlIHVzZSB0aGUgbWF4IGNsb2NrIGFuZCBs YW5lIGNvdW50IGZvciBlRFAgMS4zIGFuZAotCQkgKiBlYXJsaWVyLCBhbmQgZmFzdCB2cy4gd2lk ZSBpcyBpcnJlbGV2YW50LgotCQkgKi8KLQkJcmV0ID0gaW50ZWxfZHBfY29tcHV0ZV9saW5rX2Nv bmZpZ19mYXN0KGludGVsX2RwLCBwaXBlX2NvbmZpZywKLQkJCQkJCQkmbGltaXRzKTsKLQllbHNl Ci0JCS8qIE9wdGltaXplIGZvciBzbG93IGFuZCB3aWRlLiAqLwotCQlyZXQgPSBpbnRlbF9kcF9j b21wdXRlX2xpbmtfY29uZmlnX3dpZGUoaW50ZWxfZHAsIHBpcGVfY29uZmlnLAotCQkJCQkJCSZs aW1pdHMpOworCS8qCisJICogT3B0aW1pemUgZm9yIHNsb3cgYW5kIHdpZGUuIFRoaXMgaXMgdGhl IHBsYWNlIHRvIGFkZCBhbHRlcm5hdGl2ZQorCSAqIG9wdGltaXphdGlvbiBwb2xpY3kuCisJICov CisJcmV0ID0gaW50ZWxfZHBfY29tcHV0ZV9saW5rX2NvbmZpZ193aWRlKGludGVsX2RwLCBwaXBl X2NvbmZpZywgJmxpbWl0cyk7CiAKIAkvKiBlbmFibGUgY29tcHJlc3Npb24gaWYgdGhlIG1vZGUg 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+0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1555355604; bh=Jf6Wm65SfGaJn1IcUhbm1cKC+SgNvHZK51elKDsBxXI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ozkEuO0oms9m2xqgFb14HYm4jbdHFKokRCw7fwxVxk71vyY9Fwg366UYrJI1S5RZM +9YK3tCJkjz5IJ3JD9nKji9SKqbVhb+G9GCezNtXfEBAFd4grs1Ih00XoeUuPwxvOr rbDGIREf1bFY2hJo+2+D00byQ/VhlzunX4Ngn1LU= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Manasi Navare , Rodrigo Vivi , Matt Atwood , "Lee, Shawn C" , Dave Airlie , intel-gfx@lists.freedesktop.org, Jani Nikula , Albert Astals Cid , Emanuele Panigati , Matteo Iervasi Subject: [PATCH 5.0 084/117] drm/i915/dp: revert back to max link rate and lane count on eDP Date: Mon, 15 Apr 2019 21:00:54 +0200 Message-Id: <20190415183749.193873670@linuxfoundation.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190415183744.887851196@linuxfoundation.org> References: <20190415183744.887851196@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jani Nikula commit 21635d7311734d2d1b177f8a95e2f9386174b76d upstream. Commit 7769db588384 ("drm/i915/dp: optimize eDP 1.4+ link config fast and narrow") started to optize the eDP 1.4+ link config, both per spec and as preparation for display stream compression support. Sadly, we again face panels that flat out fail with parameters they claim to support. Revert, and go back to the drawing board. v2: Actually revert to max params instead of just wide-and-slow. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109959 Fixes: 7769db588384 ("drm/i915/dp: optimize eDP 1.4+ link config fast and narrow") Cc: Ville Syrjälä Cc: Manasi Navare Cc: Rodrigo Vivi Cc: Matt Atwood Cc: "Lee, Shawn C" Cc: Dave Airlie Cc: intel-gfx@lists.freedesktop.org Cc: # v5.0+ Reviewed-by: Rodrigo Vivi Reviewed-by: Manasi Navare Tested-by: Albert Astals Cid # v5.0 backport Tested-by: Emanuele Panigati # v5.0 backport Tested-by: Matteo Iervasi # v5.0 backport Signed-off-by: Jani Nikula Link: https://patchwork.freedesktop.org/patch/msgid/20190405075220.9815-1-jani.nikula@intel.com (cherry picked from commit f11cb1c19ad0563b3c1ea5eb16a6bac0e401f428) Signed-off-by: Rodrigo Vivi Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/i915/intel_dp.c | 69 +++++----------------------------------- 1 file changed, 10 insertions(+), 59 deletions(-) --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1845,42 +1845,6 @@ intel_dp_compute_link_config_wide(struct return false; } -/* Optimize link config in order: max bpp, min lanes, min clock */ -static bool -intel_dp_compute_link_config_fast(struct intel_dp *intel_dp, - struct intel_crtc_state *pipe_config, - const struct link_config_limits *limits) -{ - struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; - int bpp, clock, lane_count; - int mode_rate, link_clock, link_avail; - - for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) { - mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock, - bpp); - - for (lane_count = limits->min_lane_count; - lane_count <= limits->max_lane_count; - lane_count <<= 1) { - for (clock = limits->min_clock; clock <= limits->max_clock; clock++) { - link_clock = intel_dp->common_rates[clock]; - link_avail = intel_dp_max_data_rate(link_clock, - lane_count); - - if (mode_rate <= link_avail) { - pipe_config->lane_count = lane_count; - pipe_config->pipe_bpp = bpp; - pipe_config->port_clock = link_clock; - - return true; - } - } - } - } - - return false; -} - static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc) { int i, num_bpc; @@ -2013,15 +1977,13 @@ intel_dp_compute_link_config(struct inte limits.min_bpp = 6 * 3; limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config); - if (intel_dp_is_edp(intel_dp) && intel_dp->edp_dpcd[0] < DP_EDP_14) { + if (intel_dp_is_edp(intel_dp)) { /* * Use the maximum clock and number of lanes the eDP panel - * advertizes being capable of. The eDP 1.3 and earlier panels - * are generally designed to support only a single clock and - * lane configuration, and typically these values correspond to - * the native resolution of the panel. With eDP 1.4 rate select - * and DSC, this is decreasingly the case, and we need to be - * able to select less than maximum link config. + * advertizes being capable of. The panels are generally + * designed to support only a single clock and lane + * configuration, and typically these values correspond to the + * native resolution of the panel. */ limits.min_lane_count = limits.max_lane_count; limits.min_clock = limits.max_clock; @@ -2035,22 +1997,11 @@ intel_dp_compute_link_config(struct inte intel_dp->common_rates[limits.max_clock], limits.max_bpp, adjusted_mode->crtc_clock); - if (intel_dp_is_edp(intel_dp)) - /* - * Optimize for fast and narrow. eDP 1.3 section 3.3 and eDP 1.4 - * section A.1: "It is recommended that the minimum number of - * lanes be used, using the minimum link rate allowed for that - * lane configuration." - * - * Note that we use the max clock and lane count for eDP 1.3 and - * earlier, and fast vs. wide is irrelevant. - */ - ret = intel_dp_compute_link_config_fast(intel_dp, pipe_config, - &limits); - else - /* Optimize for slow and wide. */ - ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, - &limits); + /* + * Optimize for slow and wide. This is the place to add alternative + * optimization policy. + */ + ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits); /* enable compression if the mode doesn't fit available BW */ if (!ret) {