From: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
To: npiggin@gmail.com, paulus@samba.org, mpe@ellerman.id.au,
Christophe Leroy <christophe.leroy@c-s.fr>
Cc: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>,
linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v3 2/6] powerpc/mm: Remove PPC_MM_SLICES #ifdef for book3s64
Date: Wed, 17 Apr 2019 18:33:47 +0530 [thread overview]
Message-ID: <20190417130351.3805-3-aneesh.kumar@linux.ibm.com> (raw)
In-Reply-To: <20190417130351.3805-1-aneesh.kumar@linux.ibm.com>
Book3s64 always have PPC_MM_SLICES enabled. So remove the unncessary #ifdef
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
---
arch/powerpc/include/asm/book3s/64/mmu.h | 4 ----
arch/powerpc/include/asm/book3s/64/slice.h | 13 -------------
2 files changed, 17 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
index 1ceee000c18d..484a8ff9b338 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu.h
@@ -123,7 +123,6 @@ typedef struct {
/* NPU NMMU context */
struct npu_context *npu_context;
-#ifdef CONFIG_PPC_MM_SLICES
/* SLB page size encodings*/
unsigned char low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE];
unsigned char high_slices_psize[SLICE_ARRAY_SIZE];
@@ -136,9 +135,6 @@ typedef struct {
struct slice_mask mask_16m;
struct slice_mask mask_16g;
# endif
-#else
- u16 sllp; /* SLB page size encoding */
-#endif
unsigned long vdso_base;
#ifdef CONFIG_PPC_SUBPAGE_PROT
struct subpage_prot_table spt;
diff --git a/arch/powerpc/include/asm/book3s/64/slice.h b/arch/powerpc/include/asm/book3s/64/slice.h
index db0dedab65ee..062e11136e9c 100644
--- a/arch/powerpc/include/asm/book3s/64/slice.h
+++ b/arch/powerpc/include/asm/book3s/64/slice.h
@@ -2,8 +2,6 @@
#ifndef _ASM_POWERPC_BOOK3S_64_SLICE_H
#define _ASM_POWERPC_BOOK3S_64_SLICE_H
-#ifdef CONFIG_PPC_MM_SLICES
-
#define SLICE_LOW_SHIFT 28
#define SLICE_LOW_TOP (0x100000000ul)
#define SLICE_NUM_LOW (SLICE_LOW_TOP >> SLICE_LOW_SHIFT)
@@ -13,15 +11,4 @@
#define SLICE_NUM_HIGH (H_PGTABLE_RANGE >> SLICE_HIGH_SHIFT)
#define GET_HIGH_SLICE_INDEX(addr) ((addr) >> SLICE_HIGH_SHIFT)
-#else /* CONFIG_PPC_MM_SLICES */
-
-#define get_slice_psize(mm, addr) ((mm)->context.user_psize)
-#define slice_set_user_psize(mm, psize) \
-do { \
- (mm)->context.user_psize = (psize); \
- (mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \
-} while (0)
-
-#endif /* CONFIG_PPC_MM_SLICES */
-
#endif /* _ASM_POWERPC_BOOK3S_64_SLICE_H */
--
2.20.1
next prev parent reply other threads:[~2019-04-17 13:27 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-17 13:03 [PATCH v3 0/6] Reduce memory usage for mm_context_t Aneesh Kumar K.V
2019-04-17 13:03 ` [PATCH v3 1/6] powerpc/mm/radix: Do slb preload only with hash translation mode Aneesh Kumar K.V
2019-04-17 13:03 ` Aneesh Kumar K.V [this message]
2019-04-21 14:19 ` [v3,2/6] powerpc/mm: Remove PPC_MM_SLICES #ifdef for book3s64 Michael Ellerman
2019-04-17 13:03 ` [PATCH v3 3/6] powerpc/mm: Add helpers for accessing hash translation related variables Aneesh Kumar K.V
2019-04-24 10:16 ` Christophe Leroy
2019-04-17 13:03 ` [PATCH v3 4/6] powerpc/mm: Move slb_addr_linit to early_init_mmu Aneesh Kumar K.V
2019-04-17 13:03 ` [PATCH v3 5/6] powerpc/mm: Reduce memory usage for mm_context_t for radix Aneesh Kumar K.V
2019-04-24 12:54 ` Christophe Leroy
2019-04-26 4:50 ` Aneesh Kumar K.V
2019-04-17 13:03 ` [PATCH v3 6/6] powerc/mm/hash: Reduce hash_mm_context size Aneesh Kumar K.V
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