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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Shashank Sharma <shashank.sharma@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 3/4] drm/i915: Rename ivb_load_lut_10_max
Date: Fri, 3 May 2019 18:06:41 +0300	[thread overview]
Message-ID: <20190503150641.GR24299@intel.com> (raw)
In-Reply-To: <20190430152108.31814-4-shashank.sharma@intel.com>

On Tue, Apr 30, 2019 at 08:51:07PM +0530, Shashank Sharma wrote:
> This patch renames function ivb_load_lut_10_max to
> ivb_load_lut_ext_max.
> 
> Cc: Uma Shankar <uma.shankar@intel.com>
> Suggested-by: Ville Syrjala <ville.syrjala@linux.intel.com>
> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_color.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
> index 962db1236970..6c341bea514c 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -607,7 +607,7 @@ static void bdw_load_lut_10(struct intel_crtc *crtc,
>  	I915_WRITE(PREC_PAL_INDEX(pipe), 0);
>  }
>  
> -static void ivb_load_lut_10_max(struct intel_crtc *crtc)
> +static void ivb_load_lut_ext_max(struct intel_crtc *crtc)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
> @@ -640,7 +640,7 @@ static void ivb_load_luts(const struct intel_crtc_state *crtc_state)
>  	} else if (crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT) {
>  		ivb_load_lut_10(crtc, degamma_lut, PAL_PREC_SPLIT_MODE |
>  				PAL_PREC_INDEX_VALUE(0));
> -		ivb_load_lut_10_max(crtc);
> +		ivb_load_lut_ext_max(crtc);
>  		ivb_load_lut_10(crtc, gamma_lut, PAL_PREC_SPLIT_MODE |
>  				PAL_PREC_INDEX_VALUE(512));
>  	} else {
> @@ -648,7 +648,7 @@ static void ivb_load_luts(const struct intel_crtc_state *crtc_state)
>  
>  		ivb_load_lut_10(crtc, blob,
>  				PAL_PREC_INDEX_VALUE(0));
> -		ivb_load_lut_10_max(crtc);
> +		ivb_load_lut_ext_max(crtc);
>  	}
>  }
>  
> @@ -663,7 +663,7 @@ static void bdw_load_luts(const struct intel_crtc_state *crtc_state)
>  	} else if (crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT) {
>  		bdw_load_lut_10(crtc, degamma_lut, PAL_PREC_SPLIT_MODE |
>  				PAL_PREC_INDEX_VALUE(0));
> -		ivb_load_lut_10_max(crtc);
> +		ivb_load_lut_ext_max(crtc);
>  		bdw_load_lut_10(crtc, gamma_lut, PAL_PREC_SPLIT_MODE |
>  				PAL_PREC_INDEX_VALUE(512));
>  	} else {
> @@ -671,7 +671,7 @@ static void bdw_load_luts(const struct intel_crtc_state *crtc_state)
>  
>  		bdw_load_lut_10(crtc, blob,
>  				PAL_PREC_INDEX_VALUE(0));
> -		ivb_load_lut_10_max(crtc);
> +		ivb_load_lut_ext_max(crtc);
>  	}
>  }
>  
> @@ -763,7 +763,7 @@ static void glk_load_luts(const struct intel_crtc_state *crtc_state)
>  		i9xx_load_luts(crtc_state);
>  	} else {
>  		bdw_load_lut_10(crtc, gamma_lut, PAL_PREC_INDEX_VALUE(0));
> -		ivb_load_lut_10_max(crtc);
> +		ivb_load_lut_ext_max(crtc);
>  	}
>  }
>  
> @@ -780,7 +780,7 @@ static void icl_load_luts(const struct intel_crtc_state *crtc_state)
>  		i9xx_load_luts(crtc_state);
>  	} else {
>  		bdw_load_lut_10(crtc, gamma_lut, PAL_PREC_INDEX_VALUE(0));
> -		ivb_load_lut_10_max(crtc);
> +		ivb_load_lut_ext_max(crtc);
>  	}
>  }
>  
> -- 
> 2.17.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-05-03 15:06 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-30 15:21 [PATCH v2 0/4] Enable Multi-segmented-gamma for ICL Shashank Sharma
2019-04-30 15:21 ` [PATCH v2 1/4] drm/i915: Change gamma/degamma_lut_size data type to u32 Shashank Sharma
2019-04-30 15:21 ` [PATCH v2 2/4] drm/i915/icl: Add register definitions for Multi Segmented gamma Shashank Sharma
2019-05-03 15:05   ` Ville Syrjälä
2019-05-06 10:32     ` Sharma, Shashank
2019-04-30 15:21 ` [PATCH v2 3/4] drm/i915: Rename ivb_load_lut_10_max Shashank Sharma
2019-05-03 15:06   ` Ville Syrjälä [this message]
2019-04-30 15:21 ` [PATCH v2 4/4] drm/i915/icl: Add Multi-segmented gamma support Shashank Sharma
2019-05-03 15:50   ` Ville Syrjälä
2019-05-06 10:39     ` Sharma, Shashank
2019-05-06 12:25       ` Ville Syrjälä
2019-05-06 12:55         ` Sharma, Shashank
2019-05-06 13:11           ` Ville Syrjälä
2019-05-06 13:14             ` Sharma, Shashank
2019-05-06 13:26               ` Ville Syrjälä
2019-04-30 16:27 ` ✗ Fi.CI.CHECKPATCH: warning for Enable Multi-segmented-gamma for ICL Patchwork
2019-04-30 16:50 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-01 12:34 ` ✗ Fi.CI.IGT: failure " Patchwork

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