From: Lukasz Majewski <lukma@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [i.MX8MM+CCF 10/41] divider set rate supporrt
Date: Tue, 7 May 2019 00:08:28 +0200 [thread overview]
Message-ID: <20190507000828.25f50c0e@jawa> (raw)
In-Reply-To: <20190430103056.32537-11-peng.fan@nxp.com>
On Tue, 30 Apr 2019 10:18:05 +0000
Peng Fan <peng.fan@nxp.com> wrote:
Please state the exact SHA1 or tag when porting the code from Linux
kernel.
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> drivers/clk/clk-divider.c | 88
> +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 88
> insertions(+)
>
> diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
> index 2f09e0bb58..8615f9815d 100644
> --- a/drivers/clk/clk-divider.c
> +++ b/drivers/clk/clk-divider.c
> @@ -18,6 +18,7 @@
> #include <dm/lists.h>
> #include <dm/device-internal.h>
> #include <linux/clk-provider.h>
> +#include <linux/log2.h>
> #include <div64.h>
> #include <clk.h>
> #include "clk.h"
> @@ -81,8 +82,95 @@ static ulong clk_divider_recalc_rate(struct clk
> *clk) divider->flags, divider->width);
> }
>
> +static bool _is_valid_table_div(const struct clk_div_table *table,
> + unsigned int div)
> +{
> + const struct clk_div_table *clkt;
> +
> + for (clkt = table; clkt->div; clkt++)
> + if (clkt->div == div)
> + return true;
> + return false;
> +}
> +
> +static bool _is_valid_div(const struct clk_div_table *table,
> unsigned int div,
> + unsigned long flags)
> +{
> + if (flags & CLK_DIVIDER_POWER_OF_TWO)
> + return is_power_of_2(div);
> + if (table)
> + return _is_valid_table_div(table, div);
> + return true;
> +}
> +
> +static unsigned int _get_table_val(const struct clk_div_table *table,
> + unsigned int div)
> +{
> + const struct clk_div_table *clkt;
> +
> + for (clkt = table; clkt->div; clkt++)
> + if (clkt->div == div)
> + return clkt->val;
> + return 0;
> +}
> +
> +static unsigned int _get_val(const struct clk_div_table *table,
> + unsigned int div, unsigned long flags,
> u8 width) +{
> + if (flags & CLK_DIVIDER_ONE_BASED)
> + return div;
> + if (flags & CLK_DIVIDER_POWER_OF_TWO)
> + return __ffs(div);
> + if (flags & CLK_DIVIDER_MAX_AT_ZERO)
> + return (div == clk_div_mask(width) + 1) ? 0 : div;
> + if (table)
> + return _get_table_val(table, div);
> + return div - 1;
> +}
> +int divider_get_val(unsigned long rate, unsigned long parent_rate,
> + const struct clk_div_table *table, u8 width,
> + unsigned long flags)
> +{
> + unsigned int div, value;
> +
> + div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
> +
> + if (!_is_valid_div(table, div, flags))
> + return -EINVAL;
> +
> + value = _get_val(table, div, flags, width);
> +
> + return min_t(unsigned int, value, clk_div_mask(width));
> +}
> +
> +static ulong clk_divider_set_rate(struct clk *clk, unsigned long
> rate) +{
> + struct clk_divider *divider =
> to_clk_divider(clk_dev_binded(clk) ?
> + (struct clk
> *)dev_get_driver_data(clk->dev) : clk);
> + unsigned long parent_rate = clk_get_parent_rate(clk);
> + int value;
> + u32 val;
> +
> + value = divider_get_val(rate, parent_rate, divider->table,
> + divider->width, divider->flags);
> + if (value < 0)
> + return value;
> +
> + if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
> + val = clk_div_mask(divider->width) <<
> (divider->shift + 16);
> + } else {
> + val = readl(divider->reg);
> + val &= ~(clk_div_mask(divider->width) <<
> divider->shift);
> + }
> + val |= (u32)value << divider->shift;
> + writel(val, divider->reg);
> +
> + return clk_get_rate(clk);
> +}
> +
> const struct clk_ops clk_divider_ops = {
> .get_rate = clk_divider_recalc_rate,
> + .set_rate = clk_divider_set_rate,
> };
>
> static struct clk *_register_divider(struct device *dev, const char
> *name,
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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next prev parent reply other threads:[~2019-05-06 22:08 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-30 10:17 [U-Boot] [i.MX8MM+CCF 00/41] i.MX8MM + CCF Peng Fan
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 01/41] clk: correct get clk_x pointer Peng Fan
2019-05-06 21:36 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 02/41] clk: fixed-factor: fix get clk_fixed_factor Peng Fan
2019-05-06 21:41 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 03/41] clk: introduce clk_dev_binded Peng Fan
2019-05-06 21:57 ` Lukasz Majewski
2019-05-07 13:22 ` Peng Fan
2019-05-08 7:30 ` Lukasz Majewski
2019-05-08 7:41 ` Peng Fan
2019-05-08 22:24 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 04/41] clk: use clk_dev_binded Peng Fan
2019-05-06 21:59 ` Lukasz Majewski
2019-05-08 7:27 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 05/41] clk-provider: sync more clk flags from Linux Kernel Peng Fan
2019-05-06 22:01 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 06/41] cmd: clk: print err value when clk_get_rate failed Peng Fan
2019-05-06 22:03 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 07/41] clk: mux: add set parent support Peng Fan
2019-05-06 22:04 ` Lukasz Majewski
2019-05-07 13:23 ` Peng Fan
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 08/41] clk: export mux/divider ops Peng Fan
2019-05-06 22:06 ` Lukasz Majewski
2019-05-07 13:25 ` Peng Fan
2019-05-08 6:31 ` Lukasz Majewski
2019-05-08 6:35 ` Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 09/41] clk: add clk-gate support Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 10/41] divider set rate supporrt Peng Fan
2019-05-06 22:08 ` Lukasz Majewski [this message]
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 11/41] clk: fixed_rate: export clk_fixed_rate Peng Fan
2019-05-06 22:15 ` Lukasz Majewski
2019-05-07 13:27 ` Peng Fan
2019-05-08 6:46 ` Lukasz Majewski
2019-05-08 6:51 ` Peng Fan
2019-05-08 7:40 ` Lukasz Majewski
2019-05-08 7:45 ` Peng Fan
2019-05-08 22:27 ` Lukasz Majewski
2019-05-09 1:13 ` Peng Fan
2019-05-16 8:55 ` Lukasz Majewski
2019-05-16 9:58 ` Peng Fan
2019-05-16 10:08 ` Lukasz Majewski
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 12/41] clk: fixed_rate: add pre reloc flag Peng Fan
2019-05-06 22:16 ` Lukasz Majewski
2019-05-07 13:29 ` Peng Fan
2019-05-07 14:00 ` Bin Meng
2019-05-08 7:00 ` Lukasz Majewski
2019-05-08 6:57 ` Lukasz Majewski
2019-05-08 7:21 ` Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 13/41] clk: imx: import clk heplers Peng Fan
2019-05-06 22:17 ` Lukasz Majewski
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 14/41] clk: imx: gate2 add set rate Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 15/41] linux: compat: guard PAGE_SIZE Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 16/41] drivers: core: use strcmp when find device by name Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 17/41] ddr: imx8m: fix ddr firmware location when enable SPL OF Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 18/41] imx: add IMX8MQ kconfig entry Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 19/41] imx: add IMX8MM " Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 20/41] imx: imx8mm: add clock bindings header Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 21/41] imx: add i.MX8MM cpu type Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 22/41] imx: spl: add spl_board_boot_device for i.MX8MM Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 23/41] imx8m: update imx-regs " Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 24/41] imx: add get_cpu_rev support " Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 25/41] imx8m: rename clock to clock_imx8mq Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 26/41] imx8m: restructure clock.h Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 27/41] imx8m: add clk support for i.MX8MM Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 28/41] imx8m: soc: probe clk before relocation Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 29/41] imx8m: add pin header for i.MX8MM Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 30/41] imx: add i.MX8MM PE property Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 31/41] imx8m: Fix MMU table issue for OPTEE memory Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 32/41] imx8m: set BYPASS ID SWAP to avoid AXI bus errors Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 33/41] imx8m: Configure trustzone region 0 for non-secure access Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 34/41] imx8m: soc: enable SCTR clock before timer init Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 35/41] serial: Kconfig: make MXC_UART usable for MX7 and IMX8M Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 36/41] clk: imx: add Kconfig entry for i.MX8MM Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 37/41] clk: imx: add pll14xx driver Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 38/41] clk: add composite clk support Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 39/41] clk: imx: add i.MX8MM " Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 40/41] clk: imx: add i.MX8MM clk driver Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 41/41] imx: add i.MX8MM EVK board support Peng Fan
2019-05-06 7:57 ` [U-Boot] [i.MX8MM+CCF 00/41] i.MX8MM + CCF Schrempf Frieder
2019-05-06 8:26 ` Schrempf Frieder
2019-05-06 9:08 ` Peng Fan
2019-05-06 9:55 ` Lukasz Majewski
2019-05-06 21:32 ` Lukasz Majewski
2019-05-07 13:16 ` Peng Fan
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