From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sasha Levin Subject: [PATCH AUTOSEL 4.4 14/14] gpu: ipu-v3: dp: fix CSC handling Date: Tue, 7 May 2019 01:42:16 -0400 Message-ID: <20190507054218.340-14-sashal@kernel.org> References: <20190507054218.340-1-sashal@kernel.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id 307C589D5C for ; Tue, 7 May 2019 05:42:46 +0000 (UTC) In-Reply-To: <20190507054218.340-1-sashal@kernel.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Sasha Levin , dri-devel@lists.freedesktop.org, Jonathan Marek List-Id: dri-devel@lists.freedesktop.org RnJvbTogTHVjYXMgU3RhY2ggPGwuc3RhY2hAcGVuZ3V0cm9uaXguZGU+CgpbIFVwc3RyZWFtIGNv bW1pdCBkNGZhZDBhNDI2YzZlMjZmNDhjOWE3Y2RkMjFhN2ZlOWMxOThkNjQ1IF0KCkluaXRpYWxp emUgdGhlIGZsb3cgaW5wdXQgY29sb3JzcGFjZXMgdG8gdW5rbm93biBhbmQgcmVzZXQgdG8gdGhh dCB2YWx1ZQp3aGVuIHRoZSBjaGFubmVsIGdldHMgZGlzYWJsZWQuIFRoaXMgYXZvaWRzIHRoZSBz dGF0ZSBnZXR0aW5nIG1peGVkIHVwCndpdGggYSBwcmV2aW91cyBtb2RlLgoKQWxzbyBrZWVwIHRo ZSBDU0Mgc2V0dGluZ3MgZm9yIHRoZSBiYWNrZ3JvdW5kIGZsb3cgaW50YWN0IHdoZW4gZGlzYWJs aW5nCnRoZSBmb3JlZ3JvdW5kIGZsb3cuCgpSb290LWNhdXNlZC1ieTogSm9uYXRoYW4gTWFyZWsg PGpvbmF0aGFuQG1hcmVrLmNhPgpTaWduZWQtb2ZmLWJ5OiBMdWNhcyBTdGFjaCA8bC5zdGFjaEBw ZW5ndXRyb25peC5kZT4KU2lnbmVkLW9mZi1ieTogUGhpbGlwcCBaYWJlbCA8cC56YWJlbEBwZW5n dXRyb25peC5kZT4KU2lnbmVkLW9mZi1ieTogU2FzaGEgTGV2aW4gPHNhc2hhbEBrZXJuZWwub3Jn PgotLS0KIGRyaXZlcnMvZ3B1L2lwdS12My9pcHUtZHAuYyB8IDEyICsrKysrKysrKy0tLQogMSBm aWxlIGNoYW5nZWQsIDkgaW5zZXJ0aW9ucygrKSwgMyBkZWxldGlvbnMoLSkKCmRpZmYgLS1naXQg YS9kcml2ZXJzL2dwdS9pcHUtdjMvaXB1LWRwLmMgYi9kcml2ZXJzL2dwdS9pcHUtdjMvaXB1LWRw LmMKaW5kZXggOTg2ODZlZGJjZGJiLi4zM2RlM2ExYmFjNDkgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMv Z3B1L2lwdS12My9pcHUtZHAuYworKysgYi9kcml2ZXJzL2dwdS9pcHUtdjMvaXB1LWRwLmMKQEAg LTE5NSw3ICsxOTUsOCBAQCBpbnQgaXB1X2RwX3NldHVwX2NoYW5uZWwoc3RydWN0IGlwdV9kcCAq ZHAsCiAJCWlwdV9kcF9jc2NfaW5pdChmbG93LCBmbG93LT5mb3JlZ3JvdW5kLmluX2NzLCBmbG93 LT5vdXRfY3MsCiAJCQkJRFBfQ09NX0NPTkZfQ1NDX0RFRl9CT1RIKTsKIAl9IGVsc2UgewotCQlp ZiAoZmxvdy0+Zm9yZWdyb3VuZC5pbl9jcyA9PSBmbG93LT5vdXRfY3MpCisJCWlmIChmbG93LT5m b3JlZ3JvdW5kLmluX2NzID09IElQVVYzX0NPTE9SU1BBQ0VfVU5LTk9XTiB8fAorCQkgICAgZmxv dy0+Zm9yZWdyb3VuZC5pbl9jcyA9PSBmbG93LT5vdXRfY3MpCiAJCQkvKgogCQkJICogZm9yZWdy b3VuZCBpZGVudGljYWwgdG8gb3V0cHV0LCBhcHBseSBjb2xvcgogCQkJICogY29udmVyc2lvbiBv biBiYWNrZ3JvdW5kCkBAIC0yNjEsNiArMjYyLDggQEAgdm9pZCBpcHVfZHBfZGlzYWJsZV9jaGFu bmVsKHN0cnVjdCBpcHVfZHAgKmRwKQogCXN0cnVjdCBpcHVfZHBfcHJpdiAqcHJpdiA9IGZsb3ct PnByaXY7CiAJdTMyIHJlZywgY3NjOwogCisJZHAtPmluX2NzID0gSVBVVjNfQ09MT1JTUEFDRV9V TktOT1dOOworCiAJaWYgKCFkcC0+Zm9yZWdyb3VuZCkKIAkJcmV0dXJuOwogCkBAIC0yNjgsOCAr MjcxLDkgQEAgdm9pZCBpcHVfZHBfZGlzYWJsZV9jaGFubmVsKHN0cnVjdCBpcHVfZHAgKmRwKQog CiAJcmVnID0gcmVhZGwoZmxvdy0+YmFzZSArIERQX0NPTV9DT05GKTsKIAljc2MgPSByZWcgJiBE UF9DT01fQ09ORl9DU0NfREVGX01BU0s7Ci0JaWYgKGNzYyA9PSBEUF9DT01fQ09ORl9DU0NfREVG X0ZHKQotCQlyZWcgJj0gfkRQX0NPTV9DT05GX0NTQ19ERUZfTUFTSzsKKwlyZWcgJj0gfkRQX0NP TV9DT05GX0NTQ19ERUZfTUFTSzsKKwlpZiAoY3NjID09IERQX0NPTV9DT05GX0NTQ19ERUZfQk9U SCB8fCBjc2MgPT0gRFBfQ09NX0NPTkZfQ1NDX0RFRl9CRykKKwkJcmVnIHw9IERQX0NPTV9DT05G X0NTQ19ERUZfQkc7CiAKIAlyZWcgJj0gfkRQX0NPTV9DT05GX0ZHX0VOOwogCXdyaXRlbChyZWcs IGZsb3ctPmJhc2UgKyBEUF9DT01fQ09ORik7CkBAIC0zNTAsNiArMzU0LDggQEAgaW50IGlwdV9k cF9pbml0KHN0cnVjdCBpcHVfc29jICppcHUsIHN0cnVjdCBkZXZpY2UgKmRldiwgdW5zaWduZWQg bG9uZyBiYXNlKQogCW11dGV4X2luaXQoJnByaXYtPm11dGV4KTsKIAogCWZvciAoaSA9IDA7IGkg PCBJUFVWM19OVU1fRkxPV1M7IGkrKykgeworCQlwcml2LT5mbG93W2ldLmJhY2tncm91bmQuaW5f Y3MgPSBJUFVWM19DT0xPUlNQQUNFX1VOS05PV047CisJCXByaXYtPmZsb3dbaV0uZm9yZWdyb3Vu ZC5pbl9jcyA9IElQVVYzX0NPTE9SU1BBQ0VfVU5LTk9XTjsKIAkJcHJpdi0+Zmxvd1tpXS5mb3Jl Z3JvdW5kLmZvcmVncm91bmQgPSB0cnVlOwogCQlwcml2LT5mbG93W2ldLmJhc2UgPSBwcml2LT5i YXNlICsgaXB1X2RwX2Zsb3dfYmFzZVtpXTsKIAkJcHJpdi0+Zmxvd1tpXS5wcml2ID0gcHJpdjsK LS0gCjIuMjAuMQoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3Jn Cmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVs From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS, T_DKIMWL_WL_HIGH,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 858E7C004C9 for ; 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Tue, 7 May 2019 05:42:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1557207766; bh=8NQddyDvhDHI0W0/+44DvOna4t2fOYlxJuDCeJ9gO48=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qFg1e1WBhhj//ieFrItZTumgKFQXNlDmGsAPkJDvqYlGVzixktNwuM13jP9T5M0Xe 2xw9mM2y4P5W1i4Ev6fXSYgu91CEDBwIFmnrNpL8xSBAlhAUq0O4008MELvV1BwObp eTg5NCTpEe3e+m9KO5g71B8fmi2bcejIxfGrfZ9I= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Lucas Stach , Jonathan Marek , Philipp Zabel , Sasha Levin , dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 4.4 14/14] gpu: ipu-v3: dp: fix CSC handling Date: Tue, 7 May 2019 01:42:16 -0400 Message-Id: <20190507054218.340-14-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507054218.340-1-sashal@kernel.org> References: <20190507054218.340-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Lucas Stach [ Upstream commit d4fad0a426c6e26f48c9a7cdd21a7fe9c198d645 ] Initialize the flow input colorspaces to unknown and reset to that value when the channel gets disabled. This avoids the state getting mixed up with a previous mode. Also keep the CSC settings for the background flow intact when disabling the foreground flow. Root-caused-by: Jonathan Marek Signed-off-by: Lucas Stach Signed-off-by: Philipp Zabel Signed-off-by: Sasha Levin --- drivers/gpu/ipu-v3/ipu-dp.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c index 98686edbcdbb..33de3a1bac49 100644 --- a/drivers/gpu/ipu-v3/ipu-dp.c +++ b/drivers/gpu/ipu-v3/ipu-dp.c @@ -195,7 +195,8 @@ int ipu_dp_setup_channel(struct ipu_dp *dp, ipu_dp_csc_init(flow, flow->foreground.in_cs, flow->out_cs, DP_COM_CONF_CSC_DEF_BOTH); } else { - if (flow->foreground.in_cs == flow->out_cs) + if (flow->foreground.in_cs == IPUV3_COLORSPACE_UNKNOWN || + flow->foreground.in_cs == flow->out_cs) /* * foreground identical to output, apply color * conversion on background @@ -261,6 +262,8 @@ void ipu_dp_disable_channel(struct ipu_dp *dp) struct ipu_dp_priv *priv = flow->priv; u32 reg, csc; + dp->in_cs = IPUV3_COLORSPACE_UNKNOWN; + if (!dp->foreground) return; @@ -268,8 +271,9 @@ void ipu_dp_disable_channel(struct ipu_dp *dp) reg = readl(flow->base + DP_COM_CONF); csc = reg & DP_COM_CONF_CSC_DEF_MASK; - if (csc == DP_COM_CONF_CSC_DEF_FG) - reg &= ~DP_COM_CONF_CSC_DEF_MASK; + reg &= ~DP_COM_CONF_CSC_DEF_MASK; + if (csc == DP_COM_CONF_CSC_DEF_BOTH || csc == DP_COM_CONF_CSC_DEF_BG) + reg |= DP_COM_CONF_CSC_DEF_BG; reg &= ~DP_COM_CONF_FG_EN; writel(reg, flow->base + DP_COM_CONF); @@ -350,6 +354,8 @@ int ipu_dp_init(struct ipu_soc *ipu, struct device *dev, unsigned long base) mutex_init(&priv->mutex); for (i = 0; i < IPUV3_NUM_FLOWS; i++) { + priv->flow[i].background.in_cs = IPUV3_COLORSPACE_UNKNOWN; + priv->flow[i].foreground.in_cs = IPUV3_COLORSPACE_UNKNOWN; priv->flow[i].foreground.foreground = true; priv->flow[i].base = priv->base + ipu_dp_flow_base[i]; priv->flow[i].priv = priv; -- 2.20.1