From: Anton Blanchard <anton@ozlabs.org>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: ego@linux.vnet.ibm.com, sandipandas1990@gmail.com,
richard.henderson@linaro.org, f4bug@amsat.org,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PATCH] target/ppc: Optimise VSX_LOAD_SCALAR_DS and VSX_VECTOR_LOAD_STORE
Date: Thu, 9 May 2019 10:35:45 +1000 [thread overview]
Message-ID: <20190509103545.4a7fa71a@kryten> (raw)
In-Reply-To: <c69c4513-417b-8415-c48b-61d0a05c1680@ilande.co.uk>
A few small optimisations:
In VSX_LOAD_SCALAR_DS() we can don't need to read the VSR via
get_cpu_vsrh().
Split VSX_VECTOR_LOAD_STORE() into two functions. Loads only need to
write the VSRs (set_cpu_vsr*()) and stores only need to read the VSRs
(get_cpu_vsr*())
Thanks to Mark Cave-Ayland for the suggestions.
Signed-off-by: Anton Blanchard <anton@ozlabs.org>
---
target/ppc/translate/vsx-impl.inc.c | 68 ++++++++++++++++++++++++-----
1 file changed, 58 insertions(+), 10 deletions(-)
diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c
index 4b7627f53b..cdb44b8b70 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -228,7 +228,7 @@ static void gen_lxvb16x(DisasContext *ctx)
tcg_temp_free_i64(xtl);
}
-#define VSX_VECTOR_LOAD_STORE(name, op, indexed) \
+#define VSX_VECTOR_LOAD(name, op, indexed) \
static void gen_##name(DisasContext *ctx) \
{ \
int xt; \
@@ -255,8 +255,6 @@ static void gen_##name(DisasContext *ctx) \
} \
xth = tcg_temp_new_i64(); \
xtl = tcg_temp_new_i64(); \
- get_cpu_vsrh(xth, xt); \
- get_cpu_vsrl(xtl, xt); \
gen_set_access_type(ctx, ACCESS_INT); \
EA = tcg_temp_new(); \
if (indexed) { \
@@ -282,10 +280,61 @@ static void gen_##name(DisasContext *ctx) \
tcg_temp_free_i64(xtl); \
}
-VSX_VECTOR_LOAD_STORE(lxv, ld_i64, 0)
-VSX_VECTOR_LOAD_STORE(stxv, st_i64, 0)
-VSX_VECTOR_LOAD_STORE(lxvx, ld_i64, 1)
-VSX_VECTOR_LOAD_STORE(stxvx, st_i64, 1)
+VSX_VECTOR_LOAD(lxv, ld_i64, 0)
+VSX_VECTOR_LOAD(lxvx, ld_i64, 1)
+
+#define VSX_VECTOR_STORE(name, op, indexed) \
+static void gen_##name(DisasContext *ctx) \
+{ \
+ int xt; \
+ TCGv EA; \
+ TCGv_i64 xth; \
+ TCGv_i64 xtl; \
+ \
+ if (indexed) { \
+ xt = xT(ctx->opcode); \
+ } else { \
+ xt = DQxT(ctx->opcode); \
+ } \
+ \
+ if (xt < 32) { \
+ if (unlikely(!ctx->vsx_enabled)) { \
+ gen_exception(ctx, POWERPC_EXCP_VSXU); \
+ return; \
+ } \
+ } else { \
+ if (unlikely(!ctx->altivec_enabled)) { \
+ gen_exception(ctx, POWERPC_EXCP_VPU); \
+ return; \
+ } \
+ } \
+ xth = tcg_temp_new_i64(); \
+ xtl = tcg_temp_new_i64(); \
+ get_cpu_vsrh(xth, xt); \
+ get_cpu_vsrl(xtl, xt); \
+ gen_set_access_type(ctx, ACCESS_INT); \
+ EA = tcg_temp_new(); \
+ if (indexed) { \
+ gen_addr_reg_index(ctx, EA); \
+ } else { \
+ gen_addr_imm_index(ctx, EA, 0x0F); \
+ } \
+ if (ctx->le_mode) { \
+ tcg_gen_qemu_##op(xtl, EA, ctx->mem_idx, MO_LEQ); \
+ tcg_gen_addi_tl(EA, EA, 8); \
+ tcg_gen_qemu_##op(xth, EA, ctx->mem_idx, MO_LEQ); \
+ } else { \
+ tcg_gen_qemu_##op(xth, EA, ctx->mem_idx, MO_BEQ); \
+ tcg_gen_addi_tl(EA, EA, 8); \
+ tcg_gen_qemu_##op(xtl, EA, ctx->mem_idx, MO_BEQ); \
+ } \
+ tcg_temp_free(EA); \
+ tcg_temp_free_i64(xth); \
+ tcg_temp_free_i64(xtl); \
+}
+
+VSX_VECTOR_STORE(stxv, st_i64, 0)
+VSX_VECTOR_STORE(stxvx, st_i64, 1)
#ifdef TARGET_PPC64
#define VSX_VECTOR_LOAD_STORE_LENGTH(name) \
@@ -330,7 +379,6 @@ static void gen_##name(DisasContext *ctx) \
return; \
} \
xth = tcg_temp_new_i64(); \
- get_cpu_vsrh(xth, rD(ctx->opcode) + 32); \
gen_set_access_type(ctx, ACCESS_INT); \
EA = tcg_temp_new(); \
gen_addr_imm_index(ctx, EA, 0x03); \
@@ -514,8 +562,8 @@ static void gen_##name(DisasContext *ctx) \
tcg_temp_free_i64(xth); \
}
-VSX_LOAD_SCALAR_DS(stxsd, st64_i64)
-VSX_LOAD_SCALAR_DS(stxssp, st32fs)
+VSX_STORE_SCALAR_DS(stxsd, st64_i64)
+VSX_STORE_SCALAR_DS(stxssp, st32fs)
static void gen_mfvsrwz(DisasContext *ctx)
{
--
2.20.1
next prev parent reply other threads:[~2019-05-09 0:36 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-07 0:48 [Qemu-devel] [PATCH 1/9] target/ppc: Fix xvxsigdp Anton Blanchard
2019-05-07 0:48 ` [Qemu-devel] [PATCH 2/9] target/ppc: Fix xxspltib Anton Blanchard
2019-05-07 5:20 ` David Gibson
2019-05-08 20:17 ` [Qemu-devel] [PATCH v2] " Anton Blanchard
2019-05-09 5:33 ` David Gibson
2019-05-07 0:48 ` [Qemu-devel] [PATCH 3/9] target/ppc: Fix xxbrq, xxbrw Anton Blanchard
2019-05-07 5:21 ` David Gibson
2019-05-07 0:48 ` [Qemu-devel] [PATCH 4/9] target/ppc: Fix lxvw4x, lxvh8x and lxvb16x Anton Blanchard
2019-05-07 5:28 ` David Gibson
2019-05-07 18:04 ` Mark Cave-Ayland
2019-05-09 0:33 ` Anton Blanchard
2019-05-09 5:35 ` David Gibson
2019-05-09 0:35 ` Anton Blanchard [this message]
2019-05-10 15:07 ` [Qemu-devel] [PATCH] target/ppc: Optimise VSX_LOAD_SCALAR_DS and VSX_VECTOR_LOAD_STORE Mark Cave-Ayland
2019-05-10 15:11 ` [Qemu-devel] [PATCH 4/9] target/ppc: Fix lxvw4x, lxvh8x and lxvb16x Mark Cave-Ayland
2019-05-21 20:11 ` Anton Blanchard
2019-05-22 0:49 ` David Gibson
2019-05-22 4:37 ` Mark Cave-Ayland
2019-05-22 6:10 ` David Gibson
2019-05-24 6:54 ` Mark Cave-Ayland
2019-05-22 7:39 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2019-05-07 0:48 ` [Qemu-devel] [PATCH 5/9] target/ppc: Fix xvabs[sd]p, xvnabs[sd]p, xvneg[sd]p, xvcpsgn[sd]p Anton Blanchard
2019-05-07 5:22 ` David Gibson
2019-05-09 0:49 ` [Qemu-devel] [PATCH v2] " Anton Blanchard
2019-05-10 15:02 ` Mark Cave-Ayland
2019-05-13 5:53 ` David Gibson
2019-05-07 18:05 ` [Qemu-devel] [PATCH 5/9] " Mark Cave-Ayland
2019-05-07 0:48 ` [Qemu-devel] [PATCH 6/9] target/ppc: Fix vslv and vsrv Anton Blanchard
2019-05-07 5:23 ` David Gibson
2019-05-07 0:48 ` [Qemu-devel] [PATCH 7/9] target/ppc: Fix vrlwmi and vrlwnm Anton Blanchard
2019-05-07 5:30 ` David Gibson
2019-05-07 0:48 ` [Qemu-devel] [PATCH 8/9] target/ppc: Fix dtstsfi and dtstsfiq Anton Blanchard
2019-05-07 0:48 ` [Qemu-devel] [PATCH 9/9] target/ppc: Fix vsum2sws Anton Blanchard
2019-05-07 5:25 ` David Gibson
2019-05-07 18:08 ` Mark Cave-Ayland
2019-05-07 1:21 ` [Qemu-devel] [PATCH 1/9] target/ppc: Fix xvxsigdp Alexey Kardashevskiy
2019-05-07 3:48 ` Anton Blanchard
2019-05-07 18:12 ` Mark Cave-Ayland
2019-05-07 5:18 ` David Gibson
2019-05-07 8:01 ` Philippe Mathieu-Daudé
2019-05-07 18:46 ` Eric Blake
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