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charset=UTF-8 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 20 May 2019 21:44:10 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 4/4] hw/arm/exynos4210: QOM'ify the Exynos4210 SoC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Igor Mitsyanko , Alistair Francis , qemu-arm@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Guenter Roeck Errors-To: qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-devel" X-TUID: 6hdnAPAjJ5mY Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/exynos4210.c | 26 +++++++++++++++++++++++--- hw/arm/exynos4_boards.c | 9 ++++++--- include/hw/arm/exynos4210.h | 9 +++++++-- 3 files changed, 36 insertions(+), 8 deletions(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 19009b76e7c..0b09129eff8 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -178,9 +178,10 @@ static void pl330_create(uint32_t base, qemu_irq irq= , int nreq) sysbus_connect_irq(busdev, 0, irq); } =20 -Exynos4210State *exynos4210_init(MemoryRegion *system_mem) +static void exynos4210_realize(DeviceState *socdev, Error **errp) { - Exynos4210State *s =3D g_new0(Exynos4210State, 1); + Exynos4210State *s =3D EXYNOS4210_SOC(socdev); + MemoryRegion *system_mem =3D get_system_memory(); qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS]; SysBusDevice *busdev; DeviceState *dev; @@ -435,6 +436,25 @@ Exynos4210State *exynos4210_init(MemoryRegion *syste= m_mem) qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]= ), 32); pl330_create(EXYNOS4210_PL330_BASE2_ADDR, qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]= ), 1); +} + +static void exynos4210_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); =20 - return s; + dc->realize =3D exynos4210_realize; } + +static const TypeInfo exynos4210_info =3D { + .name =3D TYPE_EXYNOS4210_SOC, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(Exynos4210State), + .class_init =3D exynos4210_class_init, +}; + +static void exynos4210_register_types(void) +{ + type_register_static(&exynos4210_info); +} + +type_init(exynos4210_register_types) diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index f824eef0d36..700e90d6671 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -45,7 +45,7 @@ typedef enum Exynos4BoardType { } Exynos4BoardType; =20 typedef struct Exynos4BoardState { - Exynos4210State *soc; + Exynos4210State soc; MemoryRegion dram0_mem; MemoryRegion dram1_mem; } Exynos4BoardState; @@ -130,7 +130,10 @@ exynos4_boards_init_common(MachineState *machine, exynos4_boards_init_ram(s, get_system_memory(), exynos4_board_ram_size[board_type]); =20 - s->soc =3D exynos4210_init(get_system_memory()); + object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC); + qdev_set_parent_bus(DEVICE(&s->soc), sysbus_get_default()); + object_property_set_bool(OBJECT(&s->soc), true, "realized", + &error_fatal); =20 return s; } @@ -148,7 +151,7 @@ static void smdkc210_init(MachineState *machine) EXYNOS4_BOARD_SMDK= C210); =20 lan9215_init(SMDK_LAN9118_BASE_ADDR, - qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)]= )); + qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)])= ); arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo); } =20 diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h index 098a69ec73d..27c684e851d 100644 --- a/include/hw/arm/exynos4210.h +++ b/include/hw/arm/exynos4210.h @@ -85,6 +85,9 @@ typedef struct Exynos4210Irq { } Exynos4210Irq; =20 typedef struct Exynos4210State { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ ARMCPU *cpu[EXYNOS4210_NCPUS]; Exynos4210Irq irqs; qemu_irq *irq_table; @@ -98,11 +101,13 @@ typedef struct Exynos4210State { I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER]; } Exynos4210State; =20 +#define TYPE_EXYNOS4210_SOC "exynos4210" +#define EXYNOS4210_SOC(obj) \ + OBJECT_CHECK(Exynos4210State, obj, TYPE_EXYNOS4210_SOC) + void exynos4210_write_secondary(ARMCPU *cpu, const struct arm_boot_info *info); =20 -Exynos4210State *exynos4210_init(MemoryRegion *system_mem); - /* Initialize exynos4210 IRQ subsystem stub */ qemu_irq *exynos4210_init_irq(Exynos4210Irq *env); =20 --=20 2.20.1